History log of /rk3399_ARM-atf/plat/renesas/rcar_gen5/platform.mk (Results 1 – 4 of 4)
Revision Date Author Comments
# e0e5a311 03-Dec-2025 Yann Gautier <yann.gautier@st.com>

Merge "fix(rcar5): enable missing FEAT_AMUv1p1 on R-Car Gen5 to fix the build" into integration


# a00fee77 02-Dec-2025 Marek Vasut <marek.vasut+renesas@mailbox.org>

fix(rcar5): enable missing FEAT_AMUv1p1 on R-Car Gen5 to fix the build

Since commit 6edbd2d6a8ae ("fix(cpufeat): require FEAT_AMUv1p1 to
enable the auxiliary counters") the ENABLE_AMU_AUXILIARY_COUN

fix(rcar5): enable missing FEAT_AMUv1p1 on R-Car Gen5 to fix the build

Since commit 6edbd2d6a8ae ("fix(cpufeat): require FEAT_AMUv1p1 to
enable the auxiliary counters") the ENABLE_AMU_AUXILIARY_COUNTERS
requires ENABLE_FEAT_AMUv1p1 to be enabled as well. Enable missing
ENABLE_FEAT_AMUv1p1 to fix the build, which was broken because the
R-Car Gen5 and FEAT_AMUv1p1 commits landed in reverse order.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I834aff7798d7a5e10014fbd9f1ac8a97908b9aab

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# 7cab2c23 02-Dec-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "feat(rcar): add initial BL31 support for Renesas R-Car X5H" into integration


# f180a3b7 29-May-2025 Hieu Nguyen <hieu.nguyen.dn@renesas.com>

feat(rcar): add initial BL31 support for Renesas R-Car X5H

This patch introduces initial BL31 (EL3 firmware) support for the
Renesas R-Car Gen5 (X5H) platform.

Key features and changes include:
- P

feat(rcar): add initial BL31 support for Renesas R-Car X5H

This patch introduces initial BL31 (EL3 firmware) support for the
Renesas R-Car Gen5 (X5H) platform.

Key features and changes include:
- Platform definitions and memory map for R-Car X5H
(Cortex-A720AE, 8 clusters x 4 cores)
- Platform-specific PSCI power management and topology
- SCMI-based power domain and system power management
- GICv4/Fainlight-AE interrupt controller initialization and support
- Trusted SRAM, shared memory, and crash log region setup
- SCIF console support
- Stack protector implementation for enhanced security
- Platform-specific linker script and build integration
- Various helper and initialization routines for MMU, GIC, and SCMI
- Platform-specific mailbox and boot flow handling
- Basic suspend implementation via SCP-FW
- AMU counters, SVE, PAUTH accessible to EL1

Signed-off-by: Hieu Nguyen <hieu.nguyen.dn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I04be48a55a618fe952b28283d2f85f48f7761c9a

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