rcar_gen3: drivers: pfc: Move PFC drivers out of staging

Now that PFC drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie594b

rcar_gen3: drivers: pfc: Move PFC drivers out of staging

Now that PFC drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie594b53558c2bfb8e5d88e5b0354752c17a2487e

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rcar_gen3: drivers: qos: Move QoS drivers out of staging

Now that QoS drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If61ab

rcar_gen3: drivers: qos: Move QoS drivers out of staging

Now that QoS drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8

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rcar_gen3: console: Convert to multi-console API

Convert the R-Car Gen3 platform and both SCIF and Log drivers
to multi-console API.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Chang

rcar_gen3: console: Convert to multi-console API

Convert the R-Car Gen3 platform and both SCIF and Log drivers
to multi-console API.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I18556973937d150b60453f9150d54ee612571e35

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rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3

Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-of

rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3

Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: If8918efad0fcbe6f91b66c0c7438406b1d4fb759

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rcar_gen3: drivers: Change to restore timer counter value at resume

Changed to save and restore cntpct_el0 using memory mapped
register for generic timer when System Suspend and Resume.

Reported by

rcar_gen3: drivers: Change to restore timer counter value at resume

Changed to save and restore cntpct_el0 using memory mapped
register for generic timer when System Suspend and Resume.

Reported by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I40fd9f5434c4d52b320cd1d20322b9b8e4e67155

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rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.2

Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-of

rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.2

Update the revision number in the revision management file.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I239f4d9f58d38515a49fa1a22cece48b59710d15

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rcar_gen3: plat: Change periodic write DQ training option.

Periodic write DQ training available as default.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yo

rcar_gen3: plat: Change periodic write DQ training option.

Periodic write DQ training available as default.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I649cfe538e4e2c7e19145ce7d1938ce4361b2529

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rcar_gen3: plat: Add R-Car V3M support

Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barino

rcar_gen3: plat: Add R-Car V3M support

Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
Marek: Update on top of mainline ATF/master

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rcar_gen3: plat: Add initial D3 support

Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code
will be added separately.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiB

Print the DRAM bank size in MiB instead of GiB in case the bank size
is smaller than 1 GiB. This prevents printing zeroes on systems with

rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiB

Print the DRAM bank size in MiB instead of GiB in case the bank size
is smaller than 1 GiB. This prevents printing zeroes on systems with
small DRAM sizes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: plat: Set M3W ULCB DRAM size to 2 GiB

The M3W ULCB board has 2 GiB of DRAM, set it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

rcar_gen3: Add M3-W 3.0 support

Add support for the M3W 3.0 SoC and synchronize the upstream ATF with
Renesas downstream ATF release v2.0.1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.co

rcar_gen3: Add M3-W 3.0 support

Add support for the M3W 3.0 SoC and synchronize the upstream ATF with
Renesas downstream ATF release v2.0.1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: plat: Prevent PCIe hang during L1X config access

In case the PCIe controller receives a L1_Enter_PM DLLP, it will
disable the internal PLLs. The system software cannot predict it
and can

rcar_gen3: plat: Prevent PCIe hang during L1X config access

In case the PCIe controller receives a L1_Enter_PM DLLP, it will
disable the internal PLLs. The system software cannot predict it
and can attempt to perform device config space access across the
PCIe link while the controller is in this transitional state. If
such condition happens, the PCIe controller register access will
trigger ARM64 SError exception.

This patch adds checks for which PCIe controller is enabled,
checks whether the PCIe controller is in such a transitional
state and if so, first completes the transition and then restarts
the instruction which caused the SError.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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Remove unneeded include paths in PLAT_INCLUDES

Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antoni

Remove unneeded include paths in PLAT_INCLUDES

Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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rcar_gen3: plat: Add missing cpu_on_check() implementation

The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing
function into the PWRC code.

Signed-off-by: Marek Vasut <marek.vasut+

rcar_gen3: plat: Add missing cpu_on_check() implementation

The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing
function into the PWRC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: plat: Allow E3 auto-detection

Allow auto-detecting E3 when RCAR_LSI is set to RCAR_AUTO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

rcar_gen3: plat: Drop unused macro

The macro is not used, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

Revert "rcar_gen3: plat: Enable programmable CPU reset address"

This reverts commit d48536e2f92d47ebb92cf12b35133c3be2d0e459,
which misbehaves on R-Car H3 ES2.0. Until the reason for that
misbehavio

Revert "rcar_gen3: plat: Enable programmable CPU reset address"

This reverts commit d48536e2f92d47ebb92cf12b35133c3be2d0e459,
which misbehaves on R-Car H3 ES2.0. Until the reason for that
misbehavior is understood, revert the commit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: plat: update renesas version to 2.0.0

Update the reported Renesas version to 2.0.0, since the DDR/QoS/PFC
table versions match the ones from that release.

Signed-off-by: Marek Vasut <mar

rcar_gen3: plat: update renesas version to 2.0.0

Update the reported Renesas version to 2.0.0, since the DDR/QoS/PFC
table versions match the ones from that release.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: drivers: pwrc: Switch to common delay implementation

Replace the ad-hoc implementation of delay in PWRC driver
with common R-Car delay code.

Signed-off-by: Marek Vasut <marek.vasut+renes

rcar_gen3: drivers: pwrc: Switch to common delay implementation

Replace the ad-hoc implementation of delay in PWRC driver
with common R-Car delay code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: drivers: delay: Rewrite from assembler to C

Rewrite the delay code from assembler to C.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

rcar_gen3: plat: Add generic timer init

Add code to determine the platform timer frequency and configure
the generic timer accordingly early in BL2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@

rcar_gen3: plat: Add generic timer init

Add code to determine the platform timer frequency and configure
the generic timer accordingly early in BL2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into header

Move the rcar_cpld_reset_cpu() function into header file and zap the externs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.

rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into header

Move the rcar_cpld_reset_cpu() function into header file and zap the externs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: plat: Dump EL3 interrupt error registers

Since the interrupts are handled in EL3, dump the EL3 error registers
in case an error happens.

Signed-off-by: Marek Vasut <marek.vasut+renesas@g

rcar_gen3: plat: Dump EL3 interrupt error registers

Since the interrupts are handled in EL3, dump the EL3 error registers
in case an error happens.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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rcar_gen3: plat: Enable programmable CPU reset address

The reset address is programmable on the R-Car Gen3, enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>