Merge changes I32c5be5d,I15a652a0 into integration

* changes:
fix(qemu): add reason parameter to MEC update
refactor(rmmd): modify MEC update call to meet FIRME

fix(qemu): add reason parameter to MEC update

The FIRME MFI_MEC_REFRESH call takes a reason parameter. Add it to the
QEMU callback for compatibility.

Change-Id: I32c5be5dbce44102650f9312c44e1d00a31

fix(qemu): add reason parameter to MEC update

The FIRME MFI_MEC_REFRESH call takes a reason parameter. Add it to the
QEMU callback for compatibility.

Change-Id: I32c5be5dbce44102650f9312c44e1d00a3146eb9
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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Merge changes from topic "mec" into integration

* changes:
feat(qemu): add plat_rmmd_mecid_key_update()
feat(rmmd): add RMM_MECID_KEY_UPDATE call

feat(qemu): add plat_rmmd_mecid_key_update()

Add an implementation of the plat_rmmd_mecid_key_update() callback, that
updates the MEC keys associated with a MECID. Leave it empty for now,
since QEMU

feat(qemu): add plat_rmmd_mecid_key_update()

Add an implementation of the plat_rmmd_mecid_key_update() callback, that
updates the MEC keys associated with a MECID. Leave it empty for now,
since QEMU doesn't yet implement an MPE (Memory Protection Engine).

Change-Id: I2746f6024f28e4fd487726de9e43e14d8cad57a0
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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Merge changes from topic "memory_bank" into integration

* changes:
fix(qemu): statically allocate bitlocks array
feat(qemu): update for renamed struct memory_bank
feat(fvp): increase GPT PPS t

Merge changes from topic "memory_bank" into integration

* changes:
fix(qemu): statically allocate bitlocks array
feat(qemu): update for renamed struct memory_bank
feat(fvp): increase GPT PPS to 1TB
feat(gpt): statically allocate bitlocks array
chore(gpt): define PPS in platform header files
feat(fvp): allocate L0 GPT at the top of SRAM
feat(fvp): change size of PCIe memory region 2
feat(rmm): add PCIe IO info to Boot manifest
feat(fvp): define single Root region

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feat(qemu): update for renamed struct memory_bank

The struct ns_dram_bank has been renamed to struct memory_bank, so
update plat/qemu accordingly.

Signed-off-by: Jens Wiklander <jens.wiklander@lina

feat(qemu): update for renamed struct memory_bank

The struct ns_dram_bank has been renamed to struct memory_bank, so
update plat/qemu accordingly.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: If5ed92edd132c977009a7371ec53eca0ee35ef00

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Merge "fix(qemu): fix RMM manifest checksum calculation" into integration

fix(qemu): fix RMM manifest checksum calculation

Commit 71c4443886ff ("fix(lib/rmm_el3_ifc): add console name to checksum
calculation") on TF-RMM updated the checksum calcualtion of the RMM
manifest

fix(qemu): fix RMM manifest checksum calculation

Commit 71c4443886ff ("fix(lib/rmm_el3_ifc): add console name to checksum
calculation") on TF-RMM updated the checksum calcualtion of the RMM
manifest to include the console names.

Include console names in the QEMU manifest to remain compatible with
RMM, just like commit aa99881d3011 ("fix(rme): add console name to
checksum calculation") did for FVP.

Checksum calculation is done by adding together 64-bit values. Add a
helper that does this.

Change-Id: Ica6cab628160593830270bef1acdeb475d1c0c36
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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Merge changes from topic "gerrit-master-v3" into integration

* changes:
feat(qemu-sbsa): add support for RME on SBSA machine
feat(qemu-sbsa): configure RMM manifest based on system RAM
feat(qe

Merge changes from topic "gerrit-master-v3" into integration

* changes:
feat(qemu-sbsa): add support for RME on SBSA machine
feat(qemu-sbsa): configure RMM manifest based on system RAM
feat(qemu-sbsa): configure GPT based on system RAM
feat(qemu-sbsa): adjust DT memory start address when supporting RME
feat(qemu-sbsa): relocate DT after the RMM when RME is enabled
feat(qemu-sbsa): dissociate QEMU NS start address and NS_DRAM0_BASE
feat(qemu-sbsa): increase maximum FIP size
refactor(qemu-sbsa): move all DT related functions to sbsa_platform.c
refactor(qemu-sbsa): create accessor functions for platform info
refactor(qemu-sbsa): rename function sip_svc_init() to something more meaningful
refactor(qemu-sbsa): move DT related structures to their own header
refactor(qemu-sbsa): rename struct dynamic_platform_info
refactor(qemu): make L0GPT size configurable
refactor(qemu): move GPT setup to BL31
fix(qemu-sbsa): fix compilation error when accessing DT functions

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feat(qemu-sbsa): configure RMM manifest based on system RAM

The RMM manifest needs to reflect the amount of RAM available on the
system. Since system RAM is based on user input and reflected in the

feat(qemu-sbsa): configure RMM manifest based on system RAM

The RMM manifest needs to reflect the amount of RAM available on the
system. Since system RAM is based on user input and reflected in the
device tree, get the information from there rather than using hard coded
values.

Change-Id: I63f090c1c04d9addfcd7a349450735728fa88ed0
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

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feat(qemu-sbsa): relocate DT after the RMM when RME is enabled

When RME is enabled, (1) the RMM is installed at the base of system RAM,
(2) the base of the system RAM is shifted upward, after the RM

feat(qemu-sbsa): relocate DT after the RMM when RME is enabled

When RME is enabled, (1) the RMM is installed at the base of system RAM,
(2) the base of the system RAM is shifted upward, after the RMM and (3)
the device tree is relocated to the new system RAM base.

This patch relocates the device tree to the new system RAM base before
the RMM is installed in RAM. From there, other accesses to the device
tree are using the new location.

Change-Id: I0cb4e060ca33a11becd78fe48fab4dc76f0b484b
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

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Merge changes from topic "el3spmc-fix-v2.12-rc0" into integration

* changes:
feat(qemu): increase size of bl31
fix(qemu): fix EL3-SPMC data store alignment
fix(qemu): fix build error with spmd

fix(qemu): fix EL3-SPMC data store alignment

With PLAT=qemu, the EL3-SPMC data store is provided as an array of
uint8_t and implicitly with a 1 byte alignment. But the way the data
store is used it

fix(qemu): fix EL3-SPMC data store alignment

With PLAT=qemu, the EL3-SPMC data store is provided as an array of
uint8_t and implicitly with a 1 byte alignment. But the way the data
store is used it must have a larger alignment, so change to double-word
alignment for maximum compatibility.

Change-Id: I4e9b901889078fee4b87f8333257bdc076386572
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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fix(qemu): fix build error with spmd

Currently when building with PLAT=qemu SPD=spmd SPMC_AT_EL3=1
SPMD_SPM_AT_SEL2=0, there is a build error since
plat_spmd_handle_group0_interrupt() is called irre

fix(qemu): fix build error with spmd

Currently when building with PLAT=qemu SPD=spmd SPMC_AT_EL3=1
SPMD_SPM_AT_SEL2=0, there is a build error since
plat_spmd_handle_group0_interrupt() is called irrespective of
SPMC_AT_EL3. Fix this by making plat_spmd_handle_group0_interrupt()
available if SPD_spmd is defined only.

Change-Id: If5f650d2bd3675cbb4b509e9e3743d3865d7c812
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Merge "feat(qemu): update to manifest v0.3" into integration

feat(qemu): update to manifest v0.3

Update the RMM manifest to v0.3: pass the console information to RMM.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Change-Id: I55093cd0c12f9c6

feat(qemu): update to manifest v0.3

Update the RMM manifest to v0.3: pass the console information to RMM.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Change-Id: I55093cd0c12f9c6a7569d7e524f7d301acbb2a45

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Merge changes from topic "qemu-rme" into integration

* changes:
feat(qemu): support TRP for RME
feat(qemu): load and run RMM image
feat(qemu): setup Granule Protection Table
feat(qemu): setu

Merge changes from topic "qemu-rme" into integration

* changes:
feat(qemu): support TRP for RME
feat(qemu): load and run RMM image
feat(qemu): setup Granule Protection Table
feat(qemu): setup memory map for RME
feat(qemu): update mapping types for RME
feat(qemu): use mock attestation functions for RME
fix(qemu): increase max FIP size

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feat(qemu): support TRP for RME

When an external RMM is not provided during make invocation, include the
Test Realm Payload (TRP) to the FIP.

Change-Id: I15d396cf268a08d79da63075aadb4172238eb225
Si

feat(qemu): support TRP for RME

When an external RMM is not provided during make invocation, include the
Test Realm Payload (TRP) to the FIP.

Change-Id: I15d396cf268a08d79da63075aadb4172238eb225
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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feat(qemu): load and run RMM image

When RME is enabled, jump to the RMM image before BL33. When using
semihosting rather than FIP, the image called "rmm.bin" is loaded from
the runtime directory.

C

feat(qemu): load and run RMM image

When RME is enabled, jump to the RMM image before BL33. When using
semihosting rather than FIP, the image called "rmm.bin" is loaded from
the runtime directory.

Change-Id: I15863410b1e505aa502276b339b22a2ddcb0b745
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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feat(qemu): update mapping types for RME

With RME, mappings for EL3 use MT_ROOT rather than MT_SECURE. Update the
mapping types to select the right memory type: EL3_PAS is MT_ROOT when
RME is enable

feat(qemu): update mapping types for RME

With RME, mappings for EL3 use MT_ROOT rather than MT_SECURE. Update the
mapping types to select the right memory type: EL3_PAS is MT_ROOT when
RME is enabled, MT_SECURE otherwise.

Change-Id: I93e287009515b64e833a6f69545766be4c87e473
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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Merge changes from topic "rm/handoff" into integration

* changes:
feat(qemu): implement firmware handoff on qemu
feat(handoff): introduce firmware handoff library

feat(qemu): implement firmware handoff on qemu

Implement firmware handoff from BL2 to BL33 on qemu platform
compliant to Firmware handoff specification v0.9.

Change-Id: Id8d5206a71ef6ec97cf3c97995d

feat(qemu): implement firmware handoff on qemu

Implement firmware handoff from BL2 to BL33 on qemu platform
compliant to Firmware handoff specification v0.9.

Change-Id: Id8d5206a71ef6ec97cf3c97995de328ebf0600cc
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>

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Merge "fix(spmd): fix build error with spmd" into integration

fix(spmd): fix build error with spmd

Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0'
options, this causes a build failure as
'plat_spmd_handle_group0_interrupt' is called irrespective of

fix(spmd): fix build error with spmd

Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0'
options, this causes a build failure as
'plat_spmd_handle_group0_interrupt' is called irrespective of
'SPMD_SPM_AT_SEL2' usage in 'spmd_group0_interrupt_handler_nwd'

So make 'plat_spmd_handle_group0_interrupt' dummy implementation
available just when spmd is enabled and SPMC_AT_EL3 is disabled.

Change-Id: Iaccd38faab81671c98f9165f318145187dca9bc2
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge changes from topic "mp/group0_support" into integration

* changes:
docs(spm): support for handling Group0 interrupts
feat(spmd): introduce platform handler for Group0 interrupt
feat(spmd

Merge changes from topic "mp/group0_support" into integration

* changes:
docs(spm): support for handling Group0 interrupts
feat(spmd): introduce platform handler for Group0 interrupt
feat(spmd): add support for FFA_EL3_INTR_HANDLE_32 ABI
feat(spmd): register handler for group0 interrupt from NWd

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