| c766adce | 19-Dec-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: memctrl: enable mc coalescer
This patch enable the Memory Controller's "Coalescer" feature to
improve performance of memory transactions.
Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb
Tegra194: memctrl: enable mc coalescer
This patch enable the Memory Controller's "Coalescer" feature to
improve performance of memory transactions.
Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb4d8
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| f3ec5c0c | 24-Dec-2017 |
steven kao <skao@nvidia.com> |
Tegra194: update scratch registers used to read boot parameters
This patch changes SCRATCH_BOOT_PARAMS_ADDR macro to use SECURE_SCRATCH_RSV81
instead of SECURE_SCRATCH_RSV44. The previous level boot
Tegra194: update scratch registers used to read boot parameters
This patch changes SCRATCH_BOOT_PARAMS_ADDR macro to use SECURE_SCRATCH_RSV81
instead of SECURE_SCRATCH_RSV44. The previous level bootloader changed this
setting, so update here to keep both components in sync.
Change-Id: I4e0c1b54fc69482d5513a8608d0bf616677e1bdd
Signed-off-by: steven kao <skao@nvidia.com>
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| 9091e789 | 14-Jun-2017 |
Vignesh Radhakrishnan <vigneshr@nvidia.com> |
Tegra194: implement system shutdown/reset handlers
This patch implements the PSCI system shutdown and reset handlers,
that in turn issue the MCE commands.
Change-Id: Ia9c831674d7be615a6e336abca42f3
Tegra194: implement system shutdown/reset handlers
This patch implements the PSCI system shutdown and reset handlers,
that in turn issue the MCE commands.
Change-Id: Ia9c831674d7be615a6e336abca42f397e4455572
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
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| 0789758a | 11-Dec-2017 |
Vignesh Radhakrishnan <vigneshr@nvidia.com> |
Tegra194: mce: support for shutdown and reboot
This patch adds support for shutdown/reboot handlers to the MCE
driver.
ATF communicates with mce using nvg interface for shutdown &
reboot. Both shut
Tegra194: mce: support for shutdown and reboot
This patch adds support for shutdown/reboot handlers to the MCE
driver.
ATF communicates with mce using nvg interface for shutdown &
reboot. Both shutdown and reboot use the same nvg index.
However, the 1st bit of the nvg data argument differentiates
whether its a shutdown or reboot.
Change-Id: Id2d1b0c4fec55abf69b7f8adb65ca70bfa920e73
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
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| de4a6438 | 20-Dec-2017 |
Vignesh Radhakrishnan <vigneshr@nvidia.com> |
Tegra194: request CG7 before checking if SC7 is allowed
Currently firmware seems to be checking if we can get into system
suspend after checking if CC6 & C7 is allowed. For system suspend
to be trig
Tegra194: request CG7 before checking if SC7 is allowed
Currently firmware seems to be checking if we can get into system
suspend after checking if CC6 & C7 is allowed. For system suspend
to be triggered, the firmware needs to request for CG7 as well.
This patch fixes this anomaly.
Change-Id: I39c4c50092a4288f4f3fa4b0b1d5026be50f058f
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| a3c2c0e9 | 12-Dec-2017 |
Steven Kao <skao@nvidia.com> |
Tegra194: config to enable/disable strict checking mode
This patch adds a new configuration option to the platform makefiles
that disables/enables strict checking mode. The config is enabled
by defa
Tegra194: config to enable/disable strict checking mode
This patch adds a new configuration option to the platform makefiles
that disables/enables strict checking mode. The config is enabled
by default.
Change-Id: I727dd0facee88d9517bf6956eaf9163eba25c8bb
Signed-off-by: Steven Kao <skao@nvidia.com>
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| 181a9fab | 29-Nov-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: remove unused platform configs
This patch cleans the makefile to remove unused platform config
options.
Change-Id: I96d9795c0f0ba593de96017dc9a401d7c2ab471a
Signed-off-by: Varun Wadekar <
Tegra194: remove unused platform configs
This patch cleans the makefile to remove unused platform config
options.
Change-Id: I96d9795c0f0ba593de96017dc9a401d7c2ab471a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 26c1a1e7 | 21-Nov-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: restore XUSB stream IDs on System Resume
The stream IDs for XUSB programmed during cold boot are lost on System
Suspend. This patch restores the XUSB stream IDs on System Resume.
NOTE: TH
Tegra194: restore XUSB stream IDs on System Resume
The stream IDs for XUSB programmed during cold boot are lost on System
Suspend. This patch restores the XUSB stream IDs on System Resume.
NOTE: THE WARMBOOT CODE NEEDS TO MAKE SURE THAT THE XUSB MODULE IS OUT
OF RESET AND THE CLOCKS ARE ENABLED, BEFORE POWERING ON THE CPU, DURING
SYSTEM RESUME.
Change-Id: Ibd5f1e5ebacffa6b29b625f4c41ecf204afa8191
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 22c72f2a | 09-Jan-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: drivers: fix violations of MISRA Rule 21.1
This patch fixes the violations of Rule 21.1 from all the
header files.
Rule 21.1 "#define and #undef shall not be used on a reserved
Tegra194: drivers: fix violations of MISRA Rule 21.1
This patch fixes the violations of Rule 21.1 from all the
header files.
Rule 21.1 "#define and #undef shall not be used on a reserved
identifier or reserved macro name"
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I12e17a5d7158defd33b03416daab3049749905fc
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| 67db3231 | 09-Jan-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: include: fix violations of MISRA Rule 21.1
This patch fixes the violations of Rule 21.1 from all the
Tegra common header files.
Rule 21.1 "#define and #undef shall not be used on a reserved
Tegra: include: fix violations of MISRA Rule 21.1
This patch fixes the violations of Rule 21.1 from all the
Tegra common header files.
Rule 21.1 "#define and #undef shall not be used on a reserved
identifier or reserved macro name"
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I2e117645c110e04c13fa86ebbbb38df4951d2185
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| 13be0ee4 | 10-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "plat: nvidia: remove spurious UTF-8 characters at top of platform files" into integration |
| 1ab2dc1a | 09-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Remove redundant declarations." into integration |
| f1f72019 | 09-Jan-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
plat: nvidia: remove spurious UTF-8 characters at top of platform files
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Iee7fb43990047b27972e99572ec4b3dc4e5c0423 |
| 7a05f06a | 02-Jan-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Remove redundant declarations.
In further patches, we wish to enable -wredundant-decls check as
part of warning flags by default.
Change-Id: I43410d6dbf40361a503c16d94ccf0f4cf29615b7
Signed-off-by:
Remove redundant declarations.
In further patches, we wish to enable -wredundant-decls check as
part of warning flags by default.
Change-Id: I43410d6dbf40361a503c16d94ccf0f4cf29615b7
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| e1fcb1bf | 03-Jan-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: mce: fix error code signedness
The MCE driver's helper functions were using postive values as error
codes.
This patch updates the functions to return negative values as error
codes instea
Tegra194: mce: fix error code signedness
The MCE driver's helper functions were using postive values as error
codes.
This patch updates the functions to return negative values as error
codes instead. Some functions are updated to use the right error code.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I3e2ecc30a6272a357e1a22ec850543fde2a694f6
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| 538b0020 | 14-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm: Remove SPM Alpha 1 prototype and support files
The Secure Partition Manager (SPM) prototype implementation is
being removed. This is preparatory work for putting in place a
dispatcher component
spm: Remove SPM Alpha 1 prototype and support files
The Secure Partition Manager (SPM) prototype implementation is
being removed. This is preparatory work for putting in place a
dispatcher component that, in turn, enables partition managers
at S-EL2 / S-EL1.
This patch removes:
- The core service files (std_svc/spm)
- The Resource Descriptor headers (include/services)
- SPRT protocol support and service definitions
- SPCI protocol support and service definitions
Change-Id: Iaade6f6422eaf9a71187b1e2a4dffd7fb8766426
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
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| 3f3c341a | 16-Sep-2019 |
Paul Beesley <paul.beesley@arm.com> |
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition
management in TF-A. One is based on the "Management Mode" (MM)
design, the oth
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition
management in TF-A. One is based on the "Management Mode" (MM)
design, the other is based on the Secure Partition Client Interface
(SPCI) specification. Currently there is a dependency between their
build flags that shouldn't exist, making further development
harder than it should be. This patch removes that
dependency, making the two flags function independently.
Before: ENABLE_SPM=1 is required for using either implementation.
By default, the SPCI-based implementation is enabled and
this is overridden if SPM_MM=1.
After: ENABLE_SPM=1 enables the SPCI-based implementation.
SPM_MM=1 enables the MM-based implementation.
The two build flags are mutually exclusive.
Note that the name of the ENABLE_SPM flag remains a bit
ambiguous - this will be improved in a subsequent patch. For this
patch the intention was to leave the name as-is so that it is
easier to track the changes that were made.
Change-Id: I8e64ee545d811c7000f27e8dc8ebb977d670608a
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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| 2783205d | 18-Dec-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: prepare boot parameters for Trusty
This patch saves the boot parameters provided by the previous bootloader
during cold boot and passes them to Trusty. Commit 06ff251ec introduced
the plat_tr
Tegra: prepare boot parameters for Trusty
This patch saves the boot parameters provided by the previous bootloader
during cold boot and passes them to Trusty. Commit 06ff251ec introduced
the plat_trusty_set_boot_args() handler, but did not consider the boot
parameters passed by the previous bootloader. This patch fixes that
anomaly.
Change-Id: Ib40dcd02b67c94cea5cefce09edb0be4a998db37
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| e9e19fb2 | 17-Dec-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: per-CPU GIC CPU interface init
This patch enables per-CPU GIC CPU interfaces during CPU
power on. The previous code initialized the distributor
for all CPUs, which was not required.
Signed-o
Tegra: per-CPU GIC CPU interface init
This patch enables per-CPU GIC CPU interfaces during CPU
power on. The previous code initialized the distributor
for all CPUs, which was not required.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ifd957b2367da06405b4c3e2225411adbaec35bb8
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| fba54d55 | 26-Oct-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: smmu: add support for backup multiple smmu regs
Tegra194 supports multiple SMMU blocks. This patch adds support to
save register values for SMMU0 and SMMU2, before entering the System
Susp
Tegra194: smmu: add support for backup multiple smmu regs
Tegra194 supports multiple SMMU blocks. This patch adds support to
save register values for SMMU0 and SMMU2, before entering the System
Suspend state.
Change-Id: I3a376cdb606ea057ad7047714717245f9dced5cf
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| 8ecc4291 | 15-Dec-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: introduce tegra_mc_def.h
This patch introduces memory controller register defines
for Tegra194 platforms.
Change-Id: I6596341ae817b6cec30cb74d201ad854a0c8c0a6
Signed-off-by: Pritesh Raith
Tegra194: introduce tegra_mc_def.h
This patch introduces memory controller register defines
for Tegra194 platforms.
Change-Id: I6596341ae817b6cec30cb74d201ad854a0c8c0a6
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| 56c27438 | 09-Feb-2018 |
Steven Kao <skao@nvidia.com> |
Tegra194: 40-bit wide memory address space
This patch updates the memory address space, physical and virtual,
to be 40-bits wide for all Tegra194 platforms.
Change-Id: Ie1bcdec2c4e8e15975048ce1c2a3
Tegra194: 40-bit wide memory address space
This patch updates the memory address space, physical and virtual,
to be 40-bits wide for all Tegra194 platforms.
Change-Id: Ie1bcdec2c4e8e15975048ce1c2a31c2ae0dd494c
Signed-off-by: Steven Kao <skao@nvidia.com>
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| 4719bba9 | 03-Dec-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: psci: rename 'percpu_data' variable
The per CPU wake times are saved in an array called 't19x_percpu_data'. But,
there is one instance in the code where the name of the variable is misspel
Tegra194: psci: rename 'percpu_data' variable
The per CPU wake times are saved in an array called 't19x_percpu_data'. But,
there is one instance in the code where the name of the variable is misspelt.
This patch fixes this typographical error to fix compilation errors.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I52f5f0b150c51d8cc38372675415dec7944a7735
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| 2d1f1010 | 22-Jan-2018 |
Jeetesh Burman <jburman@nvidia.com> |
Tegra194: add support to reset GPU
This patch adds macros, to define registers required to support GPU
reset, for Tegra194 SoCs.
Change-Id: Ifa7e0161b9e8de695a33856193f500b847a03526
Signed-off-by:
Tegra194: add support to reset GPU
This patch adds macros, to define registers required to support GPU
reset, for Tegra194 SoCs.
Change-Id: Ifa7e0161b9e8de695a33856193f500b847a03526
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
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| 95397d96 | 30-Nov-2017 |
Steven Kao <skao@nvidia.com> |
Tegra194: memctrl: fix logic to check TZDRAM config register access
This patch fixes the logic to check if the previous bootloader has
disabled access to the TZDRAM configuration registers. The pola
Tegra194: memctrl: fix logic to check TZDRAM config register access
This patch fixes the logic to check if the previous bootloader has
disabled access to the TZDRAM configuration registers. The polarity
for the bit was incorrect in the previous check.
Change-Id: I7a0ba4f7b1714997508ece904c0261ca2c901a03
Signed-off-by: Steven Kao <skao@nvidia.com>
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