feat(mt8189): add GPIO support

- Add GPIO support for MT8189.

Change-Id: I2d140b32eef8c05aba9170bf4af894ed43d52978
Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>

feat(mt8189): initialize platform for MT8189

- Add basic platform setup.
- Add MT8189 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.

Change-Id: Id59a

feat(mt8189): initialize platform for MT8189

- Add basic platform setup.
- Add MT8189 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.

Change-Id: Id59ae9265983defb46e27befabfd5c30b2b4a5a6
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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refactor(mediatek): move headers to common folder

The plat_macros.S and plat_private.h are identical across some
platforms, moved to the common folder for easier maintenance.

Change-Id: I31c71551aa

refactor(mediatek): move headers to common folder

The plat_macros.S and plat_private.h are identical across some
platforms, moved to the common folder for easier maintenance.

Change-Id: I31c71551aa0e891f080e58f21e6e79551d2a19e0
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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fix(cpus): remove errata setting PF_MODE to conservative

The erratum titled “Disabling of data prefetcher with outstanding
prefetch TLB miss might cause a deadlock” should not be handled within
TF-A

fix(cpus): remove errata setting PF_MODE to conservative

The erratum titled “Disabling of data prefetcher with outstanding
prefetch TLB miss might cause a deadlock” should not be handled within
TF-A. The current workaround attempts to follow option 2 but
misapplies it. Specifically, it statically sets PF_MODE to
conservative, which is not the recommended approach. According to the
erratum documentation, PF_MODE should be configured in conservative
mode only when we disable data prefetcher however this is not done
in TF-A and thus the workaround is not needed in TF-A.

The static setting of PF_MODE in TF-A does not correctly address the
erratum and may introduce unnecessary performance degradation on
platforms that adopt it without fully understanding its implications.

To prevent incorrect or unintended use, the current implementation of
this erratum workaround should be removed from TF-A and not adopted by
platforms.

List of Impacted CPU's with Errata Numbers and reference to SDEN -

Cortex-A78 - 2132060 - https://developer.arm.com/documentation/SDEN1401784/latest
Cortex-A78C - 2132064 - https://developer.arm.com/documentation/SDEN-2004089/latest
Cortex-A710 - 2058056 - https://developer.arm.com/documentation/SDEN-1775101/latest
Cortex-X2 - 2058056 - https://developer.arm.com/documentation/SDEN-1775100/latest
Cortex-X3 - 2070301 - https://developer.arm.com/documentation/SDEN2055130/latest
Neoverse-N2 - 2138953 - https://developer.arm.com/documentation/SDEN-1982442/latest
Neoverse-V1 - 2108267 - https://developer.arm.com/documentation/SDEN-1401781/latest
Neoverse-V2 - 2331132 - https://developer.arm.com/documentation/SDEN-2332927/latest

Change-Id: Icf4048508ae070b2df073cc46c63be058b2779df
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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refactor(mediatek): fix mcusys off issue for MTK GIC v3 driver

When mcusys is off, rdist_ctx will save the rdist data of the last core.
In the case of the last core plug off, the data of other cores

refactor(mediatek): fix mcusys off issue for MTK GIC v3 driver

When mcusys is off, rdist_ctx will save the rdist data of the last core.
In the case of the last core plug off, the data of other cores will be
inconsistent with the data in rdist_ctx.

Therefore, each core needs to use a dedicated context.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Change-Id: Ic9501f4da219cf906c0e348982be3f550c3ba30b

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feat(mt8196): fix MT8196 gpio driver

- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b

feat(mt8196): fix MT8196 gpio driver

- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b26

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fix(mt8196): remove EC_SUSPEND_PIN initial setting

Move EC_SUSPEND_PIN (GPIO_AP_SUSPEND_L) init to coreboot and remove
EC_SUSPEND_PIN init from TF-A.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.

fix(mt8196): remove EC_SUSPEND_PIN initial setting

Move EC_SUSPEND_PIN (GPIO_AP_SUSPEND_L) init to coreboot and remove
EC_SUSPEND_PIN init from TF-A.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I3d7a5a923dc9f692495d99255427a39ef5852bf8

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fix(mt8196): remove SPM support for ES chip

We no longer maintain the device equipped with ES chip. Remove SPM
support for ES ship.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I5

fix(mt8196): remove SPM support for ES chip

We no longer maintain the device equipped with ES chip. Remove SPM
support for ES ship.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I5b2d035ec384a9861239f33dbe6df54c17f1285c

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Merge "feat(mt8196): disable debug flag in APU driver" into integration

feat(mt8196): disable debug flag in APU driver

Disable the debug flag from the driver to reduce debugging messages.

Change-Id: I9444f64acbf684debab56d8226b14c6c01200ea4
Signed-off-by: Gavin Liu <ga

feat(mt8196): disable debug flag in APU driver

Disable the debug flag from the driver to reduce debugging messages.

Change-Id: I9444f64acbf684debab56d8226b14c6c01200ea4
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration

* changes:
fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset
chore(docs): drop the "wfi" from `pwr_

Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration

* changes:
fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset
chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
chore(psci): drop skip_wfi variable
feat(arm): convert arm platforms to expect a wakeup
fix(cpus): avoid SME related loss of context on powerdown
feat(psci): allow cores to wake up from powerdown
refactor: panic after calling psci_power_down_wfi()
refactor(cpus): undo errata mitigations
feat(cpus): add sysreg_bit_toggle

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Merge "fix(mt8196): fix wrong register offset of dptx on MT8196" into integration

feat(mt8196): enable vcore dvfsrc feature

This patch will enable vcore dvfsrc.
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM

feat(mt8196): enable vcore dvfsrc feature

This patch will enable vcore dvfsrc.
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and frequency of Vcore/DRAM to achieve power saving.

Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.corp-partner.google.com>
Change-Id: I972eb2da1b8526f4ce2927cd662a6fc3ef2f2401

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fix(mt8196): fix wrong register offset of dptx on MT8196

Fix wrong register offset of dptx on MT8196.

Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediat

fix(mt8196): fix wrong register offset of dptx on MT8196

Fix wrong register offset of dptx on MT8196.

Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge "fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap" into integration

fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap

This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-I

fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap

This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-Id: I57bfaad88a28d4f29e2b132ba080bc7d5b8248d8
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(mediatek): update mtk_sip_def.h

Update missing SiP SCM ID definitions. Those definitons are required
when linking to the proprietary library.

Change-Id: I6b912cee9bcceac774ff2228a1e335073a1d5e

feat(mediatek): update mtk_sip_def.h

Update missing SiP SCM ID definitions. Those definitons are required
when linking to the proprietary library.

Change-Id: I6b912cee9bcceac774ff2228a1e335073a1d5ea7
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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Merge "fix(mt8196): add whole-archive option to prebuilt library" into integration

feat(mt8196): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chro

feat(mt8196): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mt8196): refactor LPM header include paths to use lpm_v2

These changes align the project with the latest directory structure
and ensure consistency in header references.

Signed-off-by: Wenzhen

feat(mt8196): refactor LPM header include paths to use lpm_v2

These changes align the project with the latest directory structure
and ensure consistency in header references.

Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com>
Change-Id: I7f3c42cbd9a803064bbfed67cd8f309638da8441

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refactor(mediatek): update API calls to MTK GIC v3 driver

Updated the code to call the API of MTK GIC v3.

Change-Id: I1bb1771dda4d5532b1b818864f823dbb7a38094d
Signed-off-by: Gavin Liu <gavin.liu@me

refactor(mediatek): update API calls to MTK GIC v3 driver

Updated the code to call the API of MTK GIC v3.

Change-Id: I1bb1771dda4d5532b1b818864f823dbb7a38094d
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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fix(mt8196): add whole-archive option to prebuilt library

Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during th

fix(mt8196): add whole-archive option to prebuilt library

Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during the
linking process.

Change-Id: I35c728d3ccc98489183285a96f703e02dc7505d3
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge "feat(mt8196): add SMMU driver for PM" into integration

feat(mt8196): add SMMU driver for PM

Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM

feat(mt8196): add SMMU driver for PM

Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM get/put commands may come from
linux(EL1) and hypervisor(EL2).

Change-Id: I60f83c4e3d87059b0549b2ed8c68367be3bfbbc5
Signed-off-by: Yong Wu <yong.wu@mediatek.com>

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Merge "feat(mt8196): enable appropriate errata" into integration