1 /*
2 * Copyright (c) 2024, STMicroelectronics - All Rights Reserved
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <errno.h>
9
10 #include <arch_helpers.h>
11 #include <common/debug.h>
12 #include <drivers/arm/gic_common.h>
13 #include <drivers/arm/gicv2.h>
14 #include <drivers/st/stm32mp_reset.h>
15 #include <lib/mmio.h>
16 #include <lib/psci/psci.h>
17 #include <plat/common/platform.h>
18
19 #include <platform_def.h>
20
21 static uintptr_t stm32_sec_entrypoint;
22
stm32_cpu_standby(plat_local_state_t cpu_state)23 static void stm32_cpu_standby(plat_local_state_t cpu_state)
24 {
25 }
26
stm32_pwr_domain_on(u_register_t mpidr)27 static int stm32_pwr_domain_on(u_register_t mpidr)
28 {
29 return PSCI_E_INTERN_FAIL;
30 }
31
stm32_pwr_domain_off(const psci_power_state_t * target_state)32 static void stm32_pwr_domain_off(const psci_power_state_t *target_state)
33 {
34 /* Nothing to do */
35 }
36
stm32_pwr_domain_suspend(const psci_power_state_t * target_state)37 static void stm32_pwr_domain_suspend(const psci_power_state_t *target_state)
38 {
39 /* Nothing to do, power domain is not disabled */
40 }
41
stm32_pwr_domain_on_finish(const psci_power_state_t * target_state)42 static void stm32_pwr_domain_on_finish(const psci_power_state_t *target_state)
43 {
44 }
45
46 /*******************************************************************************
47 * STM32MP2 handler called when a power domain has just been powered on after
48 * having been suspended earlier. The target_state encodes the low power state
49 * that each level has woken up from.
50 ******************************************************************************/
stm32_pwr_domain_suspend_finish(const psci_power_state_t * target_state)51 static void stm32_pwr_domain_suspend_finish(const psci_power_state_t
52 *target_state)
53 {
54 /* Nothing to do, power domain is not disabled */
55 }
56
stm32_pwr_domain_pwr_down_wfi(const psci_power_state_t * target_state)57 static void __dead2 stm32_pwr_domain_pwr_down_wfi(const psci_power_state_t
58 *target_state)
59 {
60 ERROR("stm32mp2 Power Down WFI: operation not handled.\n");
61 panic();
62 }
63
stm32_system_off(void)64 static void __dead2 stm32_system_off(void)
65 {
66 ERROR("stm32mp2 System Off: operation not handled.\n");
67 panic();
68 }
69
stm32_system_reset(void)70 static void __dead2 stm32_system_reset(void)
71 {
72 stm32mp_system_reset();
73 }
74
stm32_validate_power_state(unsigned int power_state,psci_power_state_t * req_state)75 static int stm32_validate_power_state(unsigned int power_state,
76 psci_power_state_t *req_state)
77 {
78 return PSCI_E_INVALID_PARAMS;
79 }
80
stm32_validate_ns_entrypoint(uintptr_t entrypoint)81 static int stm32_validate_ns_entrypoint(uintptr_t entrypoint)
82 {
83 /* The non-secure entry point must be in DDR */
84 if (entrypoint < STM32MP_DDR_BASE) {
85 return PSCI_E_INVALID_ADDRESS;
86 }
87
88 return PSCI_E_SUCCESS;
89 }
90
stm32_get_sys_suspend_power_state(psci_power_state_t * req_state)91 static void stm32_get_sys_suspend_power_state(psci_power_state_t *req_state)
92 {
93 }
94
95 /*******************************************************************************
96 * Export the platform handlers. The ARM Standard platform layer will take care
97 * of registering the handlers with PSCI.
98 ******************************************************************************/
99 static const plat_psci_ops_t stm32_psci_ops = {
100 .cpu_standby = stm32_cpu_standby,
101 .pwr_domain_on = stm32_pwr_domain_on,
102 .pwr_domain_off = stm32_pwr_domain_off,
103 .pwr_domain_suspend = stm32_pwr_domain_suspend,
104 .pwr_domain_on_finish = stm32_pwr_domain_on_finish,
105 .pwr_domain_suspend_finish = stm32_pwr_domain_suspend_finish,
106 .pwr_domain_pwr_down = stm32_pwr_domain_pwr_down_wfi,
107 .system_off = stm32_system_off,
108 .system_reset = stm32_system_reset,
109 .validate_power_state = stm32_validate_power_state,
110 .validate_ns_entrypoint = stm32_validate_ns_entrypoint,
111 .get_sys_suspend_power_state = stm32_get_sys_suspend_power_state,
112 };
113
114 /*******************************************************************************
115 * Export the platform specific power ops.
116 ******************************************************************************/
plat_setup_psci_ops(uintptr_t sec_entrypoint,const plat_psci_ops_t ** psci_ops)117 int plat_setup_psci_ops(uintptr_t sec_entrypoint,
118 const plat_psci_ops_t **psci_ops)
119 {
120 stm32_sec_entrypoint = sec_entrypoint;
121 *psci_ops = &stm32_psci_ops;
122
123 return 0;
124 }
125