Merge "fix(imx): disable DRAM retention by default on i.MX8MQ" into integration

fix(imx): disable DRAM retention by default on i.MX8MQ

Building the default upstream configuration for the imx8mq-evk is no longer
possible: The linker will complain that the TF-A image will no long

fix(imx): disable DRAM retention by default on i.MX8MQ

Building the default upstream configuration for the imx8mq-evk is no longer
possible: The linker will complain that the TF-A image will no longer
fit On-Chip SRAM.

In order to make the i.MX8MQ Image buildable again, let's make the DRAM
retention feature optional: It was added in v2.9 and it's possible to
boot the systems without it. Users that make space elsewhere and wish to
enable it can use the newly introduced IMX_DRAM_RETENTION parameter to
configure it. The parameter is added to all i.MX8M variants, but only
for i.MX8MQ, we disable it by default, as that's the one that currently
has binary size problems.

Change-Id: I714f8ea96f18154db02390ba500f4a2dc5329ee7
Fixes: dd108c3c1fe3 ("feat(imx8mq): add the dram retention support for imx8mq")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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Merge changes from topic "imx8m_misc_changes" into integration

* changes:
feat(imx8mq): enable dram dvfs support on imx8mq
feat(imx8m): use non-fast wakeup stop mode for system suspend
feat(im

Merge changes from topic "imx8m_misc_changes" into integration

* changes:
feat(imx8mq): enable dram dvfs support on imx8mq
feat(imx8m): use non-fast wakeup stop mode for system suspend
feat(imx8mq): correct the slot ack setting for STOP mode
feat(imx8mq): add anamix pll override setting for DSM mode
feat(imx8mq): add workaround code for ERR11171 on imx8mq
feat(imx8mq): add the dram retention support for imx8mq
feat(imx8mq): add version for B2
fix(imx8m): backup mr12/14 value from lpddr4 chip
fix(imx8m): add ddr4 dvfs sw workaround for ERR050712
fix(imx8m): fix coverity out of bound access issue
fix(imx8m): fix the dram retention random hang on some imx8mq Rev2.0
feat(imx8m): add more dram pll setting
fix(imx8m): fix the current fsp init
fix(imx8m): fix the rank to rank space issue
fix(imx8m): fix the dfiphymaster setting after dvfs
feat(imx8m): update the ddr4 dvfs flow to include ddr3l support
fix(imx8m): correct the rank info get fro mstr
feat(imx8m): fix the ddr4 dvfs random hang on imx8m

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fix(imx8m): backup mr12/14 value from lpddr4 chip

Backup the mr12/14 value as the actual value used is not the
one we configured in the ddrc config timing.

Signed-off-by: Jacky Bai <ping.bai@nxp.co

fix(imx8m): backup mr12/14 value from lpddr4 chip

Backup the mr12/14 value as the actual value used is not the
one we configured in the ddrc config timing.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: If04733b34a3b4c080828bb7c82e83f0badbeaafd

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fix(imx8m): fix coverity out of bound access issue

Fix the out of bound access to the rank setting array.

Fix Coverity issue:

CID 6474575: Out-of-bounds access (OVERRUN)
CID 11014855: Unused value

fix(imx8m): fix coverity out of bound access issue

Fix the out of bound access to the rank setting array.

Fix Coverity issue:

CID 6474575: Out-of-bounds access (OVERRUN)
CID 11014855: Unused value (UNUSED_VALUE)

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I5d9ef90f1479e5d46d1b6c8693a27e3abd614766

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fix(imx8m): fix the rank to rank space issue

update umctl2's setting based on phy training CDD value
to workaround the rank-to-rank space issue.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed

fix(imx8m): fix the rank to rank space issue

update umctl2's setting based on phy training CDD value
to workaround the rank-to-rank space issue.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Change-Id: I0fab18cdc378fda760daa0f89c4dd84eb46f7e11

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fix(imx8m): correct the rank info get fro mstr

the bitfield of active_ranks in MSTR is defined as below.
Correct the rank num get in dram_info.

0x01: one rank;
0x11: two rank;

Signed-off-by: J

fix(imx8m): correct the rank info get fro mstr

the bitfield of active_ranks in MSTR is defined as below.
Correct the rank num get in dram_info.

0x01: one rank;
0x11: two rank;

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Change-Id: Idcadb39f492a8fe81c973ac4136d9a1eaa32f54b

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Merge changes Iec22dcab,Ib88b4b5d,I50cd6b82,If1167785,I9b3a08ef, ... into integration

* changes:
feat(imx8m): keep pu domains in default state during boot stage
feat(imx8m): add the PU power dom

Merge changes Iec22dcab,Ib88b4b5d,I50cd6b82,If1167785,I9b3a08ef, ... into integration

* changes:
feat(imx8m): keep pu domains in default state during boot stage
feat(imx8m): add the PU power domain support on imx8mm/mn
feat(imx8m): add the anamix pll override setting
feat(imx8m): add the ddr frequency change support for imx8m family
feat(imx8mn): enable dram retention suuport on imx8mn
feat(imx8mm): enable dram retention suuport on imx8mm
feat(imx8m): add dram retention flow for imx8m family

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feat(imx8m): add the ddr frequency change support for imx8m family

Add the DDR frequency change support.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: If1167785796b8678c351569b83d2922c66f6

feat(imx8m): add the ddr frequency change support for imx8m family

Add the DDR frequency change support.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: If1167785796b8678c351569b83d2922c66f6e530

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feat(imx8m): add dram retention flow for imx8m family

Add the dram retention flow for i.MX8M SoC family.

Change-Id: Ifb8ba5b2f6f002133cf47c07fef73df29c51c890
Signed-off-by: Jacky Bai <ping.bai@nxp.

feat(imx8m): add dram retention flow for imx8m family

Add the dram retention flow for i.MX8M SoC family.

Change-Id: Ifb8ba5b2f6f002133cf47c07fef73df29c51c890
Signed-off-by: Jacky Bai <ping.bai@nxp.com>

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