1 /* 2 * Copyright 2019-2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef DRAM_H 8 #define DRAM_H 9 10 #include <assert.h> 11 12 #include <arch_helpers.h> 13 #include <lib/utils_def.h> 14 15 #include <ddrc.h> 16 #include <platform_def.h> 17 18 #define DDRC_LPDDR4 BIT(5) 19 #define DDRC_DDR4 BIT(4) 20 #define DDRC_DDR3L BIT(0) 21 #define DDR_TYPE_MASK U(0x3f) 22 #define ACTIVE_RANK_MASK U(0x3) 23 #define DDRC_ACTIVE_ONE_RANK U(0x1) 24 #define DDRC_ACTIVE_TWO_RANK U(0x2) 25 26 /* reg & config param */ 27 struct dram_cfg_param { 28 unsigned int reg; 29 unsigned int val; 30 }; 31 32 struct dram_timing_info { 33 /* umctl2 config */ 34 struct dram_cfg_param *ddrc_cfg; 35 unsigned int ddrc_cfg_num; 36 /* ddrphy config */ 37 struct dram_cfg_param *ddrphy_cfg; 38 unsigned int ddrphy_cfg_num; 39 /* ddr fsp train info */ 40 struct dram_fsp_msg *fsp_msg; 41 unsigned int fsp_msg_num; 42 /* ddr phy trained CSR */ 43 struct dram_cfg_param *ddrphy_trained_csr; 44 unsigned int ddrphy_trained_csr_num; 45 /* ddr phy PIE */ 46 struct dram_cfg_param *ddrphy_pie; 47 unsigned int ddrphy_pie_num; 48 /* initialized fsp table */ 49 unsigned int fsp_table[4]; 50 }; 51 52 struct dram_info { 53 int dram_type; 54 unsigned int num_rank; 55 uint32_t num_fsp; 56 int current_fsp; 57 int boot_fsp; 58 bool bypass_mode; 59 struct dram_timing_info *timing_info; 60 /* mr, emr, emr2, emr3, mr11, mr12, mr22, mr14 */ 61 uint32_t mr_table[3][8]; 62 /* used for workaround for rank to rank issue */ 63 uint32_t rank_setting[3][3]; 64 }; 65 66 extern struct dram_info dram_info; 67 68 void dram_info_init(unsigned long dram_timing_base); 69 void dram_umctl2_init(struct dram_timing_info *timing); 70 void dram_phy_init(struct dram_timing_info *timing); 71 72 /* dram retention */ 73 void dram_enter_retention(void); 74 void dram_exit_retention(void); 75 76 void dram_clock_switch(unsigned int target_drate, bool bypass_mode); 77 78 /* dram frequency change */ 79 void lpddr4_swffc(struct dram_info *info, unsigned int init_fsp, unsigned int fsp_index); 80 void ddr4_swffc(struct dram_info *dram_info, unsigned int pstate); 81 82 #endif /* DRAM_H */ 83