| b695b2f1 | 12-May-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
refactor(fvp): nv ctr addr static helper function
Adding a static helper function plat_get_nv_ctr_addr() to be used by both plat_set_nv_ctr() and plat_get_nv_ctr() to return the non-volatile counter
refactor(fvp): nv ctr addr static helper function
Adding a static helper function plat_get_nv_ctr_addr() to be used by both plat_set_nv_ctr() and plat_get_nv_ctr() to return the non-volatile counter address stored in the platform.
Change-Id: I5124c19e4537bb369724aa0160cc55a3cb1ab7eb Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| ba56ea6f | 05-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(fiptool): move juno plat_fiptool.mk" into integration |
| 7f126ccf | 05-Jun-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "cot_cca_nvctr" into integration
* changes: feat(fvp): mock support for CCA NV ctr feat(auth): add CCA NV ctr to CCA CoT feat(build): pass CCA NV ctr option to cert_cr
Merge changes from topic "cot_cca_nvctr" into integration
* changes: feat(fvp): mock support for CCA NV ctr feat(auth): add CCA NV ctr to CCA CoT feat(build): pass CCA NV ctr option to cert_create feat(cert-create): add new option for CCA NV ctr
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| f51d277d | 04-May-2023 |
Wing Li <wingers@google.com> |
fix(fvp): update pwr_domain_suspend
Change-Id: Ied4063ac6e685368818b2296c2d1800f4b272b86 Signed-off-by: Wing Li <wingers@google.com> |
| 0cfa06b2 | 31-May-2023 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "bk/errata_refactor" into integration
* changes: feat(cpus): wrappers to propagate AArch32 errata info feat(cpus): add a way to automatically report errata feat(cpus):
Merge changes from topic "bk/errata_refactor" into integration
* changes: feat(cpus): wrappers to propagate AArch32 errata info feat(cpus): add a way to automatically report errata feat(cpus): add a concise way to implement AArch64 errata refactor(cpus): convert print_errata_status to C refactor(cpus): rename errata_report.h to errata.h refactor(cpus): move cpu_ops field defines to a header
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| a0a4bf48 | 31-May-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat: define memory ranges for tc platform" into integration |
| dd9fae1c | 25-Jan-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert print_errata_status to C
The function is called in a fully initialised C environment and calls into other C functions. The Aarch differences are minimal and are hidden by the
refactor(cpus): convert print_errata_status to C
The function is called in a fully initialised C environment and calls into other C functions. The Aarch differences are minimal and are hidden by the pre-existing headers. Converting it results into cleaner code that is the same across both Aarch64 and Aarch32.
To avoid having to do very ugly pointer arithmetic, define a C struct for the cpu_ops for both Aarch64 and Aarch32.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Idc07c4064e03143c88a4a0e2d10ceda70ba19a50
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| 6bb96fa6 | 27-Jan-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): rename errata_report.h to errata.h
The ERRATA_XXX macros, used in cpu_helpers.S, are necessary for the check_errata_xxx family of functions. The CPU_REV should be used in the cpu fil
refactor(cpus): rename errata_report.h to errata.h
The ERRATA_XXX macros, used in cpu_helpers.S, are necessary for the check_errata_xxx family of functions. The CPU_REV should be used in the cpu files but for whatever reason the values have been hard-coded so far (at the cost of readability). It's evident this file is not strictly for status reporting.
The new purpose of this file is to make it a one-stop-shop for all things errata.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I1ce22dd36df5aa0bcfc5f2772251f91af8703dfb
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| 02552d45 | 02-May-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
feat(fvp): mock support for CCA NV ctr
AEM FVP does not have a third CCA NV counter so the implementation will fake it by returning the Trusted NV counter value when the caller requests the CCA NV c
feat(fvp): mock support for CCA NV ctr
AEM FVP does not have a third CCA NV counter so the implementation will fake it by returning the Trusted NV counter value when the caller requests the CCA NV counter. This allows us to use the CCA CoT on AEM FVP nonetheless.
The FVP platform port now gets its own version of plat_get_nv_ctr() as it now need to diverge from the common implementation provided at the Arm development platforms level.
Change-Id: I3258f837249a539d943d6d783406ba222bd4554e Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| b996db16 | 25-May-2023 |
Juan Pablo Conde <juanpablo.conde@arm.com> |
fix(build): include Cortex-A78AE cpu file for FVP
So far, the FVP platform.mk file did not include the corresponding file for Cortex-A78AE, causing the FVP to hang when executing the plat_reset_hand
fix(build): include Cortex-A78AE cpu file for FVP
So far, the FVP platform.mk file did not include the corresponding file for Cortex-A78AE, causing the FVP to hang when executing the plat_reset_handler function. The file is now included to address the problem and to allow the new CI config for Cortex-A78AE to work properly.
Change-Id: I8dd460831b354d8ca54841d5561df40ff193ee06 Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
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| d5ca76fc | 19-May-2023 |
sahil <sahil@arm.com> |
fix(morello): remove platform specific pwr_domain_suspend wrapper
Turning redistributor off during suspend disables any wakeup interrupts resulting in cpu getting stuck. This patch removes the platf
fix(morello): remove platform specific pwr_domain_suspend wrapper
Turning redistributor off during suspend disables any wakeup interrupts resulting in cpu getting stuck. This patch removes the platform specific psci pwr_domain_suspend handler.
Signed-off-by: sahil <sahil@arm.com> Change-Id: I0a307cc140447e91fd0808fcfb309593f24c14ca
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| c071c5a2 | 19-May-2023 |
sahil <sahil@arm.com> |
fix(n1sdp): remove platform specific pwr_domain_suspend wrapper
Turning redistributor off during suspend disables any wakeup interrupts resulting in cpu getting stuck. This patch removes the platfor
fix(n1sdp): remove platform specific pwr_domain_suspend wrapper
Turning redistributor off during suspend disables any wakeup interrupts resulting in cpu getting stuck. This patch removes the platform specific psci pwr_domain_suspend handler.
Signed-off-by: sahil <sahil@arm.com> Change-Id: Ic2ad5a561be29eee9229a5cc11aa3c9320a51cb7
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| 570a2309 | 05-May-2023 |
Rob Hughes <robert.hughes@arm.com> |
fix(fiptool): move juno plat_fiptool.mk
plat_fiptool.mk files now need to be in tools/fiptool/plat_fiptool/, so this file has been moved to the new location so that it is picked up correctly by the
fix(fiptool): move juno plat_fiptool.mk
plat_fiptool.mk files now need to be in tools/fiptool/plat_fiptool/, so this file has been moved to the new location so that it is picked up correctly by the build system.
Change-Id: Id3596b08bc856362e300f3dfefcaab5d75b4c400 Signed-off-by: Rob Hughes <robert.hughes@arm.com>
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| 493d4223 | 16-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration
* changes: test(tc): unify platform tests traces test(tc): return test failures count for tfm-testsuite
Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration
* changes: test(tc): unify platform tests traces test(tc): return test failures count for tfm-testsuite test(tc): move platform tests in their own function test(tc): centralize platform error handling refactor(tc): define PLATFORM_TESTS for scale
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| 9be6b168 | 10-May-2023 |
J-Alves <joao.alves@arm.com> |
feat: define memory ranges for tc platform
In [1] we missed to update the SPMC manifest for the TC platform, managing OPTEE as an SP.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-
feat: define memory ranges for tc platform
In [1] we missed to update the SPMC manifest for the TC platform, managing OPTEE as an SP.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/20107
Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I68c2e0da6e63216c827f77b5b86afe9f5813e62f
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| 303ef33e | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): unify platform tests traces
Add some traces at the start and end of platform tests. These traces are the same regardless of the set of platform tests we run (NV counter tests / TF-M testsu
test(tc): unify platform tests traces
Add some traces at the start and end of platform tests. These traces are the same regardless of the set of platform tests we run (NV counter tests / TF-M testsuite / future set of tests).
This makes it easier to integrate these tests in the CI because we can now have a unified "expect" script for all platform tests, instead of having one dedicated "expect" script for each possible set of tests.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I5ec30a7a25d8a9a4a90e3338a9789acff7ad4843
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| 26207c2d | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): return test failures count for tfm-testsuite
When running the "tfm-testsuite" set of platform tests, we now count the number of failed tests (in addition to printing a test summary) and re
test(tc): return test failures count for tfm-testsuite
When running the "tfm-testsuite" set of platform tests, we now count the number of failed tests (in addition to printing a test summary) and report that back to the caller, i.e. tc_bl31_common_platform_setup().
This will be useful to consolidate the tests failure reporting code in a subsequent patch.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I8e51f03869f3b2f264b6581b3bd2a53be0198057
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| 4eefbf1b | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): move platform tests in their own function
This is a bit cleaner, as it avoids cluttering the normal boot execution path. It also gives us the opportunity to mark the tests function with th
test(tc): move platform tests in their own function
This is a bit cleaner, as it avoids cluttering the normal boot execution path. It also gives us the opportunity to mark the tests function with the __dead2 attribute, which inform both the compiler and the developer that the test function never returns (since it suspends booting).
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I082a34a840ef791a2ac4c1f59b19b32aeb0a9ec7
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| 57cc12c8 | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): centralize platform error handling
Note that this change only affects the platform tests execution path. It has no impact on the normal boot flow.
Make individual test functions propagate
test(tc): centralize platform error handling
Note that this change only affects the platform tests execution path. It has no impact on the normal boot flow.
Make individual test functions propagate an error code, instead of calling the platform error handler at the point of failure. The latter is now the responsibility of the caller - in this case tc_bl31_common_platform_setup().
Note that right now, tc_bl31_common_platform_setup() does not look at the said error code but this initial change opens up an opportunity to centralize any error handling in tc_bl31_common_platform_setup(), which we will seize in subsequent patches.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: Ib282b64039e0b1ec6e6d29476fbaa2bcd33cb0c7
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| 9d44b2b9 | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(n1sdp): add platform-specific power domain functions" into integration |
| 5bfdb732 | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(morello): add platform-specific power domain functions" into integration |
| e1eef335 | 10-May-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(spmd): fix build error with spmd" into integration |
| fd51b215 | 10-May-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
fix(spmd): fix build error with spmd
Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0' options, this causes a build failure as 'plat_spmd_handle_group0_interrupt' is called irrespective of
fix(spmd): fix build error with spmd
Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0' options, this causes a build failure as 'plat_spmd_handle_group0_interrupt' is called irrespective of 'SPMD_SPM_AT_SEL2' usage in 'spmd_group0_interrupt_handler_nwd'
So make 'plat_spmd_handle_group0_interrupt' dummy implementation available just when spmd is enabled and SPMC_AT_EL3 is disabled.
Change-Id: Iaccd38faab81671c98f9165f318145187dca9bc2 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 3c3ea90c | 10-May-2023 |
Daniel Boulby <daniel.boulby@arm.com> |
build(fpga): reduce cpu_libs to tc and neoverse
Change-Id: I20e88d5e712dafa7364b7932b8b4aaa9051bea55 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> |
| 4bd8c929 | 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I1bfa797e,I0ec7a70e into integration
* changes: fix(tree): correct some typos fix(rockchip): use semicolon instead of comma |