feat(rmmd): enable SME for RMM

This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use

feat(rmmd): enable SME for RMM

This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use FPU or SVE.

The Relevant RMM support can be found here :
https://github.com/TF-RMM/tf-rmm/commit/0ccd7ae58b00

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I3bbdb840e7736dec00b71c85fcec3d5719413ffd

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Merge "fix(spmd): coverity scan issues" into integration

Merge "fix(corstone-1000): add cpu_helpers.S to platform.mk" into integration

fix(spmd): coverity scan issues

Coverity defects fixed by this patch are:
*** CID 400208: Performance inefficiencies (PASS_BY_VALUE)
/include/services/el3_spmd_logical_sp.h: 108 in
ffa_partition_i

fix(spmd): coverity scan issues

Coverity defects fixed by this patch are:
*** CID 400208: Performance inefficiencies (PASS_BY_VALUE)
/include/services/el3_spmd_logical_sp.h: 108 in
ffa_partition_info_regs_get_last_idx()

*** CID 400207: Performance inefficiencies (PASS_BY_VALUE)
/services/std_svc/spmd/spmd_logical_sp.c: 359 in
ffa_partition_info_regs_get_part_info()

Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
Change-Id: I9597377a8ec3d5519995e1619d99ee7102f33939

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Merge "chore: remove MULTI_CONSOLE_API references" into integration

Merge "fix(plat/arm): do not program DSU CLUSTERPWRDN register" into integration

fix(plat/arm): do not program DSU CLUSTERPWRDN register

This reverts commit 9cf7f355ce8984a4cde970d5f57c913d5247ca6d.

Above mentioned commit was writing to cluster power required bit of
CLUSTERPWRD

fix(plat/arm): do not program DSU CLUSTERPWRDN register

This reverts commit 9cf7f355ce8984a4cde970d5f57c913d5247ca6d.

Above mentioned commit was writing to cluster power required bit of
CLUSTERPWRDN register, which provides an advisory status to the power
controller.
Bit definition indication:
0 : Cluster power is not required when all cores are powered down
1 : Cluster power is required even when all cores are powered down
RESET value of this bit is 0

The current implementation in TF-A just programs this bit to 0 when
cluster power down is done but it never sets it to 1. Which actully
does not change any behaviour as the value of this bit always remains 0.

Ideally this bit has to be set to 1 when a core powers up (as RESET
value is 0) and set it to 0 for any core power down except if its last
man standing, in that case we need to ensure the target power level
from OS is cluster then we can do set it to 0.
There also are some investigation needs to be done to find that whether
we need a explicit message to power controller for turning cluster OFF
or it will happen automatically.

Considering this needs a bit of analysis as well as a platform to test
it on, revert the changes which impact the programming during cluster
power down and just keep register defnition.

Change-Id: I4c4ebedae7ca9cd081fb1e0605b9d906d77614d9
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>

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fix(fvp): conditionally increase XLAT and MMAP table entries

The XLAT and MMAP table entries are increased as a part of this
patch: 12fe591 , but this is causing failures for some builds,
so conditi

fix(fvp): conditionally increase XLAT and MMAP table entries

The XLAT and MMAP table entries are increased as a part of this
patch: 12fe591 , but this is causing failures for some builds,
so conditionally increased the XLAT and MMAP table entries

Change-Id: I31e8c811bebc767d7187e045a35c9db0eef13ae0
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(corstone-1000): add cpu_helpers.S to platform.mk

Add Platform related dependency in Makefile

Reviewed-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Signed-off-by: Gauri Sahnan <Gauri.S

fix(corstone-1000): add cpu_helpers.S to platform.mk

Add Platform related dependency in Makefile

Reviewed-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Signed-off-by: Gauri Sahnan <Gauri.Sahnan@arm.com>
Change-Id: Idecb84233d3e0c386bf0b7f6d57cbebd38875f28

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Merge "refactor(arm): avoid setting HASH_PREREQUISITES for a build without ROT_KEY" into integration

chore: remove MULTI_CONSOLE_API references

MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
reference

chore: remove MULTI_CONSOLE_API references

MULTI_CONSOLE_API have been removed long time ago by commit 5b6ebeec9c99
("Remove MULTI_CONSOLE_API flag and references to it") that's why remove
references in platform.mk files and also in one rst which is not valid
anymore.

Change-Id: I45f8e7db0a14ce63de62509100d8159b7aca2657
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(fvp): increase the maximum size of Event Log

To make room for all image measurements using the
RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum
size has been significantly i

fix(fvp): increase the maximum size of Event Log

To make room for all image measurements using the
RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum
size has been significantly increased.

Change-Id: I0b9948dab893e14677bca0afa07167648a6c2729
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(fvp): increase maximum MMAP and XLAT entries count

Maximum entries for MMAP and XLAT have been increased in order to
support the configuration SPM+RME, along with MEASURED_BOOT and
TRUSTED_BOARD

fix(fvp): increase maximum MMAP and XLAT entries count

Maximum entries for MMAP and XLAT have been increased in order to
support the configuration SPM+RME, along with MEASURED_BOOT and
TRUSTED_BOARD_BOOT.

Change-Id: Ic0a0aefecb49d7ccc71357c4bd94e7bd2e5f57c4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "feat(morello): add cpuidle support" into integration

Merge "fix(arm/fpga): enable CPU features required for ARMv9.2 cores" into integration

feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Sig

feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Iaf95867095f0514ec3994b9c9efd9756ed49ef43

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fix(arm/fpga): enable CPU features required for ARMv9.2 cores

Similar to the FVP and QEMU, the Arm FPGA systems come with different
CPU cores, and gain new features over time.

Add a list of ARMv9.2

fix(arm/fpga): enable CPU features required for ARMv9.2 cores

Similar to the FVP and QEMU, the Arm FPGA systems come with different
CPU cores, and gain new features over time.

Add a list of ARMv9.2 features that require TF-A enablement to be usable
from non-secure world. Their existence will be detected at runtime, so
supporting all those features is not required for using the build.

This fixes the Linux kernel booting on a ARMv9.2 FPGA core.

Change-Id: Ie93c32b13ce4f9968081bf38296cd45edad0a928
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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refactor(arm): avoid setting HASH_PREREQUISITES for a build without ROT_KEY

In the absence of ROT_KEY option, there is no need to populate
HASH_PREREQUISITES as the build system uses the hash file s

refactor(arm): avoid setting HASH_PREREQUISITES for a build without ROT_KEY

In the absence of ROT_KEY option, there is no need to populate
HASH_PREREQUISITES as the build system uses the hash file specified by
ARM_ROTPK_HASH directly.

Change-Id: Ib08f53b182b8446bbc430f2608471c7dfdc0e58c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(cpus): add support for Nevis CPU

Adding basic CPU library code to support Nevis CPU

Change-Id: I399cc9b7b2d907b02b76ea2a3e5abb54e28fbf6c
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.co

feat(cpus): add support for Nevis CPU

Adding basic CPU library code to support Nevis CPU

Change-Id: I399cc9b7b2d907b02b76ea2a3e5abb54e28fbf6c
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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build(bl32): added check for AARCH32_SP

If AACRH32_SP is not specified, it causes the DEFAULT_LINKER_SCRIPT
variable to be empty, and then the linker takes the variable following
it as if it was the

build(bl32): added check for AARCH32_SP

If AACRH32_SP is not specified, it causes the DEFAULT_LINKER_SCRIPT
variable to be empty, and then the linker takes the variable following
it as if it was the linker script, which is not one. This patch
addresses that issue by requiring the AARCH32_SP variable to be set
before continuing.

Change-Id: I21db7d5bd86b98faaa1a1cd3f985daa592556a2d
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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build(juno): added error check for BL32 dependency

Macro PLAT_ARM_MAX_BL32_SIZE definition is dependent on
JUNO_AARCH32_EL3_RUNTIME=1. When this value is not set and building
for AArch32, the build

build(juno): added error check for BL32 dependency

Macro PLAT_ARM_MAX_BL32_SIZE definition is dependent on
JUNO_AARCH32_EL3_RUNTIME=1. When this value is not set and building
for AArch32, the build fails as it cannot find the definition of the
first macro. With this patch, the problem is addressed by producing
an error when the dependency is not set properly.

Change-Id: Ibe4e976bf79892fd26f3b266bd546218f5616825
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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Merge "feat(cpus): add support for Gelas CPU" into integration

Merge changes from topic "el3_direct_msg" into integration

* changes:
docs(spm): document new build option
feat(fvp): spmd logical partition smc handler
feat(fvp): add spmd logical partition

Merge changes from topic "el3_direct_msg" into integration

* changes:
docs(spm): document new build option
feat(fvp): spmd logical partition smc handler
feat(fvp): add spmd logical partition
feat(spmd): get logical partitions info
feat(spmd): add partition info get regs
refactor(ff-a): move structure definitions
feat(spmd): el3 direct message API
feat(spmd): add spmd logical partitions

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feat(fvp): spmd logical partition smc handler

This patch adds a basic el3 spmd logical partition to the fvp platform
via a platform specific smc handler. One of the use cases for el3
logical partiti

feat(fvp): spmd logical partition smc handler

This patch adds a basic el3 spmd logical partition to the fvp platform
via a platform specific smc handler. One of the use cases for el3
logical partitions is to have the ability to translate sip calls into
ff-a direct requests via the use of spmd logical partitions. The smc
handler creates a direct request based on the incoming smc parameters
and forwards the call as a direct request from the spmd logical
partition to the target secure partition.

Change-Id: If8ba9aab8203924bd00fc1dcdf9cd05a9a04a147

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feat(fvp): add spmd logical partition

This patch changes spmd.mk to include one or more SPMD logical
partitions specific to a platform. It also adds a basic SPMD logical
partition to fvp.

Change-Id

feat(fvp): add spmd logical partition

This patch changes spmd.mk to include one or more SPMD logical
partitions specific to a platform. It also adds a basic SPMD logical
partition to fvp.

Change-Id: I2075e0458c92813913b28cbf4cfffc1f151e65cf
Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>

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