Merge "feat(tc): introduce TC2 platform" into integration
feat(tc): introduce TC2 platformAdded a platform support to use tc2 specific CPU cores.Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>Change-Id: Ib76d440e358e9bd1cf80aec5b8591f7a6e4
feat(tc): introduce TC2 platformAdded a platform support to use tc2 specific CPU cores.Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>Change-Id: Ib76d440e358e9bd1cf80aec5b8591f7a6e47ecbd
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fix(tc): tc2 bl1 start address shifted by one pageChange [1] is specific to TC2 model and breaks former TC0/TC1 testconfigs.BL1 start address is 0x0 on TC0/TC1 and 0x1000 from TC2 onwards.Fix by
fix(tc): tc2 bl1 start address shifted by one pageChange [1] is specific to TC2 model and breaks former TC0/TC1 testconfigs.BL1 start address is 0x0 on TC0/TC1 and 0x1000 from TC2 onwards.Fix by adding conditional defines depending on TARGET_PLATFORM buildflag.[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/15917Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>Change-Id: I51f77e6a61ca8eaa6871c19cabe9deb1288f5a9d
feat(tc): move start address for BL1 to 0x1000Locate BL1 at 0x1000 to compensate for the MCUBootheader size.Signed-off-by: Anders Dellien <anders.dellien@arm.com>Change-Id: I30a5ccf8212786479bf
feat(tc): move start address for BL1 to 0x1000Locate BL1 at 0x1000 to compensate for the MCUBootheader size.Signed-off-by: Anders Dellien <anders.dellien@arm.com>Change-Id: I30a5ccf8212786479bff8286f3d0abb9dec4b7d0
feat(tc): enable tracingTotal Compute has ETE and TRBE tracing components and they haveto be enabled to capture the execution trace of the processor.Signed-off-by: Davidson K <davidson.kumaresan
feat(tc): enable tracingTotal Compute has ETE and TRBE tracing components and they haveto be enabled to capture the execution trace of the processor.Signed-off-by: Davidson K <davidson.kumaresan@arm.com>Change-Id: I3c86c11be2c655a61ecefa3eb2e4e3951577a113
feat(tc0): add Ivy partitionSigned-off-by: Olivier Deprez <olivier.deprez@arm.com>Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>Change-Id: Ie9d6a77722b2350c8479ecf7b0df701428e4d
feat(tc0): add Ivy partitionSigned-off-by: Olivier Deprez <olivier.deprez@arm.com>Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>Change-Id: Ie9d6a77722b2350c8479ecf7b0df701428e4da73
feat(tc): enable MPMMThis change enables MPMM and adds, to the TC firmware configurationdevice tree, the AMU counters representing the "gears" for theMaximum Power Mitigation Mechanism feature of
feat(tc): enable MPMMThis change enables MPMM and adds, to the TC firmware configurationdevice tree, the AMU counters representing the "gears" for theMaximum Power Mitigation Mechanism feature of the Cortex-X2,Cortex-A710 and Cortex-A510:- Gear 0: throttle medium and high bandwidth vector and viruses.- Gear 1: throttle high bandwidth vector and viruses.- Gear 2: throttle power viruses only.This ensures these counters are enabled and context-switched asexpected.Change-Id: I6df6e0fe3a5362861aa967a78ab7c34fc4bb8fc3Signed-off-by: Chris Kay <chris.kay@arm.com>
build(fdt-wrappers): introduce FDT wrappers makefileThis has been introduced to simplify dependencies on the FDT wrappers.We generally want to avoid pulling in components on a file-by-filebasis,
build(fdt-wrappers): introduce FDT wrappers makefileThis has been introduced to simplify dependencies on the FDT wrappers.We generally want to avoid pulling in components on a file-by-filebasis, particularly as we are trying to draw conceptual boxes aroundcomponents in preparation for transitioning the build system to CMake,where dependencies are modelled on libraries rather than files.Signed-off-by: Chris Kay <chris.kay@arm.com>Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5
feat(plat/arm): Add DRAM2 to TZC non-secure regionThis allows to increase the total DRAM to 8GB.Signed-off-by: Usama Arif <usama.arif@arm.com>Change-Id: I6daaed9a0b7a11d665b2f56e6432a1ef87bfaa38
refactor(tc): use internal trusted storageTrusted Services had removed secure storage and added two newtrusted services - Protected Storage and Internal Trusted Storage.Hence we are removing secu
refactor(tc): use internal trusted storageTrusted Services had removed secure storage and added two newtrusted services - Protected Storage and Internal Trusted Storage.Hence we are removing secure storage and adding support for theinternal trusted storage.And enable external SP images in BL2 config for TC, so thatwe do not have to modify this file whenever the list of SPschanges. It is already implemented for fvp in the below commit.commit 33993a3737737a03ee5a9d386d0a027bdc947c9cAuthor: Balint Dobszay <balint.dobszay@arm.com>Date: Fri Mar 26 15:19:11 2021 +0100 feat(fvp): enable external SP images in BL2 configChange-Id: I3e0a0973df3644413ca5c3a32f36d44c8efd49c7Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
feat(tc): Enable SVE for both secure and non-secure worldSigned-off-by: Usama Arif <usama.arif@arm.com>Change-Id: I0ae8a6ea3245373a17af76c9b7dc3f38f3711091
feat(tc): populate HW_CONFIG in BL31BL2 passes FW_CONFIG to BL31 which contains informationabout different DTBs present. BL31 then uses FW_CONFIGto get the base address of HW_CONFIG and populate
feat(tc): populate HW_CONFIG in BL31BL2 passes FW_CONFIG to BL31 which contains informationabout different DTBs present. BL31 then uses FW_CONFIGto get the base address of HW_CONFIG and populate fconf.Signed-off-by: Usama Arif <usama.arif@arm.com>Change-Id: I0b4fc83e6e0a0b9401f692516654eb9a3b037616
feat(plat/arm): Introduce TC1 platformThis renames tc0 platform folder and files to tc, and introducesTARGET_PLATFORM variable to account for the differences betweenTC0 and TC1.Signed-off-by: U
feat(plat/arm): Introduce TC1 platformThis renames tc0 platform folder and files to tc, and introducesTARGET_PLATFORM variable to account for the differences betweenTC0 and TC1.Signed-off-by: Usama Arif <usama.arif@arm.com>Change-Id: I5b4a83f3453afd12542267091b3edab4c139c5cd
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