fix(fvp): update the memory size allocated to optee at EL1

Update the memory size allocated to optee at EL1 to 0xd80000 to match
the size specified by mem-size in optee manifest.

Change-Id: I6826a5

fix(fvp): update the memory size allocated to optee at EL1

Update the memory size allocated to optee at EL1 to 0xd80000 to match
the size specified by mem-size in optee manifest.

Change-Id: I6826a56d0f68a6a2b5181f849a741a9bf1f0829b
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): add DRAM memory regions that linux kernel can share

The memory regions that Linux kernel can share including TX/RX buffers
encompass the entire DRAM. Update it accordingly. Without this,
w

fix(fvp): add DRAM memory regions that linux kernel can share

The memory regions that Linux kernel can share including TX/RX buffers
encompass the entire DRAM. Update it accordingly. Without this,
when the Linux kernel call FFA_RXTX_MAP, it fails sometime and the
below error from the secure world appears:

| ERROR: arch_other_world_vm_configure_rxtx_map: send page is invalid
| (expected 0x87, got 0x7c)

Change-Id: Idb40907af2e0c1d4e60979b4948db2fc70971145
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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feat(fvp): update FF-A version to v1.1 supported by optee

OPTEE now supports FF-A v1.1, lets us bump the FF-A version in the
OPTEE FF-A manifest.

Change-Id: Ia51cbe1af619895945240004a4163a4c4bda2ee

feat(fvp): update FF-A version to v1.1 supported by optee

OPTEE now supports FF-A v1.1, lets us bump the FF-A version in the
OPTEE FF-A manifest.

Change-Id: Ia51cbe1af619895945240004a4163a4c4bda2ee5
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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feat(fvp): replace managed-exit with ns-interrupts-action

Commit 10b292e64933 ("docs(spm): update FF-A manifest binding")
deprecated managed-exit in favor of newly added mandatory
ns-interrupts-acti

feat(fvp): replace managed-exit with ns-interrupts-action

Commit 10b292e64933 ("docs(spm): update FF-A manifest binding")
deprecated managed-exit in favor of newly added mandatory
ns-interrupts-action attribute. Replace managed-exit with
ns-interrupts-action before it becomes obsolete.

Change-Id: I9b55f6c55af3510260a9c5a01755a9b66d75823e
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): add optee specific mem-size attribute

Without the mem-size attribute, the OPTEE boot panics with below
error:
| get_sec_mem_from_manifest:1594 Can't read "mem-size" from FF-A
| man

fix(fvp): add optee specific mem-size attribute

Without the mem-size attribute, the OPTEE boot panics with below
error:
| get_sec_mem_from_manifest:1594 Can't read "mem-size" from FF-A
| manifest at 0x6281000: error -1
| Panic at core/arch/arm/kernel/boot.c:1596 <get_sec_mem_from_manifest>
| TEE load address @ 0x6284000
| Call stack:
| 0x0628c7fc
| 0x06298788
| 0x0628c480

Adding the mem-size attribute fixes the boot. This is OPTEE specific
extension.

Change-Id: I2801c8b4a89cffafff14c788319ad106b03ffef0
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): fix the FF-A optee manifest by adding the boot info node

Without the FF-A manifest boot info node, the OPTEE boot as S-EL1 VM
crashes currently with the below error:
| WARNING: Stage-2

fix(fvp): fix the FF-A optee manifest by adding the boot info node

Without the FF-A manifest boot info node, the OPTEE boot as S-EL1 VM
crashes currently with the below error:
| WARNING: Stage-2 page fault: pc=0x628c41c, vmid=0x8001, vcpu=0,
| vaddr=0xd00000, ipaddr=0xd00000, mode=0x1 0x7c
| NOTICE: Injecting Data Abort exception into VM 0x8001.

Adding the boot info node fixes the OPTEE boot.

While at it, also update copyright year in the file.

Change-Id: I1fd0bf4e38bb95deedc74fa04d1e6bb057424c04
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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Merge "refactor(tc): use the example CCA platform token from iat-verifier" into integration

refactor(tc): use the example CCA platform token from iat-verifier

In [1], the example CCA platform token has been updated to fix a small
problem with the description of one of the software componen

refactor(tc): use the example CCA platform token from iat-verifier

In [1], the example CCA platform token has been updated to fix a small
problem with the description of one of the software components, and to
provide a more realistic breakdown of the expected components in the CCA
TCB.

This change replaces the static CCA platform token in the Total Compute
platform.

[1] https://review.trustedfirmware.org/c/TF-M/tf-m-tools/+/28493

Change-Id: I792e693cc994fc1e856f713fd97bac4930b28e1e
Signed-off-by: Thomas Fossati <thomas.fossati@linaro.org>

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feat(fvp): add cpu power control

Most newer CPU's have DSU and CPU power control core-off bit which
means before turning off CPUs from base power controller we need to
turn individual cores off from

feat(fvp): add cpu power control

Most newer CPU's have DSU and CPU power control core-off bit which
means before turning off CPUs from base power controller we need to
turn individual cores off from CPU Power control.

However there are certain older CPU's that don't have DSU and
don't support CPUPWRCTRL_EL1, so populate them as a list
and ignore setting core-off bit for those older CPU's as all newer
CPU's have them.

Note: unfortunately there is no mechanism to identify if a DSU is
present and CPUPWRCTRL_EL1 is supported through any CPU control
registers and CPUPWRCTRL_EL1 is supported only for ARM64 platforms
and not available in ARM32 platforms.

Change-Id: Iba6c3c8db60dbeb177cead7ebc65df8265860da7
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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refactor(fvp): add CoT desc dtsi

Adding CoT descriptor dtsi file to streamline fvp_tb_fw_config DTB file.

Change-Id: I0bbaef764b100ed0e749ec5f0c78a366398b3519
Signed-off-by: Lauren Wehrmeister <lau

refactor(fvp): add CoT desc dtsi

Adding CoT descriptor dtsi file to streamline fvp_tb_fw_config DTB file.

Change-Id: I0bbaef764b100ed0e749ec5f0c78a366398b3519
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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feat(fvp): add Dualroot CoT in DTB support

Adding support for Dualroot CoT in DTB. This makes it possible for BL2
to retrieve its chain of trust description from a configuration file in
DTB format.

feat(fvp): add Dualroot CoT in DTB support

Adding support for Dualroot CoT in DTB. This makes it possible for BL2
to retrieve its chain of trust description from a configuration file in
DTB format. With this, the CoT description may be updated without
rebuilding BL2 image.

This feature can be enabled by building BL2 with COT_DESC_IN_DTB=1 and
COT=dualroot. The default behavior remains to embed the CoT description
into BL2 image.

Change-Id: I343931b145aa8a53b0a5d4b8aefb273ffb5a9163
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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feat(gpt): add support for large GPT mappings

This patch adds support for large GPT mappings using
Contiguous descriptors. The maximum size of supported
contiguous block in MB is defined in RME_GPT_

feat(gpt): add support for large GPT mappings

This patch adds support for large GPT mappings using
Contiguous descriptors. The maximum size of supported
contiguous block in MB is defined in RME_GPT_MAX_BLOCK
build parameter and takes values 0, 2, 32 and 512 and
by default set to 2 in make_helpers/defaults.mk.
Setting RME_GPT_MAX_BLOCK value to 0 disables use of
Contiguous descriptors.
Function gpt_tlbi_by_pa_ll() and its declaration
are removed from lib/aarch64/misc_helpers.S and
include/arch/aarch64/arch_helpers.h, because the
GPT library now uses tlbirpalos_xxx() functions.

Change-Id: Ia9a59bde1741c5666b4ca1de9324e6dfd6f734eb
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>

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fix(fvp): added ranges for linux

This extends the SPM's NS ranges for linux to do
the RXTX map.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I99b4f2c0355edb88be2484b445b97701e166cbfd

chore: rename hermes to neoverse-n3

Rename hermes cpu to Neoverse-N3

Change-Id: I912d4c824c5004a8c1909c68fef77f1f5e202b8a
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(fvp): move cpus with nomodel

Move CPUs which are not tested in CI under a new build option.
We have added some CPUs for which there is no FVP models available
yet to test. Move those CPUs u

refactor(fvp): move cpus with nomodel

Move CPUs which are not tested in CI under a new build option.
We have added some CPUs for which there is no FVP models available
yet to test. Move those CPUs under a new FVP build option.

Change-Id: I3da12d2f8d9c246b435b31adfac61c79dc1ab0cb
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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build(fvp): make all builds unconditional

commit@138221c2457b9d04101b84084c07d576b0eb5a51 reduced items that
should be build due to SRAM size limitations.

But newer models from 11.19 onwards suppor

build(fvp): make all builds unconditional

commit@138221c2457b9d04101b84084c07d576b0eb5a51 reduced items that
should be build due to SRAM size limitations.

But newer models from 11.19 onwards support to set SRAM size greater
than 256KB. So remove all dependency and conditional builds for FVP.

Change-Id: I38684e100450b74fdda0d685775e2cbce92170b6
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge changes from topic "rss_rse_rename" into integration

* changes:
refactor(changelog): change all occurrences of RSS to RSE
refactor(qemu): change all occurrences of RSS to RSE
refactor(fv

Merge changes from topic "rss_rse_rename" into integration

* changes:
refactor(changelog): change all occurrences of RSS to RSE
refactor(qemu): change all occurrences of RSS to RSE
refactor(fvp): change all occurrences of RSS to RSE
refactor(fiptool): change all occurrences of RSS to RSE
refactor(psa): change all occurrences of RSS to RSE
refactor(fvp): remove leftovers from rss measured boot support
refactor(tc): change all occurrences of RSS to RSE
docs: change all occurrences of RSS to RSE
refactor(measured-boot): change all occurrences of RSS to RSE
refactor(rse): change all occurrences of RSS to RSE
refactor(psa): rename all 'rss' files to 'rse'
refactor(tc): rename all 'rss' files to 'rse'
docs: rename all 'rss' files to 'rse'
refactor(measured-boot): rename all 'rss' files to 'rse'
refactor(rss): rename all 'rss' files to 'rse'

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feat(arm): support FW handoff b/w BL1 & BL2

Leverage the framework between BL1 and BL2. Migrate all handoff
structures to the TL.

Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb
Signed-off-by:

feat(arm): support FW handoff b/w BL1 & BL2

Leverage the framework between BL1 and BL2. Migrate all handoff
structures to the TL.

Change-Id: I79ff3a319596b5656184cde10b5204b10a4d03bb
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(arm): support FW handoff b/w BL2 & BL31

Add support for the firmware handoff framework between BL2 and BL31.
Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes
in recent m

feat(arm): support FW handoff b/w BL2 & BL31

Add support for the firmware handoff framework between BL2 and BL31.
Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes
in recent models. Load the HW_CONFIG as a TE along with entry point
parameters for BL31 execution.

Change-Id: I7c4c6e8353ca978a13520fb3e15fb2803f0f1d0e
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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refactor(fvp): change all occurrences of RSS to RSE

Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id

refactor(fvp): change all occurrences of RSS to RSE

Changes all occurrences of "RSS" and "rss" in the code and build files
to "RSE" and "rse".

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I36b8e498f3226fc72d21634aae2cc9328d00711d

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refactor(fvp): remove leftovers from rss measured boot support

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I1687327e028c2baec1ac6f0ae21b42b6047ceac0

fix(spm): add device-regions used in tf-a-tests

Device memory region specified in an SP manifest are now validated
against the device memory defined in the SPMC manifest. Therefore
we need to add th

fix(spm): add device-regions used in tf-a-tests

Device memory region specified in an SP manifest are now validated
against the device memory defined in the SPMC manifest. Therefore
we need to add the device memory used in the tf-a-tests to the SPMC
manifests.

Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: I47376e67c700705d12338d7078292618a15d5546

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fix: static checks on spmc dts

Change the header of the license to have 2024, and
replace spaces for a tab.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: If98161ad35e1ead30e1e0d3ddb4cc6348

fix: static checks on spmc dts

Change the header of the license to have 2024, and
replace spaces for a tab.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: If98161ad35e1ead30e1e0d3ddb4cc6348e83d6ee

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Merge changes from topic "lto-fixes" into integration

* changes:
fix(bl1): add missing `__RW_{START,END}__` symbols
fix(fvp): don't check MPIDRs with the power controller in BL1
fix(arm): only

Merge changes from topic "lto-fixes" into integration

* changes:
fix(bl1): add missing `__RW_{START,END}__` symbols
fix(fvp): don't check MPIDRs with the power controller in BL1
fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2
fix(cm): hide `cm_init_context_by_index` from BL1
fix(bl1): add missing spinlock dependency

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Merge changes from topic "hm/handoff" into integration

* changes:
refactor(fvp): reduce max size of HW_CONFIG to 16KB
refactor(arm): replace hard-coded HW_CONFIG DT size