History log of /rk3399_ARM-atf/plat/arm/board/fvp/platform.mk (Results 301 – 325 of 543)
Revision Date Author Comments
# 88c51c3f 08-Jan-2022 Manish V Badarkhe <Manish.Badarkhe@arm.com>

refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot

As Measured-Boot and Trusted-Boot are orthogonal, removed
Trusted-Boot's dependency on Measured-Boot by allowing them
to apply the Crypt

refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot

As Measured-Boot and Trusted-Boot are orthogonal, removed
Trusted-Boot's dependency on Measured-Boot by allowing them
to apply the Crypto module changes independently using the
CRYPTO_SUPPORT build flag.

Change-Id: I5a420e5d84f3fefe0c0092d822dab981e6390bbf
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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# c2d75fa7 22-Dec-2021 Bipin Ravi <bipin.ravi@arm.com>

Merge "fix(errata): workaround for Cortex X2 erratum 2083908" into integration


# 1db6cd60 01-Dec-2021 johpow01 <john.powell@arm.com>

fix(errata): workaround for Cortex X2 erratum 2083908

Cortex X2 erratum 2083908 is a Cat B erratum present in the Cortex
X2 core. It applies to revision r2p0 and is still open.

SDEN can be found he

fix(errata): workaround for Cortex X2 erratum 2083908

Cortex X2 erratum 2083908 is a Cat B erratum present in the Cortex
X2 core. It applies to revision r2p0 and is still open.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775100

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Id9dca2b042bf48e75fb3013ab37d1c5925824728

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# e33ca7b4 29-Oct-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "ck/mpmm" into integration

* changes:
docs(maintainers): add Chris Kay to AMU and MPMM
feat(tc): enable MPMM
feat(mpmm): add support for MPMM
feat(amu): enable per-c

Merge changes from topic "ck/mpmm" into integration

* changes:
docs(maintainers): add Chris Kay to AMU and MPMM
feat(tc): enable MPMM
feat(mpmm): add support for MPMM
feat(amu): enable per-core AMU auxiliary counters
docs(amu): add AMU documentation
refactor(amu): refactor enablement and context switching
refactor(amu): detect auxiliary counters at runtime
refactor(amu): detect architected counters at runtime
refactor(amu): conditionally compile auxiliary counter support
refactor(amu): factor out register accesses
refactor(amu)!: privatize unused AMU APIs
refactor(amu)!: remove `PLAT_AMU_GROUP1_COUNTERS_MASK`
build(amu): introduce `amu.mk`
build(fconf)!: clean up source collection
feat(fdt-wrappers): add CPU enumeration utility function
build(fdt-wrappers): introduce FDT wrappers makefile
build(bl2): deduplicate sources
build(bl1): deduplicate sources

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# 1fa05dab 28-Sep-2021 Chris Kay <chris.kay@arm.com>

build(fdt-wrappers): introduce FDT wrappers makefile

This has been introduced to simplify dependencies on the FDT wrappers.
We generally want to avoid pulling in components on a file-by-file
basis,

build(fdt-wrappers): introduce FDT wrappers makefile

This has been introduced to simplify dependencies on the FDT wrappers.
We generally want to avoid pulling in components on a file-by-file
basis, particularly as we are trying to draw conceptual boxes around
components in preparation for transitioning the build system to CMake,
where dependencies are modelled on libraries rather than files.

Signed-off-by: Chris Kay <chris.kay@arm.com>
Change-Id: Idb7ee05a9b54a8caa3e07f36e608867e20b6dcd5

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# 53602a13 21-Oct-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(cpu): correct Demeter CPU name" into integration


# 4cb576a0 15-Oct-2021 johpow01 <john.powell@arm.com>

fix(cpu): correct Demeter CPU name

This patch changes Cortex Demeter to Neoverse Demeter.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7306d09ca60e101d0a96c9ceff9845422d75c160


# e86162aa 20-Oct-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "feat(cpu): add support for Hunter CPU" into integration


# fb9e5f7b 19-Aug-2021 johpow01 <john.powell@arm.com>

feat(cpu): add support for Hunter CPU

This patch adds the basic CPU library code to support the Hunter CPU
in TF-A. This CPU is based on the Makalu core so that library code
was adapted as the basis

feat(cpu): add support for Hunter CPU

This patch adds the basic CPU library code to support the Hunter CPU
in TF-A. This CPU is based on the Makalu core so that library code
was adapted as the basis for this patch.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I956b2dc0f43da7cec3e015252392e2694363e1b3

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# fa1e0167 13-Oct-2021 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge changes from topic "refactor-mb" into integration

* changes:
docs(measured boot): add measured boot platform functions
refactor(measured boot): make measurement strings compliant with SBSG

Merge changes from topic "refactor-mb" into integration

* changes:
docs(measured boot): add measured boot platform functions
refactor(measured boot): make measurement strings compliant with SBSG
feat(plat/fvp): pass Event Log addr and size from BL1 to BL2
feat(measured_boot): update tb_fw_config with event log properties
feat(measured_boot): image hash measurement and recording in BL1
refactor(measured boot): remove platform calls from Event Log driver
refactor(measured_boot): remove passing of BL2 hash via device tree
refactor(measured boot): move BL2 measurement to platform layer
refactor(measured boot): rename add_event2()
refactor(measured boot): move image measurement to generic layer
build(measured boot): rename measured boot makefile
feat(measured boot): move init and teardown functions to platform layer
refactor(measured boot): rename tpm_record_measurement()

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# 48ba0345 14-Sep-2021 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(measured_boot): image hash measurement and recording in BL1

It looks safer and cleaner approach to record the measurement taken by
BL1 straightaway in TCG Event Log instead of deferring these r

feat(measured_boot): image hash measurement and recording in BL1

It looks safer and cleaner approach to record the measurement taken by
BL1 straightaway in TCG Event Log instead of deferring these recordings
to BL2.
Hence pull in the full-fledged measured boot driver into BL1 that
replaces the former ad-hoc platform interfaces i.e.
bl1_plat_set_bl2_hash, bl2_plat_get_hash.

As a result of this change the BL1 of Arm FVP platform now do the
measurements and recordings of below images:
1. FW_CONFIG
2. TB_FW_CONFIG
3. BL2

Change-Id: I798c20336308b5e91b547da4f8ed57c24d490731
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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# 1d651211 06-Oct-2021 Soby Mathew <soby.mathew@arm.com>

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme): add build and run instructions for FEAT_RME
fix(plat/fvp): bump BL2 stack size
fix(plat/fvp): allow changing the kernel DTB load address
refactor(plat/arm): rename ARM_DTB_DRAM_NS region macros
refactor(plat/fvp): update FVP platform DTS for FEAT_RME
feat(plat/arm): add GPT initialization code for Arm platforms
feat(plat/fvp): add memory map for FVP platform for FEAT_RME
refactor(plat/arm): modify memory region attributes to account for FEAT_RME
feat(plat/fvp): add RMM image support for FVP platform
feat(rme): add GPT Library
feat(rme): add ENABLE_RME build option and support for RMM image
refactor(makefile): remove BL prefixes in build macros
feat(rme): add context management changes for FEAT_RME
feat(rme): add Test Realm Payload (TRP)
feat(rme): add RMM dispatcher (RMMD)
feat(rme): run BL2 in root world when FEAT_RME is enabled
feat(rme): add xlat table library changes for FEAT_RME
feat(rme): add Realm security state definition
feat(rme): add register definitions and helper functions for FEAT_RME

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# 9d870b79 11-Jul-2021 Zelalem Aweke <zelalem.aweke@arm.com>

feat(plat/fvp): add RMM image support for FVP platform

This patch adds the necessary changes needed to build
and load RMM image for the FVP platform. RMM image is
loaded by BL2 after BL32 (if BL32 e

feat(plat/fvp): add RMM image support for FVP platform

This patch adds the necessary changes needed to build
and load RMM image for the FVP platform. RMM image is
loaded by BL2 after BL32 (if BL32 exists) and before BL33.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I1ac9eade84c2e35c7479a322ca1d090b4e626819

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# fe82bcc0 30-Sep-2021 Bipin Ravi <bipin.ravi@arm.com>

Merge "feat(cpu): add support for Hayes CPU" into integration


# 7bd8dfb8 19-Aug-2021 johpow01 <john.powell@arm.com>

feat(cpu): add support for Hayes CPU

This patch adds the basic CPU library code to support the Hayes CPU
in TF-A. This CPU is based on the Klein core so that library code
has been adapted for use he

feat(cpu): add support for Hayes CPU

This patch adds the basic CPU library code to support the Hayes CPU
in TF-A. This CPU is based on the Klein core so that library code
has been adapted for use here.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If0e0070cfa77fee8f6eebfee13d3c4f209ad84fc

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# b3210f4d 17-Sep-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "TrcDbgExt" into integration

* changes:
feat(plat/fvp): enable trace extension features by default
feat(trf): enable trace filter control register access from lower NS E

Merge changes from topic "TrcDbgExt" into integration

* changes:
feat(plat/fvp): enable trace extension features by default
feat(trf): enable trace filter control register access from lower NS EL
feat(trf): initialize trap settings of trace filter control registers access
feat(sys_reg_trace): enable trace system registers access from lower NS ELs
feat(sys_reg_trace): initialize trap settings of trace system registers access
feat(trbe): enable access to trace buffer control registers from lower NS EL
feat(trbe): initialize trap settings of trace buffer control registers access

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# cd3f0ae6 24-Aug-2021 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(plat/fvp): enable trace extension features by default

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I3e344b0abda7ab4e54ee918ec65ff39d40855fcd


# 6657c1e3 25-Aug-2021 Joanna Farley <joanna.farley@arm.com>

Merge "cpu: add support for Demeter CPU" into integration


# f4616efa 07-Jul-2021 johpow01 <john.powell@arm.com>

cpu: add support for Demeter CPU

This patch adds the basic CPU library code to support the Demeter
CPU. This CPU is based on the Makalu-ELP core so that CPU lib code
was adapted to create this patc

cpu: add support for Demeter CPU

This patch adds the basic CPU library code to support the Demeter
CPU. This CPU is based on the Makalu-ELP core so that CPU lib code
was adapted to create this patch.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ib5740b748008a72788c557f0654d8d5e9ec0bb7f

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# 2ea8d419 28-May-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix: rename Matterhorn, Matterhorn ELP, and Klein CPUs" into integration


# c6ac4df6 18-May-2021 johpow01 <john.powell@arm.com>

fix: rename Matterhorn, Matterhorn ELP, and Klein CPUs

This patch renames the Matterhorn, Matterhorn ELP, and Klein CPUs to
Cortex A710, Cortex X2, and Cortex A510 respectively.

Signed-off-by: John

fix: rename Matterhorn, Matterhorn ELP, and Klein CPUs

This patch renames the Matterhorn, Matterhorn ELP, and Klein CPUs to
Cortex A710, Cortex X2, and Cortex A510 respectively.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I056d3114210db71c2840a24562b51caf2546e195

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# dfe64665 21-Apr-2021 bipin.ravi <bipin.ravi@arm.com>

Merge "Add "_arm" suffix to Makalu ELP CPU lib" into integration


# 97bc7f0d 20-Apr-2021 johpow01 <john.powell@arm.com>

Add "_arm" suffix to Makalu ELP CPU lib

ELP processors can sometimes have different MIDR values or features so
we are adding the "_arm" suffix to differentiate the reference
implementation from othe

Add "_arm" suffix to Makalu ELP CPU lib

ELP processors can sometimes have different MIDR values or features so
we are adding the "_arm" suffix to differentiate the reference
implementation from other future versions.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ieea444288587c7c18a397d279ee4b22b7ad79e20

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# 045b209c 06-Apr-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "Add Cortex_A78C CPU lib" into integration


# 0a144dd4 16-Mar-2021 Bipin Ravi <bipin.ravi@arm.com>

Add Cortex_A78C CPU lib

Add basic support for Cortex_A78C CPU.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Id9e41cbe0580a68c6412d194a5ee67940e8dae56


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