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92dd0df7 |
| 14-Aug-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topics "amd_scmi_in_nopm", "amd_versal2_custom_sip" into integration
* changes: feat(versal2): add hooks for mmap and early setup refactor(versal2): add tfa_no_pm flag for scmi
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| #
4efae6ab |
| 04-Jul-2025 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(versal2): add hooks for mmap and early setup
Add early setup hooks through custom_early_setup() and provide a mechanism to support custom memory mapping, including the extension of the memory m
feat(versal2): add hooks for mmap and early setup
Add early setup hooks through custom_early_setup() and provide a mechanism to support custom memory mapping, including the extension of the memory map via custom_mmap_add(). This change may also require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros. These can be defined within the custom_pkg.mk makefile as follows:
MAX_MMAP_REGIONS := XY $(eval $(call add_define,MAX_MMAP_REGIONS)) MAX_XLAT_TABLES := XZ $(eval $(call add_define,MAX_XLAT_TABLES))
If PLATFORM_STACK_SIZE is not already defined, a default value should be used. This allows for configurability of the stack size across different interfaces, such as custom packages. The custom_early_setup() function enables early low-level operations to bring the system into a correct state. Support for a custom SiP service is also added. A basic implementation of custom_smc_handler() is provided by the platform, while the actual definition is expected to be supplied by the custom package. This feature is designed for use by external libraries, such as those that require status checking. This code introduces a generic framework for integrating custom logic via the $(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including optional support for custom SMC functionality, which is determined by the custom package.
Change-Id: I40281acf2dc48be43471b8642e2ab1a93b1cf8f6 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| #
49d02511 |
| 21-Feb-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "versal2-pm-support" into integration
* changes: feat(versal2): extended SMCCC payload for EEMI feat(versal2): add support for platform management feat(versal2): add d
Merge changes from topic "versal2-pm-support" into integration
* changes: feat(versal2): extended SMCCC payload for EEMI feat(versal2): add support for platform management feat(versal2): add dependency macro for PM
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| #
414cf08b |
| 20-Feb-2025 |
Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com> |
feat(versal2): add support for platform management
Add support for PM functionality through EEMI interface for Versal Gen 2. Add support of PM APIs in PSCI ops. Add TFA_NO_PM flag to disable PM func
feat(versal2): add support for platform management
Add support for PM functionality through EEMI interface for Versal Gen 2. Add support of PM APIs in PSCI ops. Add TFA_NO_PM flag to disable PM functionality. Enable wakeup for new peripherals
Change-Id: I1bf67dc46af91ee113c627d32ae6ecc1dad386c2 Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com> Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>
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| #
aec66c38 |
| 20-Feb-2025 |
Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com> |
feat(versal2): add dependency macro for PM
The pm_api_sys.c file has dependency on the PLAT_ARM_GICR_BASE macro. Add the macro to fix compilation error when PM is enabled.
Change-Id: Ibd77dd38b4a2a
feat(versal2): add dependency macro for PM
The pm_api_sys.c file has dependency on the PLAT_ARM_GICR_BASE macro. Add the macro to fix compilation error when PM is enabled.
Change-Id: Ibd77dd38b4a2a55614064c4ed0b1096acc658a5c Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com> Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>
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| #
5e941e78 |
| 06-Feb-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(versal2): update DDR address map" into integration
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| #
fffde230 |
| 23-Jan-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge changes from topic "xlnx_fix_plat_single_ret" into integration
* changes: fix(versal2): modify function to have single return fix(versal-net): modify function to have single return fix(v
Merge changes from topic "xlnx_fix_plat_single_ret" into integration
* changes: fix(versal2): modify function to have single return fix(versal-net): modify function to have single return fix(versal): modify function to have single return fix(xilinx): modify function to have single return fix(zynqmp): modify function to have single return fix(versal-net): add unsigned suffix to match data type fix(versal): add unsigned suffix to match data type fix(versal2): add missing curly braces fix(versal-net): add missing curly braces fix(zynqmp): add missing curly braces
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| #
fb2fdcd9 |
| 29-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store t
fix(versal2): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store the return value to ensure single return for the function.
Change-Id: Ib152831e84f5ead5b57fd713ebfedb1f3340a727 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
66569a76 |
| 03-Jan-2025 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): update DDR address map
Update DDR address map of BL32, BL33 and transfer list to support AMD Versal Gen 2 platform's new memory map.
Change-Id: I757b2f67270034c8a3140e4bb0ac4d7e88b5d0
fix(versal2): update DDR address map
Update DDR address map of BL32, BL33 and transfer list to support AMD Versal Gen 2 platform's new memory map.
Change-Id: I757b2f67270034c8a3140e4bb0ac4d7e88b5d055 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
82a530f4 |
| 18-Oct-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_versal2_changes" into integration
* changes: feat(versal2): support dynamic XLAT tables fix(versal2): update check for TRANSFER_LIST macro
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| #
7d09198f |
| 11-Sep-2024 |
Akshay Belsare <akshay.belsare@amd.com> |
fix(versal2): update check for TRANSFER_LIST macro
Replace #if defined(TRANSFER_LIST) by #if TRANSFER_LIST. By default TRANSFER_LIST macro is defined with value 0 in Makefile. So checking if the mac
fix(versal2): update check for TRANSFER_LIST macro
Replace #if defined(TRANSFER_LIST) by #if TRANSFER_LIST. By default TRANSFER_LIST macro is defined with value 0 in Makefile. So checking if the macro is defined will always be true and instead need to check the value of the macro to add the conditional code.
Change-Id: I90b06f378326d5e03ad576377ad173e81b100f56 Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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| #
6f05b8d4 |
| 18-Jun-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(versal2): add support for AMD Versal Gen 2 platform" into integration
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| #
c97857db |
| 05-Jun-2024 |
Amit Nagal <amit.nagal@amd.com> |
feat(versal2): add support for AMD Versal Gen 2 platform
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM
feat(versal2): add support for AMD Versal Gen 2 platform
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM firmware which loads TF-A(bl31) to memory, which is already configured, and jumps to it. PLM also prepare handoff structure for TF-A with information what components were load and flags which indicate which EL level SW should be started.
Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c Signed-off-by: Amit Nagal <amit.nagal@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
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