| ae3cf1ff | 06-Oct-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
TF-A: Add HASH_ALG default value to defaults.mk
This patch adds default value of 'sha256' for HASH_ALG build flag to 'make_helpers\defaults.mk', according to 'docs\getting_started\build-options.rst'
TF-A: Add HASH_ALG default value to defaults.mk
This patch adds default value of 'sha256' for HASH_ALG build flag to 'make_helpers\defaults.mk', according to 'docs\getting_started\build-options.rst'. This fixes Measured Boot driver error when TF-A uses default HASH_ALG value and TPM_HASH_ALG is set to sha384 or sha512.
Change-Id: Id0aa34b54807de0adaf88e5f7d7032577c22f365 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| c1a4b6b4 | 21-Sep-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "build_macros.mk: include assert and define loop macros" into integration |
| 8c00bcce | 21-Sep-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "defaults.mk: default KEY_SIZE to 2048 in case of RSA algorithm" into integration |
| 327131c4 | 10-Sep-2020 |
Leonardo Sandoval <leonardo.sandoval@linaro.org> |
build_macros.mk: include assert and define loop macros
Loop macros make it easier for developers to include new variables to assert or define and also help code code readability on makefiles.
Chang
build_macros.mk: include assert and define loop macros
Loop macros make it easier for developers to include new variables to assert or define and also help code code readability on makefiles.
Change-Id: I0d21d6e67b3eca8976c4d856ac8ccc02c8bb5ffa Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
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| 88a1cf1e | 30-Apr-2020 |
Sami Mujawar <sami.mujawar@arm.com> |
Update makefile to build fiptool for Windows
Although support for building fiptool on a Windows host was present, the binary was not built when the top level makefile was invoked.
This patch makes
Update makefile to build fiptool for Windows
Although support for building fiptool on a Windows host was present, the binary was not built when the top level makefile was invoked.
This patch makes the necessary changes to the to support building of fiptool on a Windows host PC from the main makefile.
Change-Id: I0c01ba237fa3010a027a1b324201131210cf4d7c Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
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| ee15a172 | 18-Jun-2020 |
Leonardo Sandoval <leonardo.sandoval@linaro.org> |
defaults.mk: default KEY_SIZE to 2048 in case of RSA algorithm
According to the documentation [1], KEY_SIZE defaults to 2048 when RSA algorithm is chosen, so set this value on the make's defaults fi
defaults.mk: default KEY_SIZE to 2048 in case of RSA algorithm
According to the documentation [1], KEY_SIZE defaults to 2048 when RSA algorithm is chosen, so set this value on the make's defaults file.
[1] https://trustedfirmware-a.readthedocs.io/en/latest/getting_started/build-options.html
Change-Id: I030f98363198a752bc0dd03528f748de527d48d8 Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
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| fddfb3ba | 12-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/arm: Use common build flag for using generic sp804 driver
SP804 TIMER is not platform specific, and current code base adds multiple defines to use this driver. Like FVP_USE_SP804_TIMER and FVP_
plat/arm: Use common build flag for using generic sp804 driver
SP804 TIMER is not platform specific, and current code base adds multiple defines to use this driver. Like FVP_USE_SP804_TIMER and FVP_VE_USE_SP804_TIMER.
This patch removes platform specific build flag and adds generic flag `USE_SP804_TIMER` to be set to 1 by platform if needed.
Change-Id: I5ab792c189885fd1b98ddd187f3a38ebdd0baba2 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 23d5f03a | 24-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
cert_create: add Platform owned secure partitions support
Add support to generate a certificate named "plat-sp-cert" for Secure Partitions(SP) owned by Platform. Earlier a single certificate file "s
cert_create: add Platform owned secure partitions support
Add support to generate a certificate named "plat-sp-cert" for Secure Partitions(SP) owned by Platform. Earlier a single certificate file "sip-sp-cert" was generated which contained hash of all 8 SPs, with this change SPs are divided into two categories viz "SiP owned" and "Plat owned" containing 4 SPs each.
Platform RoT key pair is used for signing.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I5bd493cfce4cf3fc14b87c8ed1045f633d0c92b6
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| 582e4e7b | 29-Jul-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Makefile, doc: Make OPENSSL_DIR variable as build option for tools
Openssl directory path is hardcoded to '/usr' in the makefile of certificate generation and firmware encryption tool using 'OPENSSL
Makefile, doc: Make OPENSSL_DIR variable as build option for tools
Openssl directory path is hardcoded to '/usr' in the makefile of certificate generation and firmware encryption tool using 'OPENSSL_DIR' variable.
Hence changes are done to make 'OPENSSL_DIR' variable as a build option so that user can provide openssl directory path while building the certificate generation and firmware encryption tool.
Also, updated the document for this newly created build option
Change-Id: Ib1538370d2c59263417f5db3746d1087ee1c1339 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 84ef9cd8 | 29-Jun-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
make, doc: Add build option to create chain of trust at runtime
Added a build option 'COT_DESC_IN_DTB' to create chain of trust at runtime using fconf.
Signed-off-by: Manish V Badarkhe <Manish.Bada
make, doc: Add build option to create chain of trust at runtime
Added a build option 'COT_DESC_IN_DTB' to create chain of trust at runtime using fconf.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I92b257ac4ece8bbf56f05a41d1e4056e2422ab89
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| fbc44bd1 | 12-Jun-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Prevent RAS register access from lower ELs
This patch adds a build config 'RAS_TRAP_LOWER_EL_ERR_ACCESS' to set SCR_EL3.TERR during CPU boot. This bit enables trapping RAS register accesses from EL1
Prevent RAS register access from lower ELs
This patch adds a build config 'RAS_TRAP_LOWER_EL_ERR_ACCESS' to set SCR_EL3.TERR during CPU boot. This bit enables trapping RAS register accesses from EL1 or EL2 to EL3.
RAS_TRAP_LOWER_EL_ERR_ACCESS is disabled by default.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ifb0fb0afedea7dd2a29a0b0491a1161ecd241438
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| 02383c28 | 09-Jun-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sp_secure_boot" into integration
* changes: dualroot: add chain of trust for secure partitions sptool: append cert_tool arguments. cert_create: add SiP owned secure p
Merge changes from topic "sp_secure_boot" into integration
* changes: dualroot: add chain of trust for secure partitions sptool: append cert_tool arguments. cert_create: add SiP owned secure partitions support
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| 452d5e5e | 02-Jun-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/fvp: Add support for dynamic description of secure interrupts
Using the fconf framework, the Group 0 and Group 1 secure interrupt descriptors are moved to device tree and retrieved in runtime.
plat/fvp: Add support for dynamic description of secure interrupts
Using the fconf framework, the Group 0 and Group 1 secure interrupt descriptors are moved to device tree and retrieved in runtime. This feature is enabled by the build flag SEC_INT_DESC_IN_FCONF.
Change-Id: I360c63a83286c7ecc2426cd1ff1b4746d61e633c Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 0792dd7d | 22-May-2020 |
Manish Pandey <manish.pandey2@arm.com> |
cert_create: add SiP owned secure partitions support
Add support to generate certificate "sip-sp-cert" for Secure Partitions(SP) owned by Silicon provider(SiP). To avoid deviation from TBBR specific
cert_create: add SiP owned secure partitions support
Add support to generate certificate "sip-sp-cert" for Secure Partitions(SP) owned by Silicon provider(SiP). To avoid deviation from TBBR specification the support is only added for dualroot CoT and not for TBBR CoT.
A single certificate file is generated containing hash of individual packages. Maximum 8 secure partitions are supported.
Following new options added to cert_tool: --sip-sp-cert --> SiP owned Secure Partition Content Certificate --sp-pkg1 --> Secure Partition Package1 file --sp-pkg2 ..... --sp-pkg8
Trusted world key pair is used for signing.
Going forward, this feature can be extended for Platfrom owned Partitions, if required.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ia6dfbc1447cfb41b1fcbd12cf2bf7b88f409bd8d
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| cbf9e84a | 18-Dec-2019 |
Balint Dobszay <balint.dobszay@arm.com> |
plat/arm/fvp: Support performing SDEI platform setup in runtime
This patch introduces dynamic configuration for SDEI setup and is supported when the new build flag SDEI_IN_FCONF is enabled. Instead
plat/arm/fvp: Support performing SDEI platform setup in runtime
This patch introduces dynamic configuration for SDEI setup and is supported when the new build flag SDEI_IN_FCONF is enabled. Instead of using C arrays and processing the configuration at compile time, the config is moved to dts files. It will be retrieved at runtime during SDEI init, using the fconf layer.
Change-Id: If5c35a7517ba00a9f258d7f3e7c8c20cee169a31 Signed-off-by: Balint Dobszay <balint.dobszay@arm.com> Co-authored-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 45aecff0 | 28-Apr-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Implement workaround for AT speculative behaviour
During context switching from higher EL (EL2 or higher) to lower EL can cause incorrect translation in TLB due to speculative execution of AT instru
Implement workaround for AT speculative behaviour
During context switching from higher EL (EL2 or higher) to lower EL can cause incorrect translation in TLB due to speculative execution of AT instruction using out-of-context translation regime.
Workaround is implemented as below during EL's (EL1 or EL2) "context_restore" operation: 1. Disable page table walk using SCTLR.M and TCR.EPD0 & EPD1 bits for EL1 or EL2 (stage1 and stage2 disabled) 2. Save all system registers except TCR and SCTLR (for EL1 and EL2) 3. Do memory barrier operation (isb) to ensure all system register writes are done. 4. Restore TCR and SCTLR registers (for EL1 and EL2)
Errata details are available for various CPUs as below: Cortex-A76: 1165522 Cortex-A72: 1319367 Cortex-A57: 1319537 Cortex-A55: 1530923 Cortex-A53: 1530924
More details can be found in mail-chain: https://lists.trustedfirmware.org/pipermail/tf-a/2020-April/000445.html
Currently, Workaround is implemented as build option which is default disabled.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: If8545e61f782cb0c2dda7ffbaf50681c825bd2f0
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| 7ff088d1 | 22-Mar-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Enable MTE support
Enable MTE support by adding memory tag option in Makefile This option is available only when ARMv8.5-MemTag is implemented
MTE options are added in latest clang and armclang com
Enable MTE support
Enable MTE support by adding memory tag option in Makefile This option is available only when ARMv8.5-MemTag is implemented
MTE options are added in latest clang and armclang compiler which support below options: for clang <version 11.0.0> 1. -march=arm8.5-a+memtag 2. -fsanitize=memtag
for armclang <version 6.12> 1. -march=arm8.5-a+memtag 2. -mmemtag-stack
Set the option SUPPORT_STACK_MEMTAG=yes to enable memory stack tagging.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I4e0bbde4e9769ce03ead6f550158e22f32c1c413
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| 848a7e8c | 25-Mar-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Build: introduce per-BL CPPFLAGS and ASFLAGS
Currently, BL*_CFLAGS and BL*_LDFLAGS are supported.
For completion, this adds BL*_CPPFLAGS and BL*_ASFLAGS.
My main motivation is to pass -D<macro> to
Build: introduce per-BL CPPFLAGS and ASFLAGS
Currently, BL*_CFLAGS and BL*_LDFLAGS are supported.
For completion, this adds BL*_CPPFLAGS and BL*_ASFLAGS.
My main motivation is to pass -D<macro> to BL*_CPPFLAGS so that the macro can be used from all source files.
Change-Id: I0ca1e4e26386bef7fed999af140ee7cce7c2f8ef Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| a6de824f | 28-Feb-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Clean Arm IO
Merge the previously introduced arm_fconf_io_storage into arm_io_storage. This removes the duplicate io_policies and functions definition.
This patch: - replace arm_io_storage.c
fconf: Clean Arm IO
Merge the previously introduced arm_fconf_io_storage into arm_io_storage. This removes the duplicate io_policies and functions definition.
This patch: - replace arm_io_storage.c with the content of arm_fconf_io_storage.c - rename the USE_FCONF_BASED_IO option into ARM_IO_IN_DTB. - use the ARM_IO_IN_DTB option to compile out io_policies moved in dtb. - propagate DEFINES when parsing dts. - use ARM_IO_IN_DTB to include or not uuid nodes in fw_config dtb. - set the ARM_IO_IN_DTB to 0 by default for fvp. This ensure that the behavior of fvp stays the same as it was before the introduction of fconf.
Change-Id: Ia774a96d1d3a2bccad29f7ce2e2b4c21b26c080e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| e3102677 | 10-Mar-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/dualroot" into integration
* changes: Build system: Changes to drive cert_create for dualroot CoT cert_create: Define the dualroot CoT Introduce a new "dualroot" c
Merge changes from topic "sb/dualroot" into integration
* changes: Build system: Changes to drive cert_create for dualroot CoT cert_create: Define the dualroot CoT Introduce a new "dualroot" chain of trust
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| c6ba9b45 | 14-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
Makefile: Add support to optionally encrypt BL31 and BL32
Following build flags have been added to support optional firmware encryption:
- FW_ENC_STATUS: Top level firmware's encryption numeric fla
Makefile: Add support to optionally encrypt BL31 and BL32
Following build flags have been added to support optional firmware encryption:
- FW_ENC_STATUS: Top level firmware's encryption numeric flag, values: 0: Encryption is done with Secret Symmetric Key (SSK) which is common for a class of devices. 1: Encryption is done with Binding Secret Symmetric Key (BSSK) which is unique per device.
- ENC_KEY: A 32-byte (256-bit) symmetric key in hex string format. It could be SSK or BSSK depending on FW_ENC_STATUS flag.
- ENC_NONCE: A 12-byte (96-bit) encryption nonce or Initialization Vector (IV) in hex string format.
- ENCRYPT_BL31: Binary flag to enable encryption of BL31 firmware.
- ENCRYPT_BL32: Binary flag to enable encryption of Secure BL32 payload.
Similar flags can be added to encrypt other firmwares as well depending on use-cases.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I94374d6830ad5908df557f63823e58383d8ad670
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| 7cda17bb | 15-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
drivers: crypto: Add authenticated decryption framework
Add framework for autheticated decryption of data. Currently this patch optionally imports mbedtls library as a backend if build option "DECRY
drivers: crypto: Add authenticated decryption framework
Add framework for autheticated decryption of data. Currently this patch optionally imports mbedtls library as a backend if build option "DECRYPTION_SUPPORT = aes_gcm" is set to perform authenticated decryption using AES-GCM algorithm.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I2966f0e79033151012bf4ffc66f484cd949e7271
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| 033039f8 | 25-Feb-2020 |
Max Shvetsov <maksims.svecovs@arm.com> |
SPMD: add command line parameter to run SPM at S-EL2 or S-EL1
Added SPMD_SPM_AT_SEL2 build command line parameter. Set to 1 to run SPM at S-EL2. Set to 0 to run SPM at S-EL1 (pre-v8.4 or S-EL2 is di
SPMD: add command line parameter to run SPM at S-EL2 or S-EL1
Added SPMD_SPM_AT_SEL2 build command line parameter. Set to 1 to run SPM at S-EL2. Set to 0 to run SPM at S-EL1 (pre-v8.4 or S-EL2 is disabled). Removed runtime EL from SPM core manifest.
Change-Id: Icb4f5ea4c800f266880db1d410d63fe27a1171c0 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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| 28f39f02 | 25-Feb-2020 |
Max Shvetsov <maksims.svecovs@arm.com> |
SPMD: save/restore EL2 system registers.
NOTE: Not all EL-2 system registers are saved/restored. This subset includes registers recognized by ARMv8.0
Change-Id: I9993c7d78d8f5f8e72d1c6c8d6fd871283a
SPMD: save/restore EL2 system registers.
NOTE: Not all EL-2 system registers are saved/restored. This subset includes registers recognized by ARMv8.0
Change-Id: I9993c7d78d8f5f8e72d1c6c8d6fd871283aa3ce0 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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| d7db9a6a | 27-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Build: fix 'BL stage' comment for build macros
The MAKE_BL macro is invoked for 1, 2, 2u, 31, 32.
Fix the comments.
Change-Id: I35dd25cc2ea13885c184fb9c8229a322b33f7e71 Signed-off-by: Masahiro Yam
Build: fix 'BL stage' comment for build macros
The MAKE_BL macro is invoked for 1, 2, 2u, 31, 32.
Fix the comments.
Change-Id: I35dd25cc2ea13885c184fb9c8229a322b33f7e71 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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