| bfd85600 | 04-Aug-2023 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge changes from topic "sm/errata_refactor" into integration
* changes: refactor(cpus): convert Cortex-A15 to use the errata framework refactor(cpus): convert the Cortex-X3 to use the cpu help
Merge changes from topic "sm/errata_refactor" into integration
* changes: refactor(cpus): convert Cortex-A15 to use the errata framework refactor(cpus): convert the Cortex-X3 to use the cpu helpers refactor(cpus): convert Cortex-X3 to use the errata framework refactor(cpus): reorder Cortex-X3 errata by ascending order refactor(cpus): convert the Cortex-A73 to use the cpu helpers refactor(cpus): convert Cortex-A73 to use the errata framework refactor(cpus): reorder Cortex-A73 errata by ascending order refactor(cpus): convert the Cortex-A35 to use the cpu helpers refactor(cpus): convert Cortex-A35 to use the errata framework
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| cbc8cae7 | 26-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert Cortex-A15 to use the errata framework
Change-Id: I569b0da3ed5b81b4b6e9a7820d32684376a190a9 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com> |
| f99a4810 | 20-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert the Cortex-X3 to use the cpu helpers
Change-Id: I922d3d0e81deb5ff7d89aaa1e7a96ef72d3d6943 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com> |
| 1a9d5d1e | 20-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert Cortex-X3 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_er
refactor(cpus): convert Cortex-X3 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
* Manual comparison of disassembly of converted functions with non- converted functions.
aarch64-none-elf-objdump -D <TF-A with conversion>/build/../release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <TF-A clean repo>/build/fvp/release/bl31/bl31.elf
* Build for debug with all errata enabled and step through ArmDS at reset to ensure all functions are entered.
Change-Id: I62e030962edf4e8e8be2c19e7a3176e319468c50 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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| 2975bc0c | 20-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): reorder Cortex-X3 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve this with the errata framework this has to be done at the definition
refactor(cpus): reorder Cortex-X3 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve this with the errata framework this has to be done at the definition level.
Change-Id: I168bf99be0cb0b046d6b641c855f9241991bb0bc Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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| 51e9eb10 | 20-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert the Cortex-A73 to use the cpu helpers
Change-Id: I910c657b3064b8e19eb84656109074ddf0e4ece8 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com> |
| 7711223d | 19-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert Cortex-A73 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_e
refactor(cpus): convert Cortex-A73 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
It is important to note that the errata workaround and checking sequences remain unchanged and preserve their git blame. Testing was conducted by:
* Manual comparison of disassembly of converted functions with non- converted functions.
aarch64-none-elf-objdump -D <TF-A with conversion>/build/../release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <TF-A clean repo>/build/fvp/release/bl31/bl31.elf
* Build for release with all errata flags enabled and compare the disassembly of converted functions with non-converted functions. CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp DEBUG=0 \ HW_ASSISTED_COHERENCY=0 BL33=<tf-a-tests>/build/fvp/debug/tftf.bin \ all fip ERRATA_A73_852427=1 \ ERRATA_A73_855423=1 \ WORKAROUND_CVE_2017_5715=1 \ WORKAROUND_CVE_2018_3639=1 \ WORKAROUND_CVE_2022_23960=1
* Build for debug with all errata enabled and step through ArmDS at reset to ensure all functions are entered.
Change-Id: I63e5b2cc42e1e12daee0b727770cbc19ba729ff7 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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| e2da5e0e | 19-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): reorder Cortex-A73 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve this with the errata framework this has to be done at the definition
refactor(cpus): reorder Cortex-A73 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve this with the errata framework this has to be done at the definition level.
Change-Id: I70b05cc366c3b6d07a63edd88d23a52dd3d019c1 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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| 5c7d12cb | 19-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert the Cortex-A35 to use the cpu helpers
Change-Id: Idd945cacb46cdbbcbd8309b8a2e7a94887120ff3 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com> |
| 40eef67e | 19-Jun-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
refactor(cpus): convert Cortex-A35 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_e
refactor(cpus): convert Cortex-A35 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
It is important to note that the errata workaround and checking sequences remain unchanged and preserve their git blame. Testing was conducted by:
* Manual comparison of disassembly of converted functions with non- converted functions.
aarch64-none-elf-objdump -D <TF-A with conversion>/build/../release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <TF-A with clean repo>/build/fvp/release/bl31/bl31.elf
* Build for release with all errata flags enabled and ensure the changes were identical. CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp \ DEBUG=0 HW_ASSISTED_COHERENCY=0 \ BL33=<tf-a-tests>/build/fvp/debug/tftf.bin \ all fip ERRATA_A35_855472=1
* Build for debug with all errata enabled and step through ArmDS at reset to ensure all functions are entered.
Change-Id: Ib001e9fc269e60369ccfda0245a3e6247f0d6aaa Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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| 65a53848 | 05-Apr-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert the Cortex-A78AE to use cpu helpers
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Ic4189d943c3e55bc25a82f09f2ad4a5b06f443a3 |
| 15702f28 | 05-Apr-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert the Denver cpu to use the errata framework
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I8f804b237a6a566f1c5d0ca1ab62ea76350fc2a2 |
| 27a8bcdc | 05-Apr-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert the Cortex-A78AE to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <
refactor(cpus): convert the Cortex-A78AE to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
It is important to note that the errata workaround and checking sequences remain unchanged and preserve their git blame.
At this point the binary output of all errata was checked with the script from commit 19136. The reported discrepancies are immaterial. All errata have been checked that they get invoked.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Ideb6397f4ac7c3c1d04549a57af43bfa7ef25c1d
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| aff3fa21 | 05-Apr-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert the Cortex-A5 to use the errata framework
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I8214fdff2c528ccfa64a366ee1f3bc04d52a0bf8 |
| 8a4a9165 | 31-Jan-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert the Cortex-A77 to use the bit set helpers
This makes the implementation itself much more readable. At this point all errata have been tested with a script [1] to make sure th
refactor(cpus): convert the Cortex-A77 to use the bit set helpers
This makes the implementation itself much more readable. At this point all errata have been tested with a script [1] to make sure the migration kept everything the same. It reported 1508412, 1946167, and CVE_2022_23960 as having some mismatch. The first has a small non-trivial change that results in identical behaviour. The second is non-trivial to compare, but manual inspection shows it is identical. The CVE had no workaround function previously, however, the instructions are indeed identical. All errata have been checked that they get invoked.
The script's commandline looks like: ./script.py cortex_a77 /path/to/tf-a-with-changes /path/to/tf-a-clean/
[1]: the script: import re import subprocess import sys
def full_cpu_name(): return sys.argv[1]
def old_cpu_name(): return sys.argv[1].split('_')[1]
def new_build(): return sys.argv[2]
def old_build(): return sys.argv[3]
def get_dump(root_dir, symbol): # bl31 includes more stuff raw_dump = subprocess.run([ 'aarch64-none-elf-objdump', f'--disassemble={symbol}', root_dir + '/build/fvp/release/bl31/bl31.elf' ], capture_output=True, encoding='ascii' ).stdout
# get rid of objdump verbosity raw_dump = raw_dump.split('\n')[7:-1] # split arguments and remove addresses at the start return [line.split('\t')[2:] for line in raw_dump]
def check_identical(new, old): if old and old[-1][0] == 'isb': old = old[:-1] print(' NOTE: dropped trailing isb (ok on reset)')
if not new or not old or len(new) != len(old): return False
for newi, oldi in zip(new, old): if newi[0] == oldi[0] == 'b': # ignore the address, compare just the name if newi[1].split(' ')[1] != newi[1].split(' ')[1]: return False continue # identical, proceed
if newi != oldi: return False return True
FLAG_RE = r'report_errata (.*?), ' cpu_path = old_build() + '/lib/cpus/aarch64/' + full_cpu_name() + '.S' with open(cpu_path) as cpu_src: errata_flags = re.findall(FLAG_RE, cpu_src.read()) errata_ids = [flg.split('_')[-1] for flg in errata_flags]
print('List of flags to build with:') print(' '.join([flg + '=1' for flg in errata_flags])) input(( 'Press enter when your patch in argv[2] and ' 'the top of master in argv[3] are both built for release...' ))
for id in errata_ids: new_check = get_dump(new_build(), f'check_erratum_{full_cpu_name()}_{id}') old_check = get_dump(old_build(), f'check_errata_{id}') new_wa = get_dump(new_build(), f'erratum_{full_cpu_name()}_{id}_wa') old_wa = get_dump(old_build(), f'errata_{old_cpu_name()}_{id}_wa')
# remove the boilerplate for each (mov, bl, cbz, ret) new_wa = new_wa[4:-3] old_wa = old_wa[3:-1]
print(f'Checking {id} . . .') if not check_identical(new_check, old_check): print(f' Check {id} check function manually!') if not check_identical(new_wa, old_wa): print(f' Check {id} workaround manually!')
print('All previous errata checked against their migrations')
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I987ded7962f3449344feda47e314994f400e85b8
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| 0b3a4b5a | 27-Jan-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): convert the Cortex-A77 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cp
refactor(cpus): convert the Cortex-A77 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
It is important to note that the errata workaround sequences remain unchanged and preserve their git blame.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I5b74bf56eee95f54a1fb2fc6d3eccd86e26b522e
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| 99787a4c | 27-Jan-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpus): reorder Cortex-A77 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve this with the errata framework this has to be done at the definition
refactor(cpus): reorder Cortex-A77 errata by ascending order
Errata report order is enforced to be in ascending order. To achieve this with the errata framework this has to be done at the definition level.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Ica348d2c81e204eae2e08e9ccf677807e02efef9
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| db8621a2 | 04-Aug-2023 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge changes from topic "ar/errata_refactor" into integration
* changes: fix(cpus): workaround for Neoverse N2 erratum 2779511 fix(errata-abi): added Neoverse N2 to Errata ABI list fix(cpus):
Merge changes from topic "ar/errata_refactor" into integration
* changes: fix(cpus): workaround for Neoverse N2 erratum 2779511 fix(errata-abi): added Neoverse N2 to Errata ABI list fix(cpus): workaround for Neoverse N2 erratum 2743014 fix(docs): updated certain Neoverse N2 erratum status in docs refactor(cpus): convert Neoverse N2 to use CPU helpers refactor(cpus): convert Neoverse N2 to framework refactor(cpus): reorder Neoverse N2 errata by ascending order
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| f6af2185 | 21-Jul-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
refactor(cpus): convert Neoverse V1 to use CPU helpers
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: Idb4b47982278cda93a7c0f0a49dfceb75b8d88e4 |
| 7f798aaa | 20-Jul-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
refactor(cpus): convert Neoverse V1 to framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report w
refactor(cpus): convert Neoverse V1 to framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
It is important to note that the errata workaround sequences remain unchanged and preserve their git blame.
Testing was conducted by:
* Building for release with all errata flags enabled and running script in change 19136 to compare output of objdump for each errata. Only able to verify the check functions this way, rest had to manually verified
* Manual comparison of disassembly of converted functions with non- converted functions
aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf
* Build for release with all errata flags enabled and run default tftf tests
CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp DEBUG=0 \ CTX_INCLUDE_AARCH32_REGS=0 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 \ BL33=./../tf-a-tests/build/fvp/release/tftf.bin \ ERRATA_V1_1618635=1 ERRATA_V1_1774420=1 ERRATA_V1_1791573=1 \ ERRATA_V1_1852267=1 ERRATA_V1_1925756=1 ERRATA_V1_1940577=1 \ ERRATA_V1_1966096=1 ERRATA_V1_2108267=1 ERRATA_V1_2139242=1 \ ERRATA_V1_2216392=1 ERRATA_V1_2294912=1 ERRATA_V1_2372203=1 \ ERRATA_V1_2743093=1 ERRATA_V1_2743233=1 ERRATA_V1_2779461=1 \ WORKAROUND_CVE_2022_23960=1 ERRATA_ABI_SUPPORT=1 all fip
* Build for debug with all errata enabled and step through ArmDS at reset to ensure all functions are entered.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: Ic5697b7cd2a508dee9978d89136fbe168f34626c
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| b0b712ba | 18-Jul-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
refactor(cpus): reorder Neoverse V1 errata by ascending order
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I1c531fe166218804e4fc9ebbdeda2bfebdd69081 |
| 12d28067 | 17-Jul-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
fix(cpus): workaround for Neoverse N2 erratum 2779511
Neoverse N2 erratum 2779511 is a Cat B erratum that applies to all revisions <=r0p2 and is fixed in r0p3. The workaround is to set bit[47] of CP
fix(cpus): workaround for Neoverse N2 erratum 2779511
Neoverse N2 erratum 2779511 is a Cat B erratum that applies to all revisions <=r0p2 and is fixed in r0p3. The workaround is to set bit[47] of CPUACTLR3_EL1
SDEN documentation: https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: Iaa0e30de8473ecb1df1fcca3a45904aac2e419b3
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| eb44035c | 05-Jul-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
fix(cpus): workaround for Neoverse N2 erratum 2743014
Neoverse N2 erratum 2743014 is a Cat B erratum that applies to all revisions <=r0p2 and is fixed in r0p3. The workaround is to set CPUACTLR5_EL1
fix(cpus): workaround for Neoverse N2 erratum 2743014
Neoverse N2 erratum 2743014 is a Cat B erratum that applies to all revisions <=r0p2 and is fixed in r0p3. The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01.
SDEN documentation: https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: Ie7e1be5dea9d1f74738f9fed0fb58bfd41763192
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| d6d34b39 | 29-Jun-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
fix(docs): updated certain Neoverse N2 erratum status in docs
Certain Neoverse N2 erratum in docs were out of date with the latest SDEN document and hence updated it to match the latest
SDEN docume
fix(docs): updated certain Neoverse N2 erratum status in docs
Certain Neoverse N2 erratum in docs were out of date with the latest SDEN document and hence updated it to match the latest
SDEN documentation: https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I5d82a56388a46a09a42b940a633ecebdde0c74e3
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| b41792ca | 27-Jun-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
refactor(cpus): convert Neoverse N2 to use CPU helpers
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I063ff1d61bf1e0c4eef31fd55172bb0c321ed1e0 |