feat(libfdt): upgrade libfdt source files

Update the libfdt source files to the upstream commit e37c256 [1].

[1] https://github.com/dgibson/dtc/commit/e37c256

Change-Id: I00e29b467ff6f8c094f682452

feat(libfdt): upgrade libfdt source files

Update the libfdt source files to the upstream commit e37c256 [1].

[1] https://github.com/dgibson/dtc/commit/e37c256

Change-Id: I00e29b467ff6f8c094f68245232a7cedeaa14aef
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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fix(cpus): workaround for Cortex-A510 erratum 2666669

Cortex-A510 erratum 2666669 applies to revisions r1p1 and lower,
and is fixed in r1p2. The errata is mitigated by setting
IMP_CPUACTLR_EL1[38] t

fix(cpus): workaround for Cortex-A510 erratum 2666669

Cortex-A510 erratum 2666669 applies to revisions r1p1 and lower,
and is fixed in r1p2. The errata is mitigated by setting
IMP_CPUACTLR_EL1[38] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1873351/latest
https://developer.arm.com/documentation/SDEN1873361/latest

Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: Ief27e4a155e43e75f05f2710d0c7bd5da2dec43f

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fix(sme): add missing ISBs

EL3 is configured to trap accesses to SME registers (via
CPTR_EL3.ESM=0). To allow SME instructions, this needs to be temporarily
disabled before changing system registers

fix(sme): add missing ISBs

EL3 is configured to trap accesses to SME registers (via
CPTR_EL3.ESM=0). To allow SME instructions, this needs to be temporarily
disabled before changing system registers. If the PE delays the effects
of writes to system registers then accessing the SME registers will trap
without an isb. This patch adds the isb to restore functionality.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I8ee5ecaec978dde2525631daa682a182ad8f7f04

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Merge "feat(cpu): add library support for Hunter ELP" into integration

Merge "revert(cpus): "Revert workaround for A77 erratum 1800714"" into integration

fix(psa): add missing semicolon

Fix a syntax error in the delegated attestation service code.

Unfortunately, this build failure was not caught by the CI system
because right now lib/psa/delegated_a

fix(psa): add missing semicolon

Fix a syntax error in the delegated attestation service code.

Unfortunately, this build failure was not caught by the CI system
because right now lib/psa/delegated_attestation.c file is not getting
pulled in by any upstream platform. This will be addressed in a
separate patch.

Change-Id: Idb84f62aabc5008396213023fc40547097925860
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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revert(cpus): "Revert workaround for A77 erratum 1800714"

Reinstate the workaround introduced in commit
9bbc03a6e0608a949d66d9da6db12a455b452bfb. The cited change to the SDEN
could not be found and

revert(cpus): "Revert workaround for A77 erratum 1800714"

Reinstate the workaround introduced in commit
9bbc03a6e0608a949d66d9da6db12a455b452bfb. The cited change to the SDEN
could not be found and there are no known problems with the workaround.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iec9938f173e7565024aca798f224df339de90806

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Merge changes I072fe5fe,I4066d476,Ie4af38b8,I730e7b04,Iac3356f8, ... into integration

* changes:
fix(psa): extend measured boot logging
fix(rss): determine the size of sw_type in RSS mboot metad

Merge changes I072fe5fe,I4066d476,Ie4af38b8,I730e7b04,Iac3356f8, ... into integration

* changes:
fix(psa): extend measured boot logging
fix(rss): determine the size of sw_type in RSS mboot metadata
fix(psa): align with original API in tf-m-extras
fix(rss): clear the message buffer
feat(tc): enable RSS backend based measured boot
feat(tc): increase maximum BL1/BL2/BL31 sizes

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Merge "build(changelog): add new scope for Performance Monitor Extensions" into integration

feat(cpu): add library support for Hunter ELP

Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the

feat(cpu): add library support for Hunter ELP

Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the library code is adapted from the
Makalu-ELP support library.

Change-Id: I7e93b9af6b1f0bc4d08c3cf5caf071d2cbdbc89f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(psa): extend measured boot logging

Print all the params of
rss_measured_boot_extend_measurement() to
the console to check parameter healthiness.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Cha

fix(psa): extend measured boot logging

Print all the params of
rss_measured_boot_extend_measurement() to
the console to check parameter healthiness.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I072fe5fef72c67e615ab64e06a9e1f6add5e9cfc

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feat(psa): remove initial attestation partition API

The attestation key derivation and platform attestation token
creation functionality is provided by the Delegated Attestation
partition in RSS.

S

feat(psa): remove initial attestation partition API

The attestation key derivation and platform attestation token
creation functionality is provided by the Delegated Attestation
partition in RSS.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I2d8c0e6589d11e7c81c698adf75ee2a993e3a0c6

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fix(psa): align with original API in tf-m-extras

The measured boot API is available in the tf-m-extras
repo:
partitions/measured_boot/interface/src/measured_boot_api.c

This change make the API beha

fix(psa): align with original API in tf-m-extras

The measured boot API is available in the tf-m-extras
repo:
partitions/measured_boot/interface/src/measured_boot_api.c

This change make the API behavior align with
the original implementation.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ie4af38b859f942b2ef090e92da64d75811b5b49b

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feat(psa): add delegated attestation partition API

Delegated attestation is a service provided by RSS to:
- Derive a delegated attestation key: Realm Attestation Key
- Query the platform attestation

feat(psa): add delegated attestation partition API

Delegated attestation is a service provided by RSS to:
- Derive a delegated attestation key: Realm Attestation Key
- Query the platform attestation token

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I3edf09fcbef24bca7c8a000ffac8c1ab64dfb812

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Merge "fix(semihosting): fix seek call failure check" into integration

Merge "refactor(console): move putchar() to console driver" into integration

Merge changes I134f125f,Ia4bf45bf into integration

* changes:
refactor(sgi): rename RD-Edmunds to RD-V2
refactor(cpu): use the updated IP name for Demeter CPU

refactor(console): move putchar() to console driver

Moving putchar() out of libc and adding a weak dummy
implementation in libc.

This is to remove libc's dependencies to the platform
driver.

Signe

refactor(console): move putchar() to console driver

Moving putchar() out of libc and adding a weak dummy
implementation in libc.

This is to remove libc's dependencies to the platform
driver.

Signed-off-by: Claus Pedersen <claustbp@google.com>
Change-Id: Ib7fefaec0babb783def614ea23521f482fa4a28a

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Merge "refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe" into integration

refactor(cpu): use the updated IP name for Demeter CPU

Neoverse Demeter CPU has been renamed to Neoverse V2 CPU.
Correspondingly, update the CPU library, file names and other
references to use the u

refactor(cpu): use the updated IP name for Demeter CPU

Neoverse Demeter CPU has been renamed to Neoverse V2 CPU.
Correspondingly, update the CPU library, file names and other
references to use the updated IP name.

Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: Ia4bf45bf47807c06f4c966861230faea420d088f

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Merge "chore(libc): clean up includes in lib/libc/printf.c" into integration

build(changelog): add new scope for Performance Monitor Extensions

This patch adds a news scope for FEAT_PMUV3, alongside
updating the existing comments related to the saving of
PMCR_EL0 register ro

build(changelog): add new scope for Performance Monitor Extensions

This patch adds a news scope for FEAT_PMUV3, alongside
updating the existing comments related to the saving of
PMCR_EL0 register routine for better understanding.

Change-Id: Ib150244ce94cfcbbe5d12fdae56327c3d72bda0b
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe

"psci_is_last_on_cpu" and "psci_is_last_on_cpu_safe" modules perform
mostly similar functionalities, verifying whether the curr

refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe

"psci_is_last_on_cpu" and "psci_is_last_on_cpu_safe" modules perform
mostly similar functionalities, verifying whether the current CPU
is the only active core and other cores have been turned off.

However, psci_is_last_on_cpu_safe function differs from the other with:
1. Safe API locks the power domain

This patch removes the section duplicating the functionality
and ensures that "psci_is_last_on_cpu api",is reused in
"psci_is_last_on_cpu_safe" procedure.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie372519e423898d7afa5427cdd77a7f9d3369587

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fix(ras): trap "RAS error record" accesses only for NS

RAS_TRAP_LOWER_EL_ERR_ACCESS was used to prevent access to RAS error
record registers (RAS ERR* & RAS ERX*) from lower EL's in any security
sta

fix(ras): trap "RAS error record" accesses only for NS

RAS_TRAP_LOWER_EL_ERR_ACCESS was used to prevent access to RAS error
record registers (RAS ERR* & RAS ERX*) from lower EL's in any security
state. To give more fine grain control per world basis re-purpose this
macro to RAS_TRAP_NS_ERR_REC_ACCESS, which will enable the trap only
if Error record registers are accessed from NS.
This will also help in future scenarios when RAS handling(in Firmware
first handling paradigm)can be offloaded to a secure partition.

This is first patch in series to refactor RAS framework in TF-A.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ifa7f60bc8c82c9960adf029001bc36c443016d5d

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fix(semihosting): fix seek call failure check

The code checks that the semihosting seek call return value is not
zero instead of a negative value when there is an error condition.
This defect has be

fix(semihosting): fix seek call failure check

The code checks that the semihosting seek call return value is not
zero instead of a negative value when there is an error condition.
This defect has been fixed.

In [1], possible return values for semihosting seek calls are
mentioned.

[1]: https://github.com/ARM-software/abi-aa/blob/main/semihosting/
semihosting.rst#sys-seek-0x0a

Change-Id: I70f09e98323e9c5bf4eeda322ac065e855e256fc
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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