History log of /rk3399_ARM-atf/include/ (Results 276 – 300 of 3957)
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711f42b220-Jun-2025 Olivier Deprez <olivier.deprez@arm.com>

Merge changes from topic "mb/lfa-core-work" into integration

* changes:
docs(maintainers): add myself as code owner for LFA service
docs(lfa): update porting guide with LFA platform APIs
feat(

Merge changes from topic "mb/lfa-core-work" into integration

* changes:
docs(maintainers): add myself as code owner for LFA service
docs(lfa): update porting guide with LFA platform APIs
feat(lfa): add LFA holding pen logic
feat(lfa): add initial implementation for LFA_ACTIVATE
feat(lfa): add initial implementation for LFA_PRIME
feat(fvp): implement platform API for load and auth image
feat(lfa): implement LFA_CANCEL SMC
feat(fvp): implement platform API for LFA cancel operation
feat(lfa): implement LFA_GET_INVENTORY SMC
feat(fvp): implement platform API for LFA activation pending check
feat(lfa): implement LFA_GET_INFO SMC and integrate LFA build
feat(fvp): initialize LFA component activators in platform layer
feat(rmm): add placeholder activator callbacks for LFA
feat(bl31): add placeholder activator implementation for LFA
feat(lfa): add activation handler interface for component activation
feat(fvp): implement LFA get components API
feat(lfa): create LFA SMC handler template

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d0ce1ac520-Jun-2025 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "s32g274a/sd_support" into integration

* changes:
feat(s32g274a): move fip in a dedicated partition
feat(s32g274ardb): initialize the IO buffer
feat(s32g274ardb): init

Merge changes from topic "s32g274a/sd_support" into integration

* changes:
feat(s32g274a): move fip in a dedicated partition
feat(s32g274ardb): initialize the IO buffer
feat(s32g274ardb): initialize the uSDHC driver
feat(s32g274ardb): set the system counter rate
feat(s32g274ardb): init the generic timer for BL2
fix(nxp-mmc): handle response for CMD0
refactor(mmc): replace 0 with MMC_RESPONSE_NONE
feat(mmc): add define for no response

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/rk3399_ARM-atf/.gitmodules
/rk3399_ARM-atf/Makefile
/rk3399_ARM-atf/contrib/libtl
/rk3399_ARM-atf/docs/getting_started/prerequisites.rst
/rk3399_ARM-atf/docs/license.rst
/rk3399_ARM-atf/docs/tools/memory-layout-tool.rst
/rk3399_ARM-atf/drivers/imx/usdhc/imx_usdhc.c
/rk3399_ARM-atf/drivers/mmc/mmc.c
/rk3399_ARM-atf/fdts/fvp-base-psci-common.dtsi
drivers/cadence/cdns_sdmmc.h
drivers/mmc.h
/rk3399_ARM-atf/plat/amd/common/plat_fdt.c
/rk3399_ARM-atf/plat/amd/versal2/bl31_setup.c
/rk3399_ARM-atf/plat/imx/imx8ulp/imx8ulp_psci.c
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/rules.mk
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/include/platform_def.h
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/plat_bl2_el3_setup.c
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/plat_helpers.S
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/plat_io_storage.c
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/platform.mk
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/s32cc_bl_common.c
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/s32g2_soc.c
/rk3399_ARM-atf/plat/qemu/common/qemu_bl2_setup.c
/rk3399_ARM-atf/plat/qemu/common/qemu_bl31_setup.c
/rk3399_ARM-atf/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
/rk3399_ARM-atf/services/spd/opteed/opteed_main.c
/rk3399_ARM-atf/tools/memory/poetry.lock
/rk3399_ARM-atf/tools/memory/pyproject.toml
/rk3399_ARM-atf/tools/memory/src/memory/elfparser.py
/rk3399_ARM-atf/tools/memory/src/memory/image.py
/rk3399_ARM-atf/tools/memory/src/memory/mapparser.py
/rk3399_ARM-atf/tools/memory/src/memory/memmap.py
/rk3399_ARM-atf/tools/memory/src/memory/printer.py
/rk3399_ARM-atf/tools/memory/src/memory/summary.py
/rk3399_ARM-atf/tools/memory/src/memory/templates/summary-flamegraph.html
ff7daec615-Apr-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): add LFA holding pen logic

Add LFA holding logic to be used by the LFA activate SMC call to manage
CPU rendezvous. All CPUs are expected to invoke the LFA activate call
for the rendezvous,

feat(lfa): add LFA holding pen logic

Add LFA holding logic to be used by the LFA activate SMC call to manage
CPU rendezvous. All CPUs are expected to invoke the LFA activate call
for the rendezvous, until then, they will remain on a holding lock.
When the final CPU calls LFA activate, it will release the holding
lock after completing the activation process on that CPU, allowing
the activation process on secondary CPUs to proceed.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Iff9e40dd87420245fe5844e286d0685c1f0db289

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07de22d216-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): add initial implementation for LFA_ACTIVATE

This patch introduces the overall handling of the LFA_ACTIVATE call,
including input validation and invocation flow.
While this covers the core

feat(lfa): add initial implementation for LFA_ACTIVATE

This patch introduces the overall handling of the LFA_ACTIVATE call,
including input validation and invocation flow.
While this covers the core implementation, per-component-specific
handling will be developed in a separate patch. The respective
component callbacks are invoked as part of this logic.

Change-Id: Ie9d4584fc0c0abc9a9faffed62165b4461efed3a
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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67fa182f15-Apr-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): add initial implementation for LFA_PRIME

This patch introduces the overall handling of the LFA_PRIME call,
including input validation and invocation flow.
While this covers the core imple

feat(lfa): add initial implementation for LFA_PRIME

This patch introduces the overall handling of the LFA_PRIME call,
including input validation and invocation flow.
While this covers the core implementation, per-component-specific
handling will be developed in a separate patch. The respective
component callbacks are invoked as part of this logic.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ie13d15d0a060ae5f9704991245d2a65c7d846047

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a7fbcccd02-Jun-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(fvp): implement platform API for load and auth image

Introduce and implement a stub implementation of
`plat_lfa_load_auth_image()` for the FVP platform. For AEM FVP, no
actual image loading or

feat(fvp): implement platform API for load and auth image

Introduce and implement a stub implementation of
`plat_lfa_load_auth_image()` for the FVP platform. For AEM FVP, no
actual image loading or authentication is required as of now, as
images are assumed to be pre-loaded and authenticated.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I82e51f5d18db6d5b9c61f9081b451619d761abe8

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b4cbf50801-Jun-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(fvp): implement platform API for LFA cancel operation

Introduce and implement a stub implementation of `plat_lfa_cancel()`
for the FVP platform. This function will later be expanded to handle
c

feat(fvp): implement platform API for LFA cancel operation

Introduce and implement a stub implementation of `plat_lfa_cancel()`
for the FVP platform. This function will later be expanded to handle
component-specific LFA cancellation logic.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I9690b011313bbe0fd458cbe47f32445f8d2d79fa

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06a6f29615-Apr-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): implement LFA_GET_INVENTORY SMC

This implementation primarily retrieves activation-related flags for
a given fw_seq_id, including whether the firmware is activation
capable, whether an up

feat(lfa): implement LFA_GET_INVENTORY SMC

This implementation primarily retrieves activation-related flags for
a given fw_seq_id, including whether the firmware is activation
capable, whether an update is pending activation, whether it resets
the CPU during activation, whether CPU rendezvous is required, and the
firmware's UUID.
To support this, a platform API is called to determine whether an
update is available for the specified fw_seq_id, indicating its
pending activation status.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I6e702a8b313386f5668027386845ff2dae9328e7

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357079c701-Jun-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(fvp): implement platform API for LFA activation pending check

Introduce and implement `is_plat_lfa_activation_pending()' API for the
FVP platform. Currently, only the RMM component is marked as

feat(fvp): implement platform API for LFA activation pending check

Introduce and implement `is_plat_lfa_activation_pending()' API for the
FVP platform. Currently, only the RMM component is marked as pending.

Change-Id: I6cc84c65ba5fe1b47cc65cbeeb349aac9235533a
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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b9dee50c30-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): implement LFA_GET_INFO SMC and integrate LFA build

Implement the LFA_GET_INFO SMC handler, which retrieves the
number of supported firmware components and performs initial
setup via the p

feat(lfa): implement LFA_GET_INFO SMC and integrate LFA build

Implement the LFA_GET_INFO SMC handler, which retrieves the
number of supported firmware components and performs initial
setup via the platform APIs. This forms the entry point for
LFA usage and makes component metadata available for later use.

Update the build system to include LFA sources.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I4016615a88706972eff6ea5777dda6d5a3a04074

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b100e91d30-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(fvp): initialize LFA component activators in platform layer

Update the FVP platform's LFA component table to populate the
'activator' and 'activation_pending' by introducing fields
in plat_lfa_

feat(fvp): initialize LFA component activators in platform layer

Update the FVP platform's LFA component table to populate the
'activator' and 'activation_pending' by introducing fields
in plat_lfa_component_info_t.
- 'activator': function pointers for component-specific
activation logic
- 'activation_pending': tracks whether the component's activation
is pending

Set the activator function pointers for supported components:
- BL31 via get_bl31_activator()
- RMM (if RME is enabled) via get_rmm_activator()

This allows the LFA service to invoke component-specific prime
and activate callbacks through platform-registered hooks.

Change-Id: Ifd997a8b8cab209c25aabb2e9d4eab59e909ea4d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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d837ccd830-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(rmm): add placeholder activator callbacks for LFA

Introduce the RMM component's activator structure for use in
LFA. The 'prime' and 'activate' callbacks currently return
LFA_WRONG_STATE as plac

feat(rmm): add placeholder activator callbacks for LFA

Introduce the RMM component's activator structure for use in
LFA. The 'prime' and 'activate' callbacks currently return
LFA_WRONG_STATE as placeholders.

These functions will be implemented in subsequent patches in
this series to support actual RMM component activation logic.

Change-Id: I899ff51e4065887b7b4bbfbaa827322c51cd215c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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f647f56130-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(bl31): add placeholder activator implementation for LFA

Introduce the BL31 component's activator structure with stub
implementations for the 'prime' and 'activate' callbacks.

Both callbacks cu

feat(bl31): add placeholder activator implementation for LFA

Introduce the BL31 component's activator structure with stub
implementations for the 'prime' and 'activate' callbacks.

Both callbacks currently return LFA_WRONG_STATE, indicating that
activation is not supported or allowed from BL31 in this context.

This activator is registered via get_bl31_activator(), allowing
the platform layer to wire it into the LFA framework.

Change-Id: I4279996b218d558a45cd99d5840f0e9f8ee97f90
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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9e03218130-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): add activation handler interface for component activation

Introduce `lfa_component_desc.h` defining structures and function
types to support component activation in LFA.

Includes:
- lfa_

feat(lfa): add activation handler interface for component activation

Introduce `lfa_component_desc.h` defining structures and function
types to support component activation in LFA.

Includes:
- lfa_component_status: to track per-component activation state
- lfa_component_ops: function table for prime and activate callbacks

The platform layer uses this interface to register component-specific
callbacks during initialization. These callbacks are implemented in
the component layer, and invoked by the LFA service to coordinate
activation by passing lfa_component_status details.

Change-Id: I141d49679bad3f134a2c5360342331604d2002f8
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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3bb5266130-May-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(fvp): implement LFA get components API

Introduce platform-specific implementation of
`plat_lfa_get_components()` for the Arm FVP platform. This function
returns LFA component metadata, includin

feat(fvp): implement LFA get components API

Introduce platform-specific implementation of
`plat_lfa_get_components()` for the Arm FVP platform. This function
returns LFA component metadata, including component ID, UUID for
each supported firmware image and number of components.

Change-Id: I9e7cbce5865becf3e4babcb770bc5eb3b69a0be8
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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cf48f49f15-Apr-2025 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(lfa): create LFA SMC handler template

As per the specification v1.0[1], added all Live Firmware Activation
(LFA) SMCs, including their Function IDs (FIDs) and associated error
codes.
A dummy ha

feat(lfa): create LFA SMC handler template

As per the specification v1.0[1], added all Live Firmware Activation
(LFA) SMCs, including their Function IDs (FIDs) and associated error
codes.
A dummy handler function has been created as a template. Subsequent
patches will implement the handling of these SMCs.

[1]: https://developer.arm.com/documentation/den0147/latest/

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I5d6500dcff35aa4a438cd5f97f349cd57406ddce

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e493b52219-Jun-2025 Manish Pandey <manish.pandey2@arm.com>

Merge "perf(bl31): convert cpu_data fetching to C" into integration

d43b2ea618-Mar-2025 Boyan Karatotev <boyan.karatotev@arm.com>

perf(bl31): convert cpu_data fetching to C

The assembly routines are opaque to the compiler and it can't inline
them. There is also no requirement for them to be called without a
stack - each of the

perf(bl31): convert cpu_data fetching to C

The assembly routines are opaque to the compiler and it can't inline
them. There is also no requirement for them to be called without a
stack - each of their calls has a stack available. So convert them to C
so that the compiler can do its inlining magic.

On AArch32 we need to be able to call _cpu_data from the entrypoint so
it has to stay as a slight exception.

We can also straighten out the type of the cpu_ops_ptr member so we
don't have to cast it everywhere.

Change-Id: I9c2939a955b396edf26b99ef36318eebeaab13e6
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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28ac195b12-Jun-2025 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

fix(libc): replace true-false with explicit comparisons

This corrects the MISRA violation C2012-10.1:
This change avoids implicit conversions between standard boolean
types and integer types, ensuri

fix(libc): replace true-false with explicit comparisons

This corrects the MISRA violation C2012-10.1:
This change avoids implicit conversions between standard boolean
types and integer types, ensuring type safety and compliance.
Replaced definitions of `true` and `false` in <stdbool.h> with
explicit equality ('0'=='0') and inequality ('1'=='0') checks.

Change-Id: I507522c8be8654d830f73f32dd4ca9fe98cf0f8f
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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7554f1df17-Jun-2025 Lauren Wehrmeister <lauren.wehrmeister@arm.com>

Merge changes I1fae91a5,I54793492,I703f0e6e into integration

* changes:
fix(cpus): workaround for Cortex-A710 erratum 1917258
fix(cpus): workaround for Cortex-A710 erratum 1916945
fix(cpus): w

Merge changes I1fae91a5,I54793492,I703f0e6e into integration

* changes:
fix(cpus): workaround for Cortex-A710 erratum 1917258
fix(cpus): workaround for Cortex-A710 erratum 1916945
fix(cpus): workaround for Cortex-A710 erratum 1901946

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46a1167013-Jun-2025 Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

feat(mmc): add define for no response

Introduce a new macro definition to represent the response type for
commands that do not expect a response. This is particularly applicable
to commands like Com

feat(mmc): add define for no response

Introduce a new macro definition to represent the response type for
commands that do not expect a response. This is particularly applicable
to commands like Command 0, which is used to reset the card and place it
into the idle state.

Change-Id: I6fe298504a7166ccd7e47c23f88945b2ce064cf9
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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d154fe2b13-Jun-2025 Manish Pandey <manish.pandey2@arm.com>

Merge changes I2af839ae,Ifd0c7b4e,I56763cb4,I93aec580,Icbd43503, ... into integration

* changes:
docs(fvp): add GICv5 build instructions and limitations
feat(fvp): add GICv5 support
feat(gicv5

Merge changes I2af839ae,Ifd0c7b4e,I56763cb4,I93aec580,Icbd43503, ... into integration

* changes:
docs(fvp): add GICv5 build instructions and limitations
feat(fvp): add GICv5 support
feat(gicv5): probe components
feat(gicv5): initialise the IWB
feat(gicv5): initialise the IRS
feat(gicv5): assign interrupt sources to appropriate security states
feat(gicv5): add a barebones GICv5 driver
feat(gicv5): add support for building with gicv5

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e2e90fa113-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

feat(fvp): add GICv5 support

Factors out GICv3 specific code and replace it with GICv5. This can be
selected with FVP_USE_GIC_DRIVER=FVP_GICV5. Specifically, the FCONF
logic does not apply to GICv5

feat(fvp): add GICv5 support

Factors out GICv3 specific code and replace it with GICv5. This can be
selected with FVP_USE_GIC_DRIVER=FVP_GICV5. Specifically, the FCONF
logic does not apply to GICv5 as the bindings are completely different.

This patch does not include a device tree. This will be added at a later
date.

Change-Id: Ifd0c7b4e0bc2ea1e53a6779ab4c50c4aec39dafb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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4db6bf9f05-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

feat(gicv5): probe components

Asserts that the platform configuration is correct. No dynamic
discovery so only done in debug builds.

Change-Id: I56763cb422dcaa4a816a619ab4acfc6946427c64
Signed-off-

feat(gicv5): probe components

Asserts that the platform configuration is correct. No dynamic
discovery so only done in debug builds.

Change-Id: I56763cb422dcaa4a816a619ab4acfc6946427c64
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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7179920909-Dec-2024 Boyan Karatotev <boyan.karatotev@arm.com>

feat(gicv5): initialise the IWB

Same idea as the IRS - do IWB initialisation that's only accessible from
EL3 when it is the MPPAS. Relies on the platform to provide wire domain
assignments and trig

feat(gicv5): initialise the IWB

Same idea as the IRS - do IWB initialisation that's only accessible from
EL3 when it is the MPPAS. Relies on the platform to provide wire domain
assignments and triggers as well as to map the config frame in device
nGnRnE memory. All wires will default to the NS domain and the platform
can override this.

Change-Id: I93aec5809aec4328d1cba832c2c6e5891e398e5b
Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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