| be84a5b9 | 20-Dec-2019 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "debugfs: add 9p device interface" into integration |
| 962c44e7 | 15-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm-mm: Remove mm_svc.h header
The contents of this header have been merged into the spm_mm_svc.h
header file.
Change-Id: I01530b2e4ec1b4c091ce339758025e2216e740a4
Signed-off-by: Paul Beesley <paul
spm-mm: Remove mm_svc.h header
The contents of this header have been merged into the spm_mm_svc.h
header file.
Change-Id: I01530b2e4ec1b4c091ce339758025e2216e740a4
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
show more ...
|
| 0bf9f567 | 15-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm-mm: Refactor spm_svc.h and its contents
Change-Id: I91c192924433226b54d33e57d56d146c1c6df81b
Signed-off-by: Paul Beesley <paul.beesley@arm.com> |
| aeaa225c | 15-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm-mm: Refactor secure_partition.h and its contents
Before adding any new SPM-related components we should first do
some cleanup around the existing SPM-MM implementation. The aim
is to make sure t
spm-mm: Refactor secure_partition.h and its contents
Before adding any new SPM-related components we should first do
some cleanup around the existing SPM-MM implementation. The aim
is to make sure that any SPM-MM components have names that clearly
indicate that they are MM-related. Otherwise, when adding new SPM
code, it could quickly become confusing as it would be unclear to
which component the code belongs.
The secure_partition.h header is a clear example of this, as the
name is generic so it could easily apply to any SPM-related code,
when it is in fact SPM-MM specific.
This patch renames the file and the two structures defined within
it, and then modifies any references in files that use the header.
Change-Id: I44bd95fab774c358178b3e81262a16da500fda26
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
show more ...
|
| 538b0020 | 14-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm: Remove SPM Alpha 1 prototype and support files
The Secure Partition Manager (SPM) prototype implementation is
being removed. This is preparatory work for putting in place a
dispatcher component
spm: Remove SPM Alpha 1 prototype and support files
The Secure Partition Manager (SPM) prototype implementation is
being removed. This is preparatory work for putting in place a
dispatcher component that, in turn, enables partition managers
at S-EL2 / S-EL1.
This patch removes:
- The core service files (std_svc/spm)
- The Resource Descriptor headers (include/services)
- SPRT protocol support and service definitions
- SPCI protocol support and service definitions
Change-Id: Iaade6f6422eaf9a71187b1e2a4dffd7fb8766426
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
show more ...
|
| 3f3c341a | 16-Sep-2019 |
Paul Beesley <paul.beesley@arm.com> |
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition
management in TF-A. One is based on the "Management Mode" (MM)
design, the oth
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition
management in TF-A. One is based on the "Management Mode" (MM)
design, the other is based on the Secure Partition Client Interface
(SPCI) specification. Currently there is a dependency between their
build flags that shouldn't exist, making further development
harder than it should be. This patch removes that
dependency, making the two flags function independently.
Before: ENABLE_SPM=1 is required for using either implementation.
By default, the SPCI-based implementation is enabled and
this is overridden if SPM_MM=1.
After: ENABLE_SPM=1 enables the SPCI-based implementation.
SPM_MM=1 enables the MM-based implementation.
The two build flags are mutually exclusive.
Note that the name of the ENABLE_SPM flag remains a bit
ambiguous - this will be improved in a subsequent patch. For this
patch the intention was to leave the name as-is so that it is
easier to track the changes that were made.
Change-Id: I8e64ee545d811c7000f27e8dc8ebb977d670608a
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
show more ...
|
| b8e17967 | 20-Dec-2019 |
György Szing <gyorgy.szing@arm.com> |
Merge changes from topic "bs/pmf32" into integration
* changes:
pmf: Make the runtime instrumentation work on AArch32
SiP: Don't validate entrypoint if state switch is impossible |
| 992f091b | 12-Jul-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
debugfs: add SMC channel
Provide an SMC interface to the 9p filesystem. This permits
accessing firmware drivers through a common interface, using
standardized read/write/control operations.
Signed-
debugfs: add SMC channel
Provide an SMC interface to the 9p filesystem. This permits
accessing firmware drivers through a common interface, using
standardized read/write/control operations.
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I9314662314bb060f6bc02714476574da158b2a7d
show more ...
|
| 0d35873c | 17-Dec-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "allwinner_pmic" into integration
* changes:
allwinner: h6: power: Switch to using the AXP driver
drivers: allwinner: axp: Add AXP805 support |
| 4e0d14f2 | 17-Dec-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "arm: gicv3: Fix compiler dependent behavior" into integration |
| 0531ada5 | 07-Nov-2019 |
Bence Szépkúti <bence.szepkuti@arm.com> |
pmf: Make the runtime instrumentation work on AArch32
Ported the pmf asm macros and the asm code in the bl31 entrypoint
necessary for the instrumentation to AArch32.
Since smc dispatch is handled b
pmf: Make the runtime instrumentation work on AArch32
Ported the pmf asm macros and the asm code in the bl31 entrypoint
necessary for the instrumentation to AArch32.
Since smc dispatch is handled by the bl32 payload on AArch32, we
provide this service only if AARCH32_SP=sp_min is set.
Signed-off-by: Bence Szépkúti <bence.szepkuti@arm.com>
Change-Id: Id33b7e9762ae86a4f4b40d7f1b37a90e5130c8ac
show more ...
|
| 0ca3913d | 19-Sep-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
debugfs: add 9p device interface
The 9p interface provides abstraction layers allowing the software
that uses devices to be independent from the hardware.
This patch provides a file system abstract
debugfs: add 9p device interface
The 9p interface provides abstraction layers allowing the software
that uses devices to be independent from the hardware.
This patch provides a file system abstraction to link drivers to their
devices and propose a common interface to expose driver operations to
higher layers. This file system can be used to access and configure a
device by doing read/write operations.
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ia9662393baf489855dc0c8f389fe4a0afbc9c255
show more ...
|
| 2f3abc19 | 17-Dec-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "allwinner_pmic" into integration
* changes:
allwinner: Convert AXP803 regulator setup code into a driver
allwinner: a64: power: Use fdt_for_each_subnode
allwinner: a6
Merge changes from topic "allwinner_pmic" into integration
* changes:
allwinner: Convert AXP803 regulator setup code into a driver
allwinner: a64: power: Use fdt_for_each_subnode
allwinner: a64: power: Remove obsolete register check
allwinner: a64: power: Remove duplicate DT check
allwinner: Build PMIC bus drivers only in BL31
allwinner: a64: power: Make sunxi_turn_off_soc static
allwinner: Merge duplicate code in sunxi_power_down
allwinner: Clean up PMIC-related error handling
allwinner: Synchronize PMIC enumerations
allwinner: Enable clock before resetting I2C/RSB
show more ...
|
| b1acebf4 | 16-Dec-2019 |
György Szing <gyorgy.szing@arm.com> |
Merge "libc: Fix SIZE_MAX on AArch32" into integration |
| ae4a90f2 | 16-Dec-2019 |
Bence Szépkúti <bence.szepkuti@arm.com> |
libc: Fix SIZE_MAX on AArch32
SIZE_MAX was mistakenly redefined from UINT32_MAX to UINT64_MAX
on AArch32 when the arch-specific headers were merged.
This value is not currently used by upstream TF-
libc: Fix SIZE_MAX on AArch32
SIZE_MAX was mistakenly redefined from UINT32_MAX to UINT64_MAX
on AArch32 when the arch-specific headers were merged.
This value is not currently used by upstream TF-A source code,
so no functionality should be affected.
Change-Id: I2acf7f8736423697c7377e8ed4b08843ced26e66
Signed-off-by: Bence Szépkúti <bence.szepkuti@arm.com>
show more ...
|
| 186acdd9 | 16-Dec-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "cryptocell: add cryptocell 712 RSA 3K support" into integration |
| 0bc752c9 | 21-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
allwinner: Convert AXP803 regulator setup code into a driver
Previously, the A64/H5 and H6 platforms' PMIC setup code was entirely
independent. However, some H6 boards also need early regulator setu
allwinner: Convert AXP803 regulator setup code into a driver
Previously, the A64/H5 and H6 platforms' PMIC setup code was entirely
independent. However, some H6 boards also need early regulator setup.
Most of the register interface and all of the device tree traversal code
can be reused between the AXP803 and AXP805. The main difference is the
hardware bus interface, so that part is left to the platforms. The
remainder is moved into a driver.
I factored out the bits that were obviously specific to the AXP803;
additional changes for compatibility with other PMICs can be made as
needed.
The only functional change is that rsb_init() now checks the PMIC's chip
ID register against the expected value. This was already being done in
the H6 version of the code.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Icdcf9edd6565f78cccc503922405129ac27e08a2
show more ...
|
| f6d9c4ca | 21-Oct-2019 |
Samuel Holland <samuel@sholland.org> |
drivers: allwinner: axp: Add AXP805 support
This adds the new regulator list, as well as changes to make the switch
(equivalent to DC1SW on the AXP803) work on both PMICs.
Signed-off-by: Samuel Hol
drivers: allwinner: axp: Add AXP805 support
This adds the new regulator list, as well as changes to make the switch
(equivalent to DC1SW on the AXP803) work on both PMICs.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I9a1eac8ddfc54b27096c10a8eebdd51aaf9b8311
show more ...
|
| 2bcc672f | 13-Dec-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "aa/sel2_support" into integration
* changes:
S-EL2 Support: Check for AArch64
Add support for enabling S-EL2 |
| 79999040 | 12-Dec-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "PIE: make call to GDT relocation fixup generalized" into integration |
| da90359b | 26-Nov-2019 |
Manish Pandey <manish.pandey2@arm.com> |
PIE: make call to GDT relocation fixup generalized
When a Firmware is complied as Position Independent Executable it needs
to request GDT fixup by passing size of the memory region to
el3_entrypoint
PIE: make call to GDT relocation fixup generalized
When a Firmware is complied as Position Independent Executable it needs
to request GDT fixup by passing size of the memory region to
el3_entrypoint_common macro.
The Global descriptor table fixup will be done early on during cold boot
process of primary core.
Currently only BL31 supports PIE, but in future when BL2_AT_EL3 will be
compiled as PIE, it can simply pass fixup size to the common el3
entrypoint macro to fixup GDT.
The reason for this patch was to overcome the bug introduced by SHA
330ead806 which called fixup routine for each core causing
re-initializing of global pointers thus overwriting any changes
done by the previous core.
Change-Id: I55c792cc3ea9e7eef34c2e4653afd04572c4f055
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
show more ...
|
| b8622922 | 15-Sep-2019 |
Gilad Ben-Yossef <gilad.benyossef@arm.com> |
cryptocell: add cryptocell 712 RSA 3K support
Add the support needed to enable using CryptoCell integration with
with RSA 3K support.
Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com>
Chang
cryptocell: add cryptocell 712 RSA 3K support
Add the support needed to enable using CryptoCell integration with
with RSA 3K support.
Signed-off-by: Gilad Ben-Yossef <gilad.benyossef@arm.com>
Change-Id: I95527cb0c41ae012109e8968dd20a4ae9fe67f17
show more ...
|
| fcccd358 | 11-Dec-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "libc: add memrchr" into integration |
| ebff1072 | 19-Jun-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
libc: add memrchr
This function scans a string backwards from the end for the first
instance of a character.
Change-Id: I46b21573ed25a0ff222eac340e1e1fb93b040763
Signed-off-by: Ambroise Vincent <am
libc: add memrchr
This function scans a string backwards from the end for the first
instance of a character.
Change-Id: I46b21573ed25a0ff222eac340e1e1fb93b040763
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
show more ...
|
| d0196911 | 18-Jul-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
arm: gicv3: Fix compiler dependent behavior
C99 standard: "What constitutes an access to an object that has
volatile-qualified type is implementation-defined".
GCC is not considering the cast to vo
arm: gicv3: Fix compiler dependent behavior
C99 standard: "What constitutes an access to an object that has
volatile-qualified type is implementation-defined".
GCC is not considering the cast to void of volatile structures as an
access and so is not actually issuing reads.
Clang does read those structures by copying them on the stack, which in
this case creates an overflow because of their large size.
This patch removes the cast to void and instead uses the USED attribute
to tell the compiler to retain the static variables.
Change-Id: I952b5056e3f6e91841e7ef9558434352710ab80d
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Zelalem Aweke <zelalem.aweke@arm.com>
show more ...
|