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53d9c9c8 |
| 10-Apr-2017 |
Scott Branden <scott.branden@broadcom.com> |
Move defines in utils.h to utils_def.h to fix shared header compile issues
utils.h is included in various header files for the defines in it. Some of the other header files only contain defines. Th
Move defines in utils.h to utils_def.h to fix shared header compile issues
utils.h is included in various header files for the defines in it. Some of the other header files only contain defines. This allows the header files to be shared between host and target builds for shared defines.
Recently types.h has been included in utils.h as well as some function prototypes.
Because of the inclusion of types.h conflicts exist building host tools abd these header files now. To solve this problem, move the defines to utils_def.h and have this included by utils.h and change header files to only include utils_def.h and not pick up the new types.h being introduced.
Fixes ARM-software/tf-issues#461
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Remove utils_def.h from utils.h
This patch removes utils_def.h from utils.h as it is not required. And also makes a minor change to ensure Juno platform compiles.
Change-Id: I10cf1fb51e44a8fa6dcec02980354eb9ecc9fa29
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| #
3b68c09c |
| 06-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #888 from douglas-raillard-arm/dr/fix_ULL_issue
Fix ARM_BL31_IN_DRAM build
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| #
f9608bc8 |
| 08-Mar-2017 |
Douglas Raillard <douglas.raillard@arm.com> |
Fix ARM_BL31_IN_DRAM build
Some header files using the ULL() macro were not directly including utils.h where the macro definition resides. As a consequence, a linker script with values using this ma
Fix ARM_BL31_IN_DRAM build
Some header files using the ULL() macro were not directly including utils.h where the macro definition resides. As a consequence, a linker script with values using this macro did not see the macro definition and kept the "ULL(<value>)" call in the preprocessed file, which lead to link error.
Files using ULL() macro now include utils.h directly.
Change-Id: I433a7f36bd21a156c20e69bc2a2bb406140ebdf9 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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| #
28ee754d |
| 16-Mar-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat
Introduce version 2 of the translation tables library
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| #
bf75a371 |
| 23-Feb-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
ARM platforms: Enable xlat tables lib v2
Modify ARM common makefile to use version 2 of the translation tables library and include the new header in C files.
Simplify header dependencies related to
ARM platforms: Enable xlat tables lib v2
Modify ARM common makefile to use version 2 of the translation tables library and include the new header in C files.
Simplify header dependencies related to this library to simplify the change.
The following table contains information about the size increase in bytes for BL1 after applying this patch. The code has been compiled for different configurations of FVP in AArch64 mode with compiler GCC 4.9.3 20150413. The sizes have been calculated with the output of `nm` by adding the size of all regions and comparing the total size before and after the change. They are sumarized in the table below:
text bss data total Release +660 -20 +88 +728 Debug +740 -20 +242 +962 Debug (LOG_LEVEL=50) +1120 -20 +317 +1417
Change-Id: I539e307f158ab71e3a8b771640001fc1bf431b29 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
424ad491 |
| 31-Jan-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #819 from davidcunado-arm/dc/build_with_gcc6.2
Resolve build errors flagged by GCC 6.2
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| #
9edac047 |
| 19-Jan-2017 |
David Cunado <david.cunado@arm.com> |
Resolve build errors flagged by GCC 6.2
With GCC 6.2 compiler, more C undefined behaviour is being flagged as warnings, which result in build errors in ARM TF build.
The specific issue that this pa
Resolve build errors flagged by GCC 6.2
With GCC 6.2 compiler, more C undefined behaviour is being flagged as warnings, which result in build errors in ARM TF build.
The specific issue that this patch resolves is the use of (1 << 31), which is predominantly used in case statements, where 1 is represented as a signed int. When shifted to msb the behaviour is undefined.
The resolution is to specify 1 as an unsigned int using a convenience macro ULL(). A duplicate macro MAKE_ULL() is replaced.
Fixes ARM-software/tf-issues#438
Change-Id: I08e3053bbcf4c022ee2be33a75bd0056da4073e1 Signed-off-by: David Cunado <david.cunado@arm.com>
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| #
78b4c5b0 |
| 19-Dec-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #778 from antonio-nino-diaz-arm/an/xlat-fixes
Fixes and improvements to translation tables library
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| #
e60e74bd |
| 13-Dec-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
ARM platforms: Replace address space size defines
The now deprecated ADDR_SPACE_SIZE has been replaced by the two defines PLAT_PHY_ADDR_SPACE_SIZE and PLAT_VIRT_ADDR_SPACE_SIZE.
Change-Id: I027a2f0
ARM platforms: Replace address space size defines
The now deprecated ADDR_SPACE_SIZE has been replaced by the two defines PLAT_PHY_ADDR_SPACE_SIZE and PLAT_VIRT_ADDR_SPACE_SIZE.
Change-Id: I027a2f02f47ab2f679b8979a6dbfb0f08270a1a4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
937108a0 |
| 18-Aug-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #678 from soby-mathew/sm/PSCI_AArch32
Introduce AArch32 support for PSCI library
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| #
877cf3ff |
| 11-Jul-2016 |
Soby Mathew <soby.mathew@arm.com> |
AArch32: Add essential ARM platform and FVP support
This patch adds AArch32 support for FVP and implements common platform APIs like `plat_get_my_stack`, `plat_set_my_stack`, `plat_my_core_cos` for
AArch32: Add essential ARM platform and FVP support
This patch adds AArch32 support for FVP and implements common platform APIs like `plat_get_my_stack`, `plat_set_my_stack`, `plat_my_core_cos` for AArch32. Only Multi Processor(MP) implementations of these functions are considered in this patch. The ARM Standard platform layer helpers are implemented for AArch32 and the common makefiles are modified to cater for both AArch64 and AArch32 builds. Compatibility with the deprecated platform API is not supported for AArch32.
Change-Id: Iad228400613eec91abf731b49e21a15bcf2833ea
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| #
b2c9687f |
| 08-Apr-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #586 from antonio-nino-diaz-arm/an/spd-bl32
Remove BL32_BASE when building without SPD for FVP
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| #
81d139d5 |
| 05-Apr-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove BL32_BASE when building without SPD for FVP
Previously, when building TF without SPD support, BL2 tried to load a BL32 image from the FIP and fails to find one, which resulted on warning mess
Remove BL32_BASE when building without SPD for FVP
Previously, when building TF without SPD support, BL2 tried to load a BL32 image from the FIP and fails to find one, which resulted on warning messages on the console. Even if there is a BL32 image in the FIP it shouldn't be loaded because there is no way to transfer control to the Secure Payload without SPD support.
The Makefile has been modified to pass a define of the form SPD_${SPD} to the source code the same way it's done for PLAT. The define SPD_none is then used to undefine BL32_BASE when BL32 is not used to prevent BL2 from trying to load a BL32 image and failing, thus removing the warning messages mentioned above.
Fixes ARM-software/tf-issues#287
Change-Id: Ifeb6f1c26935efb76afd353fea88e87ba09e9658
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| #
4c51badf |
| 31-Mar-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #570 from davwan01/bl31-in-dram
Add support to load BL31 in DRAM
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| #
4518dd9a |
| 07-Mar-2016 |
David Wang <david.wang@arm.com> |
Add support to load BL31 in DRAM
This patch adds an option to the ARM common platforms to load BL31 in the TZC secured DRAM instead of the default secure SRAM.
To enable this feature, set `ARM_BL31
Add support to load BL31 in DRAM
This patch adds an option to the ARM common platforms to load BL31 in the TZC secured DRAM instead of the default secure SRAM.
To enable this feature, set `ARM_BL31_IN_DRAM` to 1 in build options. If TSP is present, then setting this option also sets the TSP location to DRAM and ignores the `ARM_TSP_RAM_LOCATION` build flag.
To use this feature, BL2 platform code must map in the DRAM used by BL31. The macro ARM_MAP_BL31_SEC_DRAM is provided for this purpose. Currently, only the FVP BL2 platform code maps in this DRAM.
Change-Id: If5f7cc9deb569cfe68353a174d4caa48acd78d67
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| #
1a4fdb36 |
| 26-Feb-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #533 from yatharth-arm/yk/genfw-1292
Fix the inconsistencies in bl1_tbbr_image_descs[]
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| #
843ddee4 |
| 01-Feb-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Fix the inconsistencies in bl1_tbbr_image_descs[]
This patch fixes inconsistencies in bl1_tbbr_image_descs[] and miscellaneous fixes in Firmware Update code.
Following are the changes: * As part of
Fix the inconsistencies in bl1_tbbr_image_descs[]
This patch fixes inconsistencies in bl1_tbbr_image_descs[] and miscellaneous fixes in Firmware Update code.
Following are the changes: * As part of the original FWU changes, a `copied_size` field was added to `image_info_t`. This was a subtle binary compatibility break because it changed the size of the `bl31_params_t` struct, which could cause problems if somebody used different versions of BL2 or BL31, one with the old `image_info_t` and one with the new version. This patch put the `copied_size` within the `image_desc_t`. * EXECUTABLE flag is now stored in `ep_info.h.attr` in place of `image_info.h.attr`, associating it to an entrypoint. * The `image_info.image_base` is only relevant for secure images that are copied from non-secure memory into secure memory. This patch removes initializing `image_base` for non secure images in the bl1_tbbr_image_descs[]. * A new macro `SET_STATIC_PARAM_HEAD` is added for populating bl1_tbbr_image_descs[].ep_info/image_info.h members statically. The version, image_type and image attributes are now populated using this new macro. * Added PLAT_ARM_NVM_BASE and PLAT_ARM_NVM_SIZE to avoid direct usage of V2M_FLASH0_XXX in plat/arm/common/arm_bl1_fwu.c. * Refactoring of code/macros related to SECURE and EXECUTABLE flags.
NOTE: PLATFORM PORTS THAT RELY ON THE SIZE OF `image_info_t` OR USE the "EXECUTABLE" BIT WITHIN `image_info_t.h.attr` OR USE THEIR OWN `image_desc_t` ARRAY IN BL1, MAY BE BROKEN BY THIS CHANGE. THIS IS CONSIDERED UNLIKELY.
Change-Id: Id4e5989af7bf0ed263d19d3751939da1169b561d
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| #
f62d89ed |
| 19-Feb-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #531 from soby-mathew/sm/multicluster_fvp
Allow multi cluster topology definitions for ARM platforms
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| #
0108047a |
| 01-Feb-2016 |
Soby Mathew <soby.mathew@arm.com> |
Allow multi cluster topology definitions for ARM platforms
The common topology description helper funtions and macros for ARM Standard platforms assumed a dual cluster system. This is not flexible e
Allow multi cluster topology definitions for ARM platforms
The common topology description helper funtions and macros for ARM Standard platforms assumed a dual cluster system. This is not flexible enough to scale to multi cluster platforms. This patch does the following changes for more flexibility in defining topology:
1. The `plat_get_power_domain_tree_desc()` definition is moved from `arm_topology.c` to platform specific files, that is `fvp_topology.c` and `juno_topology.c`. Similarly the common definition of the porting macro `PLATFORM_CORE_COUNT` in `arm_def.h` is moved to platform specific `platform_def.h` header.
2. The ARM common layer porting macros which were dual cluster specific are now removed and a new macro PLAT_ARM_CLUSTER_COUNT is introduced which must be defined by each ARM standard platform.
3. A new mandatory ARM common layer porting API `plat_arm_get_cluster_core_count()` is introduced to enable the common implementation of `arm_check_mpidr()` to validate MPIDR.
4. For the FVP platforms, a new build option `FVP_NUM_CLUSTERS` has been introduced which allows the user to specify the cluster count to be used to build the topology tree within Trusted Firmare. This enables Trusted Firmware to be built for multi cluster FVP models.
Change-Id: Ie7a2e38e5661fe2fdb2c8fdf5641d2b2614c2b6b
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| #
85df7e44 |
| 18-Feb-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #523 from jcastillo-arm/jc/genfw-791
ARM platforms: rationalise memory attributes of shared memory
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| #
74eb26e4 |
| 13-Jan-2016 |
Juan Castillo <juan.castillo@arm.com> |
ARM platforms: rationalise memory attributes of shared memory
The shared memory region on ARM platforms contains the mailboxes and, on Juno, the payload area for communication with the SCP. This sha
ARM platforms: rationalise memory attributes of shared memory
The shared memory region on ARM platforms contains the mailboxes and, on Juno, the payload area for communication with the SCP. This shared memory may be configured as normal memory or device memory at build time by setting the platform flag 'PLAT_ARM_SHARED_RAM_CACHED' (on Juno, the value of this flag is defined by 'MHU_PAYLOAD_CACHED'). When set as normal memory, the platform port performs the corresponding cache maintenance operations. From a functional point of view, this is the equivalent of setting the shared memory as device memory, so there is no need to maintain both options.
This patch removes the option to specify the shared memory as normal memory on ARM platforms. Shared memory is always treated as device memory. Cache maintenance operations are no longer needed and have been replaced by data memory barriers to guarantee that payload and MHU are accessed in the right order.
Change-Id: I7f958621d6a536dd4f0fa8768385eedc4295e79f
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| #
ea8d69af |
| 16-Feb-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #519 from vikramkanigiri/vk/misc_plat_reorg
Vk/misc plat reorg
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| #
ecf70f7b |
| 21-Jan-2016 |
Vikram Kanigiri <vikram.kanigiri@arm.com> |
Re-factor definition of some macros on ARM platforms
This patch moves the definition of some macros used only on ARM platforms from common headers to platform specific headers. It also forces all AR
Re-factor definition of some macros on ARM platforms
This patch moves the definition of some macros used only on ARM platforms from common headers to platform specific headers. It also forces all ARM standard platforms to have distinct definitions (even if they are usually the same). 1. `PLAT_ARM_TZC_BASE` and `PLAT_ARM_NSTIMER_FRAME_ID` have been moved from `css_def.h` to `platform_def.h`. 2. `MHU_BASE` used in CSS platforms is moved from common css_def.h to platform specific header `platform_def.h` on Juno and renamed as `PLAT_ARM_MHU_BASE`. 3. To cater for different sizes of BL images, new macros like `PLAT_ARM_MAX_BL31_SIZE` have been created for each BL image. All ARM platforms need to define them for each image.
Change-Id: I9255448bddfad734b387922aa9e68d2117338c3f
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31d5e7f5 |
| 14-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #467 from jcastillo-arm/jc/tbb_oid
Apply new image terminology
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| #
d178637d |
| 14-Dec-2015 |
Juan Castillo <juan.castillo@arm.com> |
Remove dashes from image names: 'BL3-x' --> 'BL3x'
This patch removes the dash character from the image name, to follow the image terminology in the Trusted Firmware Wiki page:
https://github.c
Remove dashes from image names: 'BL3-x' --> 'BL3x'
This patch removes the dash character from the image name, to follow the image terminology in the Trusted Firmware Wiki page:
https://github.com/ARM-software/arm-trusted-firmware/wiki
Changes apply to output messages, comments and documentation.
non-ARM platform files have been left unmodified.
Change-Id: Ic2a99be4ed929d52afbeb27ac765ceffce46ed76
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