| 7820777f | 10-Feb-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add event and aux control support
The SiP service for the Arm(R) Ethos(TM)-N NPU driver will now handle
setting up the NPU's event and aux control registers during the SMC
reset call.
feat(ethos-n): add event and aux control support
The SiP service for the Arm(R) Ethos(TM)-N NPU driver will now handle
setting up the NPU's event and aux control registers during the SMC
reset call. The aux control register will no longer be accessible by the
non-secure world.
The API version has been given a minor bump with this change to indicate
the added functionality.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I5b099e25978aa4089c384eb17c5060c5b4eaf373
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| e9812ddc | 27-Jan-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add SMC call to get FW properties
When the Arm(R) Ethos(TM)-N NPU firmware is loaded by BL2 into protected
memory, the Linux kernel NPU driver cannot access the firmware. To still
all
feat(ethos-n): add SMC call to get FW properties
When the Arm(R) Ethos(TM)-N NPU firmware is loaded by BL2 into protected
memory, the Linux kernel NPU driver cannot access the firmware. To still
allow the kernel driver to access some information about the firmware,
SMC calls have been added so it can check compatibility and get the
necessary information to map the firmware into the SMMU for the NPU.
The API version has been given a minor version bump with this change to
indicate the added functionality.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: Idb076b7bcf54ed7e8eb39be80114dc1d1c45336d
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|
| a2cdbb1d | 18-Jan-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add check for NPU in SiP setup
The SiP service in the Arm(R) Ethos(TM)-N NPU driver requires that there
is at least one NPU available. If there is no NPU available, the driver
is eith
feat(ethos-n): add check for NPU in SiP setup
The SiP service in the Arm(R) Ethos(TM)-N NPU driver requires that there
is at least one NPU available. If there is no NPU available, the driver
is either used incorrectly or the HW config is incorrect.
To ensure that the SiP service is not incorrectly used, a setup handler
has been added to the service that will validate that there is at least
one NPU available.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I8139a652f265cfc0db4a37464f39f1fb92868e10
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| 5a89947a | 11-Jan-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
fix(ethos-n): add workaround for erratum 2838783
To workaround Arm(R) Ethos(TM)-N NPU erratum 2838783, the NPU has been
configured to allow being woken up by both secure and non-secure events
to mak
fix(ethos-n): add workaround for erratum 2838783
To workaround Arm(R) Ethos(TM)-N NPU erratum 2838783, the NPU has been
configured to allow being woken up by both secure and non-secure events
to make sure that an event always wakes up the NPU.
The API version has been given a minor version bump with this change to
indicate that this fix is included.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I429cdd6bf1e633b4dedf2e94af28937dd892a0ba
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|
| f3096072 | 16-Nov-2022 |
Mohamed Elzahhar <Mohamed.Elzahhar@arm.com> |
feat(ethos-n): add support for NPU to cert_create
Add Juno specific Makefile to the certificate tool build. That
Makefile is included by the certificate tool Makefile to add
information about the au
feat(ethos-n): add support for NPU to cert_create
Add Juno specific Makefile to the certificate tool build. That
Makefile is included by the certificate tool Makefile to add
information about the authentication data for the
Arm(R) Ethos(TM)-N NPU's firmware binary.
Signed-off-by: Mohamed Elzahhar <Mohamed.Elzahhar@arm.com>
Signed-off-by: Rob Hughes <robert.hughes@arm.com>
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: Ie4b6a1c29d73b3ed5041b57f2cd88033be18a63a
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| c91b08c8 | 24-Nov-2022 |
Daniele Castro <daniele.castro@arm.com> |
feat(ethos-n): add NPU support in fiptool
Add platform specific Makefile to add UUIDs and command options
for the Arm(R) Ethos(TM)-N NPU firmware binary and certificate
data to the FIP so that the T
feat(ethos-n): add NPU support in fiptool
Add platform specific Makefile to add UUIDs and command options
for the Arm(R) Ethos(TM)-N NPU firmware binary and certificate
data to the FIP so that the TF-A's BL2 can later be used to load
the Arm(R) Ethos(TM)-N NPU firmware binary into memory and verify
its integrity.
Add separate driver specific include header file for the
Arm(R) Ethos(TM)-N NPU images containing UUIDs and command options
to make it easy to port the FIP support to other platforms.
Signed-off-by: Daniele Castro <daniele.castro@arm.com>
Signed-off-by: Rob Hughes <robert.hughes@arm.com>
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I8cd64fb20d58f8bd539facb085606213d6cead05
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|
| 2a2e3e87 | 04-Nov-2022 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add NPU sleeping SMC call
The non-secure world delegation of the register needed to determine if
the Arm(R) Ethos(TM)-N NPU is active or sleeping will be removed in the
future. In pre
feat(ethos-n): add NPU sleeping SMC call
The non-secure world delegation of the register needed to determine if
the Arm(R) Ethos(TM)-N NPU is active or sleeping will be removed in the
future. In preparation for the change, a new SMC call has been added to
allow the non-secure world to ask the SiP service for the state instead.
A minor API version bump has been done with this change to indicate
support for the new functionality.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I1338341be385cf1891f4809efb7083fae6d928bc
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|
| fa37d308 | 19-Oct-2022 |
Joshua Pimm <joshua.pimm@arm.com> |
feat(ethos-n): add reset type to reset SMC calls
Adds a reset type argument for the soft and hard reset SMC calls to
indicate whether to perform a full reset and setup or only halt the
Arm(R) Ethos(
feat(ethos-n): add reset type to reset SMC calls
Adds a reset type argument for the soft and hard reset SMC calls to
indicate whether to perform a full reset and setup or only halt the
Arm(R) Ethos(TM)-N NPU. For use in cases where the NPU will not be
used but must be put into a known state, such as suspending the NPU
as part of power management.
Signed-off-by: Joshua Pimm <joshua.pimm@arm.com>
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I6018af85a28b0e977166ec29d26f04739123140c
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| a02a45df | 08-Mar-2023 |
Varun Wadekar <vwadekar@nvidia.com> |
fix(gicv3): workaround for NVIDIA erratum T241-FABRIC-4
The purpose of this patch is to address the T241 erratum T241-FABRIC-4,
which causes unexpected behavior in the GIC when multiple transactions
fix(gicv3): workaround for NVIDIA erratum T241-FABRIC-4
The purpose of this patch is to address the T241 erratum T241-FABRIC-4,
which causes unexpected behavior in the GIC when multiple transactions
are received simultaneously from different sources. This hardware issue
impacts NVIDIA server platforms that use more than two T241 chips
interconnected. Each chip has support for 320 {E}SPIs.
This issue occurs when multiple packets from different GICs are
incorrectly interleaved at the target chip. The erratum text below
specifies exactly what can cause multiple transfer packets susceptible
to interleaving and GIC state corruption. GIC state corruption can
lead to a range of problems, including kernel panics, and unexpected
behavior.
Erratum documentation:
https://developer.nvidia.com/docs/t241-fabric-4/nvidia-t241-fabric-4-errata.pdf
The workaround is to ensure that MMIO accesses target the GIC on the
socket that holds the data, for example SPI ranges owned by the socket’s
GIC. This ensures that the GIC will not utilize the inter-socket AXI
Stream interface for servicing these GIC MMIO accesses.
This patch updates the functions that use the GICD_In{E} registers to
ensure that the accesses are directed to the chip that owns the SPI,
instead of using the global alias.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I04e33ba64eb306bd5fdabb56e63cbe273d8cd632
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| 7ece6597 | 21-Mar-2023 |
Michal Simek <michal.simek@amd.com> |
style(docs): fix typo s/flase/false/
Trivial typo fix.
Change-Id: Ifac249d0110414ca71040a6d2a0b3e963480c1a9
Signed-off-by: Michal Simek <michal.simek@amd.com> |
| 2519ee5f | 17-Mar-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(ufs): adds timeout and error handling" into integration |
| 2c5bce38 | 10-Mar-2023 |
Anand Saminathan <anans@google.com> |
feat(ufs): adds timeout and error handling
Adds a common function to poll for interrupt status which reports errors
and returns error codes
Signed-off-by: Anand Saminathan <anans@google.com>
Change
feat(ufs): adds timeout and error handling
Adds a common function to poll for interrupt status which reports errors
and returns error codes
Signed-off-by: Anand Saminathan <anans@google.com>
Change-Id: Ie5df036dc979e984871de4ae7e974b994296ca4c
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|
| 2535e204 | 13-Feb-2023 |
Elyes Haouas <ehaouas@noos.fr> |
style: fix functions definitions
This is to fix old style functions definitions.
Change-Id: I094b1497dcf948d4d8de4d57d93878aa092ea053
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> |
| 55a32830 | 27-Feb-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I960771e6,I291dc627,I57f31664 into integration
* changes:
fix(ufs): set the PRDT length field properly
fix(ufs): flush the entire PRDT
fix(ufs): only allow using one slot |
| 20fdbcf5 | 22-Feb-2023 |
Jorge Troncoso <jatron@google.com> |
fix(ufs): set the PRDT length field properly
The PRDT length field contains the count of the entries in the PRDT. See
JEDEC Standard No. 223E, section 6.1.1, "UTP Transfer Request
Descriptor," page
fix(ufs): set the PRDT length field properly
The PRDT length field contains the count of the entries in the PRDT. See
JEDEC Standard No. 223E, section 6.1.1, "UTP Transfer Request
Descriptor," page 66. Previously we were setting the PRDT length field
to the number of bytes in the PRDT divided by four (the size in units of
32 bits). This was incorrect according to the spec.
Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I960771e6ce57002872392993042fae9ec505447e
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|
| 51e06159 | 12-Jan-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(mbedtls): add support for mbedtls-3.3
TF-A support for mbedtls3.x has been overdue by number of releases.
As per mbedtls support it was advised to use latest and greatest
mbedtls-3.3. But mbedt
feat(mbedtls): add support for mbedtls-3.3
TF-A support for mbedtls3.x has been overdue by number of releases.
As per mbedtls support it was advised to use latest and greatest
mbedtls-3.3. But mbedtls-3.x breaks API compatibility with
mbedtls-2.x
To maintain comptability for mbedtls-2.x and enable mbedtls-3.x
support add a functionality into makefile to determine the major version
of mbedtls and use that to selective include or compile files
that are present.
With mbedtls-3.x numerous other config changes have been done.
Some of the config options deprecated or enabled by default.
Thus we decided to introduce a new 3.x config file part of this
change for building TF-A with mbedtls-3.3.
For futher information on migrating to mbedtls 3.x refer to:
https://github.com/Mbed-TLS/mbedtls/blob/development/docs/3.0-migration-guide.md
Change-Id: Ia8106d6f526809df927d608db27fe149623258ed
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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|
| a8eadc51 | 11-Jan-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(mbedtls): avoid including MBEDTLS_CONFIG_FILE
Currently we include MBEDTLS_CONFIG_FILE directly and if a custom
config file is used it will included.
However from mbedtls-3.x onwards it di
refactor(mbedtls): avoid including MBEDTLS_CONFIG_FILE
Currently we include MBEDTLS_CONFIG_FILE directly and if a custom
config file is used it will included.
However from mbedtls-3.x onwards it discourages usage of
MBEDTLS_CONFIG_FILE include directly, so to resolve this and keep 2.28
compatibility include version.h which would include the custom config
file if present and also would expose us with mbedtls-major-version
number which could be used for selecting features and functions for
mbedtls 2.28 or 3.3
Change-Id: I029992311be2a38b588ebbb350875b03ea29acdb
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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|
| aa61ff6c | 24-Jan-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "fix_misra_partition_mmc" into integration
* changes:
fix(mmc): align part config type
fix(mmc): do not modify r_data in mmc_send_cmd()
fix(mmc): explicitly check oper
Merge changes from topic "fix_misra_partition_mmc" into integration
* changes:
fix(mmc): align part config type
fix(mmc): do not modify r_data in mmc_send_cmd()
fix(mmc): explicitly check operators precedence
fix(partition): add U suffix for unsigned numbers
fix(partition): add missing curly braces
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| acf455b4 | 20-Jan-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "fix_sparse_warnings" into integration
* changes:
fix(libc): remove __putchar alias
fix(console): correct scopes for console symbols
fix(auth): use NULL instead of 0 f
Merge changes from topic "fix_sparse_warnings" into integration
* changes:
fix(libc): remove __putchar alias
fix(console): correct scopes for console symbols
fix(auth): use NULL instead of 0 for pointer check
fix(io): compare function pointers with NULL
fix(fdt-wrappers): use correct prototypes
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| 03bd4810 | 09-Dec-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(console): correct scopes for console symbols
console_state is only used in multi_console.c, it is then declared as
static. console_list is used by several files, declare it as extern.
This corre
fix(console): correct scopes for console symbols
console_state is only used in multi_console.c, it is then declared as
static. console_list is used by several files, declare it as extern.
This corrects the 2 sparse warnings:
drivers/console/multi_console.c:13:11: warning: symbol 'console_list'
was not declared. Should it be static?
drivers/console/multi_console.c:14:9: warning: symbol 'console_state'
was not declared. Should it be static?
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id1891595906c258e8cb8aa325226f0a43723ca0e
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|
| 69544959 | 22-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): remove unused io_mmc driver
This driver was used when STM32MP_USE_STM32IMAGE was enabled. This flag
is now removed, so the ST io_mmc driver can now be removed.
Signed-off-by: Yann Gau
refactor(st): remove unused io_mmc driver
This driver was used when STM32MP_USE_STM32IMAGE was enabled. This flag
is now removed, so the ST io_mmc driver can now be removed.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I3c1280dec8926b921534c81e143e86cfe6d4ee0d
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| 79664cfc | 15-Dec-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration
* changes:
fix(layerscape): unlock write access SMMU_CBn_ACTLR
fix(nxp-ddr): add checking return value
fea
Merge changes I2b23e7c8,I779587af,Ic46de7a4,If753e987,I00171b05, ... into integration
* changes:
fix(layerscape): unlock write access SMMU_CBn_ACTLR
fix(nxp-ddr): add checking return value
feat(lx2): enable OCRAM ECC
fix(nxp-tools): fix coverity issue
fix(nxp-ddr): fix coverity issue
fix(nxp-ddr): fix underrun coverity issue
fix(nxp-drivers): fix sd secure boot failure
feat(lx2): support more variants
fix(lx2): init global data before using it
fix(ls1046a): 4 keys secureboot failure resolved
fix(nxp-crypto): fix secure boot assert inclusion
fix(nxp-crypto): fix coverity issue
fix(nxp-drivers): fix fspi coverity issue
fix(nxp-drivers): fix tzc380 memory regions config
fix(layerscape): fix nv_storage assert checking
fix(nxp-ddr): apply Max CDD values for warm boot
fix(nxp-ddr): use CDDWW for write to read delay
fix(layerscape): fix errata a008850
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| f0f2c903 | 07-Dec-2022 |
Tony K Nadackal <tony.nadackal@arm.com> |
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expre
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expressions". Changing channel_id type to unsigned int since it can
never be a negative value.
Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: I579b21497329db40897c10d86c8fc68e4877f3db
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| d1c6c495 | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(partition): add U suffix for unsigned numbers
This corrects MISRA c2012-7.2 violation:
A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.
Si
fix(partition): add U suffix for unsigned numbers
This corrects MISRA c2012-7.2 violation:
A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I5508a7d482213fc4d22e3e7ac53defb4135af596
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| 0ca1d8fb | 01-Nov-2022 |
Howard Lu <howard.lu@nxp.com> |
fix(layerscape): unlock write access SMMU_CBn_ACTLR
This patch is to fix Errata #841119 and #826419 failed apply in linux
because of SMMU_CBn_ACTLR register can't be modified in non-secure
states.
fix(layerscape): unlock write access SMMU_CBn_ACTLR
This patch is to fix Errata #841119 and #826419 failed apply in linux
because of SMMU_CBn_ACTLR register can't be modified in non-secure
states.
Signed-off-by: Howard Lu <howard.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2b23e7c8baa809f385917eb45b10ec6b26a9ada8
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|