| d50e7a71 | 04-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st-sdmmc2): check regulator enable/disable return
The issue was reported by Coverity [1]. The return of the functions regulator_disable() and regulator_enable() was not checked. If they fail, th
fix(st-sdmmc2): check regulator enable/disable return
The issue was reported by Coverity [1]. The return of the functions regulator_disable() and regulator_enable() was not checked. If they fail, this means there is an issue either with PMIC or I2C. The board should the stop booting with a panic().
[1] https://scan4.scan.coverity.com/reports.htm#v47771/p11439/mergedDefectId=374565
Change-Id: If5dfd5643c210e03ae4b1f4cab0168c0db89f60e Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| e752fa4a | 01-Jan-2022 |
André Przywara <andre.przywara@arm.com> |
Merge "feat(allwinner): allow to skip PMIC regulator setup" into integration |
| c5ee8588 | 23-Dec-2021 |
Wing Li <wingers@google.com> |
fix(ufs): delete call to inv_dcache_range for utrd
The utrd struct is allocated on the stack by ufs_check_resp's caller. Invalidating the utrd struct is unnecessary since it's only read from, and ca
fix(ufs): delete call to inv_dcache_range for utrd
The utrd struct is allocated on the stack by ufs_check_resp's caller. Invalidating the utrd struct is unnecessary since it's only read from, and can cause other values stored on the stack (e.g. link register) to be inadvertently invalidated.
Change-Id: Icd455b52beb2677fafc083d68d0bfa0645b7194b Signed-off-by: Wing Li <wingers@google.com>
show more ...
|
| 67412e4d | 01-Nov-2021 |
Andre Przywara <andre.przywara@arm.com> |
feat(allwinner): allow to skip PMIC regulator setup
For somewhat historical reasons we are doing some initial PMIC regulator setup in BL31, as U-Boot does not (yet) have a PMIC driver. This worked f
feat(allwinner): allow to skip PMIC regulator setup
For somewhat historical reasons we are doing some initial PMIC regulator setup in BL31, as U-Boot does not (yet) have a PMIC driver. This worked fine so far, but there is at least one board (OrangePi 3) that gets upset, because the Ethernet PHY needs some *coordinated* bringup of *two* regulators.
To avoid custom hacks, let's introduce a build option to keep doing the regulator setup in TF-A. Defining SUNXI_SETUP_REGULATORS to 0 will break support for some devices on some boards in U-Boot (Ethernet and HDMI), but will allow to bring up the OrangePi 3 in Linux correctly. We keep the default at 1 to not change the behaviour for all other boards.
After U-Boot gained proper PMIC support at some point in the future, we will probably change the default to 0, to get rid of the less optimal PMIC code in TF-A.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: Ie8e2583d0396f6eeaae8ffe6b6190f27db63e2a7
show more ...
|
| 93b153b5 | 23-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_regulator" into integration
* changes: feat(st-sdmmc2): manage cards power cycle feat(stm32mp1): register fixed regulator feat(st-drivers): introduce fixed regulat
Merge changes from topic "st_regulator" into integration
* changes: feat(st-sdmmc2): manage cards power cycle feat(stm32mp1): register fixed regulator feat(st-drivers): introduce fixed regulator driver refactor(st): update CPU and VDD voltage get refactor(stm32mp1-fdts): update regulator description refactor(st-pmic): use regulator framework for DDR init feat(st-pmic): register the PMIC to regulator framework refactor(st-pmic): split initialize_pmic() feat(stm32mp1): add regulator framework compilation feat(regulator): add a regulator framework feat(stpmic1): add new services feat(stpmic1): add USB OTG regulators refactor(st-pmic): improve driver usage refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean refactor(stm32mp1): re-order drivers init
show more ...
|
| 258bef91 | 10-May-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required. For this we need to: - disable vmmc-supply regulator - make the power cycle required for
feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required. For this we need to: - disable vmmc-supply regulator - make the power cycle required for SDMMC2 peripheral - enable regulators
Change-Id: I2be6d9082d1cc4c864a82cf2c31ff8522e2d31a2 Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| 5d6a2646 | 20-Jan-2021 |
Pascal Paillet <p.paillet@st.com> |
feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474 Signed-off-by: Pascal Paillet <p.pai
feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474 Signed-off-by: Pascal Paillet <p.paillet@st.com>
show more ...
|
| 0ba71ac9 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.
Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31 Signed-off-by: Pascal Paillet <p.paillet
refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.
Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31 Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
show more ...
|
| 85fb175b | 27-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.
Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a Signed-off-by: Pascal Paillet <p.paillet@s
feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.
Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a Signed-off-by: Pascal Paillet <p.paillet@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
show more ...
|
| ae7792e0 | 18-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays regulator information if debug is enabled. It is under DEBUG flag and called after init
refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays regulator information if debug is enabled. It is under DEBUG flag and called after initialize_pmic() in BL2.
Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
show more ...
|
| d5b4a2c4 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
feat(regulator): add a regulator framework
Add a regulator framework to: - provide an interface to consumers and drivers, - connect consumers with drivers, - handle most of devicetree-parsing, - han
feat(regulator): add a regulator framework
Add a regulator framework to: - provide an interface to consumers and drivers, - connect consumers with drivers, - handle most of devicetree-parsing, - handle always-on and boot-on regulators, - handle min/max voltages,
Change-Id: I23c939fdef2c71a416c44c9de332f70db0d2aa53 Signed-off-by: Pascal Paillet <p.paillet@st.com>
show more ...
|
| ea552bf5 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
feat(stpmic1): add new services
Add support for ICC, sink mode, bypass mode, active discharge and list voltages. Handle LDO3 sink source mode in a different way to avoid setting voltage while in sin
feat(stpmic1): add new services
Add support for ICC, sink mode, bypass mode, active discharge and list voltages. Handle LDO3 sink source mode in a different way to avoid setting voltage while in sink source mode.
Change-Id: Ib1b909fd8a153f542917f650e43e24317a570534 Signed-off-by: Pascal Paillet <p.paillet@st.com>
show more ...
|
| 13fbfe04 | 10-Jan-2020 |
Etienne Carriere <etienne.carriere@st.com> |
feat(stpmic1): add USB OTG regulators
Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are needed since manipulated durin
feat(stpmic1): add USB OTG regulators
Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are needed since manipulated during the suspend/resume power sequence as per FDT description for stm32mp15x-xxx boards from STMicroelectronics.
Change-Id: I6217de707e49882bd5a9100db43e0d354908800d Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
show more ...
|
| c77c7d9e | 15-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-pmic): improve driver usage
Store status of dt_pmic_status() as local static variable, this avoids parsing DT several times. In the same way, store nodes in dt_pmic_i2c_config() and in d
refactor(st-pmic): improve driver usage
Store status of dt_pmic_status() as local static variable, this avoids parsing DT several times. In the same way, store nodes in dt_pmic_i2c_config() and in dt_get_pmic_node() as local static variables.
Change-Id: I4585e9dfdde2847a369bffcc6f2b39ecc2b74de1 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
show more ...
|
| 16e56a75 | 19-Sep-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
Improve use and readability.
Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@
refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
Improve use and readability.
Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
show more ...
|
| 33667d29 | 30-Aug-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() / stm32mp_clk_get_rate() with clk_enable() / clk_disable() / clk_get_rate().
Change-Id:
feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() / stm32mp_clk_get_rate() with clk_enable() / clk_disable() / clk_get_rate().
Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111 Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
show more ...
|
| 847c6bc8 | 13-Oct-2020 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
feat(clk): add a minimal clock framework
This is mainly a clock interface with clk_ops callbacks. Those callbacks are: enable, disable, get_rate, set_parent, and is_enabled. This framework is compil
feat(clk): add a minimal clock framework
This is mainly a clock interface with clk_ops callbacks. Those callbacks are: enable, disable, get_rate, set_parent, and is_enabled. This framework is compiled for STM32MP1.
Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794 Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
show more ...
|
| 737ad29b | 11-Jun-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration: analog, no-pull, speed low, and its secure configuration, thanks to stm32_gpio_is_se
feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration: analog, no-pull, speed low, and its secure configuration, thanks to stm32_gpio_is_secure_at_reset().
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
show more ...
|
| 20c8c230 | 13-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(scmi): make msg_header variable volatile" into integration |
| ffb725be | 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): modify type for Internal function argument
Modify the type of the variable that stores the value for MPIDR in the internal function from uint64_t to u_register_t.
Signed-off-by: K
feat(plat/rcar3): modify type for Internal function argument
Modify the type of the variable that stores the value for MPIDR in the internal function from uint64_t to u_register_t.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib5bda93d5432e0412132bddf41ead8ee3fcf9e46
show more ...
|
| d9912cf3 | 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53
Add new function so that the value of bit at WUPMSKCA57/53, which points to CPU other than the BOOT CPU, is 1 at initialization.
feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53
Add new function so that the value of bit at WUPMSKCA57/53, which points to CPU other than the BOOT CPU, is 1 at initialization. Modify sequence so that value of each bit for CPU at WUPMSKCA57/53 is basically 0 and target bit value is changed to 1 only when CPU_OFF.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Id5dafc04e1dbaf265c8b67b903c335bb1af49914
show more ...
|
| 82bb6c2e | 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
fix(plat/rcar3): fix to bit operation for WUPMSKCA57/53
Change internal function to call when updating value for WUPMSKCA57/53.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Sig
fix(plat/rcar3): fix to bit operation for WUPMSKCA57/53
Change internal function to call when updating value for WUPMSKCA57/53.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Id20e65e27861dd73a149ff487123859581a9b5c5
show more ...
|
| 9554a186 | 10-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "a3700-comphy-fixes-1" into integration
* changes: refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants refactor(drivers/marvell/comphy-3700):
Merge changes from topic "a3700-comphy-fixes-1" into integration
* changes: refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants refactor(drivers/marvell/comphy-3700): rename Clock Source Low register constants refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control register constants refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register constants refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register constants refactor(drivers/marvell/comphy-3700): unify Generation Settings register values refactor(drivers/marvell/comphy-3700): unify Generation Settings register names refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes refactor(drivers/marvell/comphy-3700): move and add comment for COMPHY_RESERVED_REG refactor(drivers/marvell/comphy-3700): move Miscellaneous Control 0 register definition refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_USB3_5G refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable register constant fix(drivers/marvell/comphy): change reg_set() / reg_set16() to update semantics fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics fix(drivers/marvell/comphy-3700): fix comments about selector register values fix(drivers/marvell/comphy-3700): fix comment about COMPHY status register fix(drivers/marvell/comphy-3700): fix reference clock selection value names fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name fix(drivers/marvell/comphy-3700): fix Generation Setting registers names fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name
show more ...
|
| be1d8b24 | 10-Dec-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(stm32mp1): preserve the PLL4 settings for USB boot" into integration |
| e62ae2e2 | 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants
The constants BUNDLE_PERIOD_SCALE and PLL_READY_DLY refer to two multi-bit registers within the Clock Source Low regist
refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants
The constants BUNDLE_PERIOD_SCALE and PLL_READY_DLY refer to two multi-bit registers within the Clock Source Low register. These constants are used as masks for those registers (and values are not defined since we are writing zeros to them).
Give them the _MASK suffix.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Id469d0ab4c755d2d6a0150a1ade33dd9d0293667
show more ...
|