| e21a788e | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
coreboot: Use generic base address
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location for the coreboot memory console.
This removes the ba
coreboot: Use generic base address
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location for the coreboot memory console.
This removes the base member from the coreboot specific data structure,
but keeps the struct console_cbmc_t and its size member.
Change-Id: I7f1dffd41392ba3fe5c07090aea761a42313fb5b
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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|
| f695e1e0 | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
pl011: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru
pl011: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I7a23327394d142af4b293ea7ccd90b843c54587c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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|
| 489e2987 | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
meson: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru
meson: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I07a07677153d3671ced776671e4f107824d3df16
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| e8ada80a | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
skeletton: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data
skeletton: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I347849424782333149e5912a25cc0ab9d277a201
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| 78b40dce | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
cdns: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data struc
cdns: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I9f8b55414ab7965e431e3e86d182eabd511f32a4
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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|
| c10db6de | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
stm32: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru
stm32: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: Iea6ca26ff4903c33f0fad27fec96fdbabd4e0a91
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| c01ee06b | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
rcar: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data struc
rcar: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I836e26ff1771abf21fd460d0ee40e90a452e9b43
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| 3968bc08 | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
a3700: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru
a3700: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I89c3ab2ed85ab941d8b38ced48474feb4aaa8b7e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| 98964f05 | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data stru
16550: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I5c2fe3b6a667acf80c808cfec4a64059a2c9c25f
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| d7873bcd | 25-Jan-2020 |
Andre Przywara <andre.przywara@arm.com> |
imx: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data struct
imx: Use generic console_t data structure
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: I058f793e4024fa7291e432f5be374a77faf16f36
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| 5ab8b717 | 06-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce a new "dualroot" chain of trust
This new chain of trust defines 2 independent signing domains:
1) One for the silicon firmware (BL1, BL2, BL31) and optionally the
Trusted OS. It is roo
Introduce a new "dualroot" chain of trust
This new chain of trust defines 2 independent signing domains:
1) One for the silicon firmware (BL1, BL2, BL31) and optionally the
Trusted OS. It is rooted in the Silicon ROTPK, just as in the TBBR
CoT.
2) One for the Normal World Bootloader (BL33). It is rooted in a new key
called Platform ROTPK, or PROTPK for short.
In terms of certificates chain,
- Signing domain 1) is similar to what TBBR advocates (see page 21 of
the TBBR specification), except that the Non-Trusted World Public Key
has been removed from the Trusted Key Certificate.
- Signing domain 2) only contains the Non-Trusted World Content
certificate, which provides the hash of the Non-Trusted World
Bootloader. Compared to the TBBR CoT, there's no Non-Trusted World
Key certificate for simplicity.
Change-Id: I62f1e952522d84470acc360cf5ee63e4c4b0b4d9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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|
| d4b29105 | 13-Feb-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
include: move MHZ_TICKS_PER_SEC to utils_def.h
This patch moves the MHZ_TICKS_PER_SEC macro to utils_def.h
for other platforms to use.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id:
include: move MHZ_TICKS_PER_SEC to utils_def.h
This patch moves the MHZ_TICKS_PER_SEC macro to utils_def.h
for other platforms to use.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I6c4dc733f548d73cfdb3515ec9ad89a9efaf4407
show more ...
|
| 522338b9 | 19-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes I72846d86,I70c3d873,If675796a,I0dbf8091,Ie4f3ac83, ... into integration
* changes:
rcar_gen3: plat: Minor coding style fix for rcar_version.h
rcar_gen3: plat: Update IPL and Secure
Merge changes I72846d86,I70c3d873,If675796a,I0dbf8091,Ie4f3ac83, ... into integration
* changes:
rcar_gen3: plat: Minor coding style fix for rcar_version.h
rcar_gen3: plat: Update IPL and Secure Monitor Rev.2.0.6
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
rcar_gen3: drivers: board: Add new board revision for M3ULCB
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
rcar_gen3: plat: Update IPL and Secure Monitor Rev.2.0.5
rcar_gen3: plat: Change fixed destination address of BL31 and BL32
show more ...
|
| 6cec5702 | 19-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "TBBR: Reduce size of hash buffers when possible" into integration |
| 564074c2 | 19-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "TBBR: Reduce size of ECDSA key buffers" into integration |
| 76ce1028 | 18-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "coverity: fix MISRA violations" into integration |
| 2fe75a2d | 12-Feb-2020 |
Zelalem <zelalem.aweke@arm.com> |
coverity: fix MISRA violations
Fixes for the following MISRA violations:
- Missing explicit parentheses on sub-expression
- An identifier or macro name beginning with an
underscore, shall not be d
coverity: fix MISRA violations
Fixes for the following MISRA violations:
- Missing explicit parentheses on sub-expression
- An identifier or macro name beginning with an
underscore, shall not be declared
- Type mismatch in BL1 SMC handlers and tspd_main.c
Change-Id: I7a92abf260da95acb0846b27c2997b59b059efc4
Signed-off-by: Zelalem <zelalem.aweke@arm.com>
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|
| 0b4e5921 | 17-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
TBBR: Reduce size of hash buffers when possible
The TBBR implementation extracts hashes from certificates and stores
them in static buffers. TF-A supports 3 variants of SHA right now:
SHA-256, SHA-3
TBBR: Reduce size of hash buffers when possible
The TBBR implementation extracts hashes from certificates and stores
them in static buffers. TF-A supports 3 variants of SHA right now:
SHA-256, SHA-384 and SHA-512. When support for SHA-512 was added in
commit 9a3088a5f509084e60d9c55bf53985c5ec4ca821 ("tbbr: Add build flag
HASH_ALG to let the user to select the SHA"), the hash buffers got
unconditionally increased from 51 to 83 bytes each. We can reduce that
space if we're using SHA-256 or SHA-384.
This saves some BSS space in both BL1 and BL2:
- BL1 with SHA-256: saving 168 bytes.
- BL1 with SHA-384: saving 80 bytes.
- BL2 with SHA-256: saving 384 bytes.
- BL2 with SHA-384: saving 192 bytes.
Change-Id: I0d02e5dc5f0162e82339c768609c9766cfe7e2bd
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| 495599cd | 17-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
TBBR: Reduce size of ECDSA key buffers
The TBBR implementation extracts public keys from certificates and
stores them in static buffers. DER-encoded ECDSA keys are only 91 bytes
each but were each a
TBBR: Reduce size of ECDSA key buffers
The TBBR implementation extracts public keys from certificates and
stores them in static buffers. DER-encoded ECDSA keys are only 91 bytes
each but were each allocated 294 bytes instead. Reducing the size of
these buffers saves 609 bytes of BSS in BL2 (294 - 91 = 203 bytes for
each of the 3 key buffers in use).
Also add a comment claryfing that key buffers are tailored on RSA key
sizes when both ECDSA and RSA keys are used.
Change-Id: Iad332856e7af1f9814418d012fba3e1e9399f72a
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| cc4e7ad4 | 26-Dec-2019 |
Chiaki Fujii <chiaki.fujii.wj@renesas.com> |
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.40.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.40.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: If675796a2314e769602af21bf5cc6b10962d4f29
show more ...
|
| 1f420077 | 06-Dec-2019 |
Chiaki Fujii <chiaki.fujii.wj@renesas.com> |
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.39.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.39.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: I0dbf8091f9de9bb6d2d4f94007a5813fff14789f
show more ...
|
| 0fdfe245 | 28-Nov-2019 |
Yusuke Goda <yusuke.goda.sx@renesas.com> |
rcar_gen3: drivers: board: Add new board revision for M3ULCB
Board Revision[2:0]
3'b000 Rev1.0
3'b011 Rev3.0 [New]
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Marek Vas
rcar_gen3: drivers: board: Add new board revision for M3ULCB
Board Revision[2:0]
3'b000 Rev1.0
3'b011 Rev3.0 [New]
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: Ie4f3ac83cc20120ede21052f7452327049565e60
show more ...
|
| ba63b5c9 | 18-Sep-2019 |
Chiaki Fujii <chiaki.fujii.wj@renesas.com> |
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.38.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut
rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N
[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.38.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: I49cf8f778b849a6ee97bc9f6948c45b07dc467b1
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|
| 50cabf6d | 21-Oct-2018 |
Samuel Holland <samuel@sholland.org> |
allwinner: Add a msgbox driver for use with SCPI
The function names follow the naming convention used by the existing
ARM SCPI client.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id:
allwinner: Add a msgbox driver for use with SCPI
The function names follow the naming convention used by the existing
ARM SCPI client.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I543bae7d46e206eb405dbedfcf7aeba88a12ca48
show more ...
|
| 98367c80 | 21-Oct-2018 |
Samuel Holland <samuel@sholland.org> |
arm/css/scpi: Don't panic if the SCP fails to respond
Instead, pass back the error to the calling function. This allows
platform code to fall back to another PSCI implementation if
scpi_wait_ready()
arm/css/scpi: Don't panic if the SCP fails to respond
Instead, pass back the error to the calling function. This allows
platform code to fall back to another PSCI implementation if
scpi_wait_ready() or a later SCPI command fails.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Ib4411e63c2512857f09ffffe1c405358dddeb4a6
show more ...
|