fix: remove useless "return" at void functions

void functions() returns nothing. So remove useless "return".

found using checkpatch.pl[1]

[1]: https://review.coreboot.org/plugins/gitiles/coreboot/

fix: remove useless "return" at void functions

void functions() returns nothing. So remove useless "return".

found using checkpatch.pl[1]

[1]: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/util/lint/checkpatch.pl

Change-Id: I3daab2abec225a657af48f7d8c215cc554713074
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>

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fix(gicv3): fixed bug in the initialization of GICv3 SGIs/(E)PPIs interrupt priorities

Default priority was not being set for all interrupts (gicr_write_ipriorityr takes INTID, not register number).

fix(gicv3): fixed bug in the initialization of GICv3 SGIs/(E)PPIs interrupt priorities

Default priority was not being set for all interrupts (gicr_write_ipriorityr takes INTID, not register number). The fix makes the loop to pass INTID in range 0, 4, 8, 12, ...

Signed-off-by: Sylwester Garncarek <sylwester.garncarek@sciopta.com>
Change-Id: Iaa975f6af49f5826c2811161f55242844c28ea81

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fix(gic): wrap cache enabled assert under plat_can_cmo

with reference to feature 04c730 (feat(cpus): make cache ops conditional),
booting with caches in debug recovery means SCTLR_C_BIT will be 0.
W

fix(gic): wrap cache enabled assert under plat_can_cmo

with reference to feature 04c730 (feat(cpus): make cache ops conditional),
booting with caches in debug recovery means SCTLR_C_BIT will be 0.
Wrap the assert for the d-cache enabled check in CONDITIONAL_CMO and
plat_can_cmo calls to allow booting with d-cache disabled.

Signed-off-by: Channagoud kadabi <kadabi@google.com>
Change-Id: I80153df493d1ec9e5e354c7c2e6a14322d22c446

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fix(rss): do not consider MHU_ERR_ALREADY_INIT as error

rss_comms_init() should return with success (0) in case of an internal
MHU_ERR_ALREADY_INIT error code which is harmless (occurs when
rss_comm

fix(rss): do not consider MHU_ERR_ALREADY_INIT as error

rss_comms_init() should return with success (0) in case of an internal
MHU_ERR_ALREADY_INIT error code which is harmless (occurs when
rss_comms_init() is called multiple times in a row).

Change-Id: Ibb1fef48a60866e80d3a389128cb8eef1332ea01
Signed-off-by: David Vincze <david.vincze@arm.com>

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build: warn about RSS driver experimental status

Change-Id: I93b7afe17395a94e1ec0ae09457eb2fd320d59a9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "fix(gicv3/multichip): fix overflow caused by left shift" into integration

Merge "feat(ethos-n)!: add support for SMMU streams" into integration

fix(gicv3/multichip): fix overflow caused by left shift

When spi_id_max is 5119, the expression `(spi_id_max - 4096U + 1U >> 5)`
evaluates to 32 leading to undefined behavior when using it to left
s

fix(gicv3/multichip): fix overflow caused by left shift

When spi_id_max is 5119, the expression `(spi_id_max - 4096U + 1U >> 5)`
evaluates to 32 leading to undefined behavior when using it to left
shift 1. Fix this undefined behavior.

Reported-by coverity scan:
https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.org/thread/RMB4U7COL6IONZWEGF2FWXOQ6FPDIT4U/

```
large_shift: In expression 1 << (spi_id_max - 4096U + 1U >> 5), left
shifting by more than 31 bits has undefined behavior. The shift
amount, spi_id_max - 4096U + 1U >> 5, is as much as 32.
```

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I5e77a78b81a6d0367875e7ea432a82b6ba0e587c

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fix(rss): clear the message buffer

Clear the MHU message buffer to remove assets from memory.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I730e7b044eaf0bf517532a12146e4f542949544e

fix(rss): remove dependency on attestation header

Platform must define the maximum size of the message
over MHU.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I91a6c132c946f4465178910b8ea

fix(rss): remove dependency on attestation header

Platform must define the maximum size of the message
over MHU.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I91a6c132c946f4465178910b8ea83544f562e837

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fix(rss): rename AP-RSS message size macro

Adding PLAT_* prefix to indicate that the
platform needs to provide this definition.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I0bd02be405fd

fix(rss): rename AP-RSS message size macro

Adding PLAT_* prefix to indicate that the
platform needs to provide this definition.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I0bd02be405fd8b1e625bd2b82647ebb2b58265fc

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fix(rss): reduce input validation for measured boot

Remove an assert, which checks whether output buffer is
provided, because in measured boot there is no output.

Signed-off-by: Tamas Ban <tamas.ba

fix(rss): reduce input validation for measured boot

Remove an assert, which checks whether output buffer is
provided, because in measured boot there is no output.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I08db9c2eea1da2d7120c9872ffbf8d8ee45c8e08

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fix(rss): fix build issues with comms protocol

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I77d2d3c5ac39a840b768f84f859d76b3965749aa

feat(ethos-n)!: add support for SMMU streams

The Arm(R) Ethos(TM)-N NPU driver now supports configuring the SMMU
streams that the NPU shall use and will therefore no longer delegate
access to these

feat(ethos-n)!: add support for SMMU streams

The Arm(R) Ethos(TM)-N NPU driver now supports configuring the SMMU
streams that the NPU shall use and will therefore no longer delegate
access to these registers to the non-secure world. In order for the
driver to support this, the device tree parsing has been updated to
support parsing the allocators used by the NPU and what SMMU stream that
is associated with each allocator.

To keep track of what NPU device each allocator is associated with, the
resulting config from the device tree parsing will now group the NPU
cores and allocators into their respective NPU device.

The SMC API has been changed to allow the caller to specify what
allocator the NPU shall be configured to use and the API version has
been bumped to indicate this change.

Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I6ac43819133138614e3f55a014e93466fe3d5277

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build(rss): introduce rss_comms.mk makefile

Provide a new makefile as a convenience for platform makefiles to pull
in the list of source files and headers for the RSS communication
driver.

Change-I

build(rss): introduce rss_comms.mk makefile

Provide a new makefile as a convenience for platform makefiles to pull
in the list of source files and headers for the RSS communication
driver.

Change-Id: I188a1a8f4e77318cdc87c3155b280090c46ce813
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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feat(rss): add new comms protocols

The current comms protocol (where arguments and return data is embedded
into the MHU message) is now protocol v0. Protocol v1 embeds pointers
into the message, and

feat(rss): add new comms protocols

The current comms protocol (where arguments and return data is embedded
into the MHU message) is now protocol v0. Protocol v1 embeds pointers
into the message, and has the RSS retrieve the data via DMA.

Change-Id: I08d7f09c4eaea673769fde9eee194447a99f1b78
Signed-off-by: Raef Coles <raef.coles@arm.com>

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refactor(libc): clean up dependencies in libc

- Removing platform dependencies from libc modules.
- Replacing panicking with actual error handling.
- Debug macros are included indirectly from assert

refactor(libc): clean up dependencies in libc

- Removing platform dependencies from libc modules.
- Replacing panicking with actual error handling.
- Debug macros are included indirectly from assert.h. Removing
"platform_def.h" from assert.h and adding "common/debug.h"
where the macros are used.
- Removing hack for fixing PLAT_LOG_LEVEL_ASSERT to 40.
Instead removing assert with expression, as this
does not provide additional information.

Signed-off-by: Claus Pedersen <claustbp@google.com>
Change-Id: Icc201ea7b63c1277e423c1cfd13fd6816c2bc568

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Merge changes from topic "provencore-spd" into integration

* changes:
feat(zynqmp): add support for ProvenCore
feat(services): add a SPD for ProvenCore
feat(gic): add APIs to raise NS and S-EL

Merge changes from topic "provencore-spd" into integration

* changes:
feat(zynqmp): add support for ProvenCore
feat(services): add a SPD for ProvenCore
feat(gic): add APIs to raise NS and S-EL1 SGIs

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feat(scmi): send powerdown request to online secondary cpus

To initiate a reset or reboot, the nonsecure OS invokes the PSCI
SYSTEM_RESET function from any one core. As per the PSCI specification,
i

feat(scmi): send powerdown request to online secondary cpus

To initiate a reset or reboot, the nonsecure OS invokes the PSCI
SYSTEM_RESET function from any one core. As per the PSCI specification,
it is the responsibility of firmware to implement the system view of
the reset or reboot operation. For the platforms supported by CSS,
trigger the reset/reboot operation by sending an SGI to rest all CPUs
which are online. The CPUs respond to this interrupt by initiating its
powerdown sequence.

In addition to these changes, fix coding style issues that are not
directly related to the code being introduced in this patch.

Change-Id: I547253ee28ef7eefa78180d016893671a406bbfa
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>

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feat(scmi): set warm reboot entry point

Before issuing the system power down command, set the trusted mailbox
to 0. This will ensure that in the case of a warm/cold reset, the
primary CPU executes f

feat(scmi): set warm reboot entry point

Before issuing the system power down command, set the trusted mailbox
to 0. This will ensure that in the case of a warm/cold reset, the
primary CPU executes from the cold boot sequence, clearing any stale
jump address at this location.

Change-Id: I491ef5baf7a6728acd7e90e4558939ba77b8f9bf
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>

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feat(gic): add APIs to raise NS and S-EL1 SGIs

This patch adds two helper functions:
- plat_ic_raise_ns_sgi to raise a NS SGI
- plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI

Signed-off-by: Florian

feat(gic): add APIs to raise NS and S-EL1 SGIs

This patch adds two helper functions:
- plat_ic_raise_ns_sgi to raise a NS SGI
- plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI

Signed-off-by: Florian Lugou <florian.lugou@provenrun.com>
Change-Id: I6f262dd1da1d77fec3f850eb74189e726b8e24da

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feat(gicv3): validate multichip data for GIC-700

This patch introduces support to validate the GIC-700 multichip data
structure passed by the platform.

GIC-700 provides support for SPI ID 4096 to 5

feat(gicv3): validate multichip data for GIC-700

This patch introduces support to validate the GIC-700 multichip data
structure passed by the platform.

GIC-700 provides support for SPI ID 4096 to 5119. Platforms using the
GIC-700 in a multichip configuration can enable these SPI IDs. The
driver needs to validate the data before using it and this patch
implements the support.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I6f85ec21ef7a59f397fcf6271f8c13c24fe47697

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fix(gic600): implement workaround to forward highest priority interrupt

If the interrupt being targeted is released from the CPU before the
CLEAR command is sent to the CPU then a subsequent SET com

fix(gic600): implement workaround to forward highest priority interrupt

If the interrupt being targeted is released from the CPU before the
CLEAR command is sent to the CPU then a subsequent SET command may not
be delivered in a finite time. To workaround this, issue an unblocking
event by toggling GICR_CTLR.DPG* bits after clearing the cpu group
enable (EnableGrp* bits of GIC CPU interface register)
This fix is implemented as per the errata 2384374-part 2 workaround
mentioned here:
https://developer.arm.com/documentation/sden892601/latest/

Change-Id: I13926ceeb7740fa4c05cc5b43170e7ce49598f70
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(smmu): add SMMU abort transaction function

Created a function to abort all pending NS DMA transactions to
engage complete DMA protection. This call will be used by the
subsequent DRTM implement

feat(smmu): add SMMU abort transaction function

Created a function to abort all pending NS DMA transactions to
engage complete DMA protection. This call will be used by the
subsequent DRTM implementation changes.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I94992b54c570327d6746295073822a9c0ebdc85d

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feat(drivers/arm/rss): add RSS communication driver

This commit adds a driver to conduct the AP's communication
with the Runtime Security Subsystem (RSS).
RSS is Arm's reference implementation for t

feat(drivers/arm/rss): add RSS communication driver

This commit adds a driver to conduct the AP's communication
with the Runtime Security Subsystem (RSS).
RSS is Arm's reference implementation for the CCA HES [1].
It can be considered as a secure enclave to which, for example,
certain services can be offloaded such as initial attestation.

RSS comms driver:
- Relies on MHU v2.x communication IP, using a generic MHU API,
- Exposes the psa_call(..) API to the upper layers.

[1] https://developer.arm.com/documentation/DEN0096/latest

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: David Vincze <david.vincze@arm.com>
Change-Id: Ib174ac7d1858834006bbaf8aad0eb31e3a3ad107

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