| 5fc1a32a | 02-Nov-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs: deletion of a few deprecated platforms not yet confirmed" into integration |
| 41b5a23c | 29-Oct-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
docs(versal-net): add TSP build documentation
Add information about Versal NET platform for TSP and provide
the build commands.
Change-Id: Id7c9d75f8a42813ca2bfd18494bfc6b73df0af52
Signed-off-by: P
docs(versal-net): add TSP build documentation
Add information about Versal NET platform for TSP and provide
the build commands.
Change-Id: Id7c9d75f8a42813ca2bfd18494bfc6b73df0af52
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| 7b7c5350 | 29-Oct-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
docs(versal): add TSP build documentation
Add information about Versal platform for TSP and provide
the build commands.
Change-Id: I7106ab477a881c58e1c45863bd6854d188982282
Signed-off-by: Prasad Ku
docs(versal): add TSP build documentation
Add information about Versal platform for TSP and provide
the build commands.
Change-Id: I7106ab477a881c58e1c45863bd6854d188982282
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| 42604d2d | 13-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
docs(ras): update RAS documentation
Add details about RAS error handling philosophies and its implementation
It also updates the tests introduced to verify them.
Signed-off-by: Manish Pandey <manis
docs(ras): update RAS documentation
Add details about RAS error handling philosophies and its implementation
It also updates the tests introduced to verify them.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Iedc8c1e713dad05baadd58e5752df36fa00121a7
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| 9f9bfd7a | 21-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
docs(el3-runtime): update BL31 exception vector handling
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ieae66bafe1cdd253edebecddea156551144a1cc9 |
| f87e54f7 | 10-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT
This patch removes RAS_FFH_SUPPORT macro which is the combination of
ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an
inter
fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT
This patch removes RAS_FFH_SUPPORT macro which is the combination of
ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an
internal macro FFH_SUPPORT which gets enabled when platforms wants
to enable lower EL EA handling at EL3. The internal macro FFH_SUPPORT
will be automatically enabled if HANDLE_EA_EL3_FIRST_NS is enabled.
FFH_SUPPORT along with ENABLE_FEAT_RAS will be used in source files
to provide equivalent check which was provided by RAS_FFH_SUPPORT
earlier. In generic code we needed a macro which could abstract both
HANDLE_EA_EL3_FIRST_NS and RAS_FFH_SUPPORT macros that had limitations.
Former was tied up with NS world only while the latter was tied to RAS
feature.
This is to allow Secure/Realm world to have their own FFH macros
in future.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ie5692ccbf462f5dcc3f005a5beea5aa35124ac73
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| 970a4a8d | 10-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
fix(ras): restrict ENABLE_FEAT_RAS to have only two states
As part of migrating RAS extension to feature detection mechanism, the
macro ENABLE_FEAT_RAS was allowed to have dynamic detection (FEAT_ST
fix(ras): restrict ENABLE_FEAT_RAS to have only two states
As part of migrating RAS extension to feature detection mechanism, the
macro ENABLE_FEAT_RAS was allowed to have dynamic detection (FEAT_STATE
2). Considering this feature does impact execution of EL3 and we need
to know at compile time about the presence of this feature. Do not use
dynamic detection part of feature detection mechanism.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I23858f641f81fbd81b6b17504eb4a2cc65c1a752
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| d5be8027 | 05-Sep-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
docs(spm-mm): remove reference to SEL2 SPMC
As the SEL2 SPMC design doc is migrated to Hafnium tree, remove the
reference to this implementation from TF-A's SPM-MM doc.
Signed-off-by: Olivier Depre
docs(spm-mm): remove reference to SEL2 SPMC
As the SEL2 SPMC design doc is migrated to Hafnium tree, remove the
reference to this implementation from TF-A's SPM-MM doc.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I1609c7d1d098420412dffc7b1309cc9c11502f8a
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| 6c33e871 | 05-Sep-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
docs: remove SEL2 SPMC threat model
The SEL2/Hafnium SPMC implementation threat model is now hosted at [1].
[1] https://hafnium.readthedocs.io/en/latest/threat_model_spm.html
Signed-off-by: Olivie
docs: remove SEL2 SPMC threat model
The SEL2/Hafnium SPMC implementation threat model is now hosted at [1].
[1] https://hafnium.readthedocs.io/en/latest/threat_model_spm.html
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I83d3f21ef0ee9364529c7b80de9872034ff92b09
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| 0fd975ac | 05-Sep-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
docs: remove unused SPM related diagrams
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ia60c4aa6a0aa0da5765d295e658964e6faa5960a |
| 48b92c60 | 30-Oct-2023 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "mb/psa-crypto-ecdsa" into integration
* changes:
docs: mark PSA_CRYPTO as an experimental feature
feat(fvp): increase BL1 RW area for PSA_CRYPTO implementation
feat(m
Merge changes from topic "mb/psa-crypto-ecdsa" into integration
* changes:
docs: mark PSA_CRYPTO as an experimental feature
feat(fvp): increase BL1 RW area for PSA_CRYPTO implementation
feat(mbedtls-psa): mbedTLS PSA Crypto with ECDSA
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| 113273aa | 26-Oct-2023 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "sm/err_errata" into integration
* changes:
fix(cpus): fix the rev-var of Neoverse-V1
fix(errata-abi): update the Neoverse-N2 errata ABI struct
fix(errata-abi): update
Merge changes from topic "sm/err_errata" into integration
* changes:
fix(cpus): fix the rev-var of Neoverse-V1
fix(errata-abi): update the Neoverse-N2 errata ABI struct
fix(errata-abi): update the neoverse-N1 errata ABI struct
fix(cpus): fix the rev-var of Cortex-X2
fix(errata-abi): update the Cortex-A78C errata ABI struct
fix(cpus): update the rev-var for Cortex-A78AE
fix(errata-abi): update the Cortex-A76 errata ABI struct
fix(cpus): fix the rev-var for Cortex-A710
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| 4c02c99b | 26-Oct-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs: deletion of a few deprecated platforms not yet confirmed
Updated the 'Deprecated Platforms' table to reflect that the
deletion of sgi575 and rdn1Edge is still unconfirmed.
Change-Id: Ie8e8af5
docs: deletion of a few deprecated platforms not yet confirmed
Updated the 'Deprecated Platforms' table to reflect that the
deletion of sgi575 and rdn1Edge is still unconfirmed.
Change-Id: Ie8e8af55a735f624f5ee604d75bb497d870620cd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 98ea2d81 | 26-Oct-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs: mark PSA_CRYPTO as an experimental feature
Updated the documentation to mark PSA_CRYPTO as an experimental
feature.
Change-Id: I894b687d6727fe7f80df54e6b08937e171f459b6
Signed-off-by: Manish
docs: mark PSA_CRYPTO as an experimental feature
Updated the documentation to mark PSA_CRYPTO as an experimental
feature.
Change-Id: I894b687d6727fe7f80df54e6b08937e171f459b6
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| edebefbc | 11-Oct-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
fix(mpam): refine MPAM initialization and enablement process
Restricts MPAM to only NS world and enables trap to EL3 for access of
MPAM registers from lower ELs of Secure and Realm world.
This patc
fix(mpam): refine MPAM initialization and enablement process
Restricts MPAM to only NS world and enables trap to EL3 for access of
MPAM registers from lower ELs of Secure and Realm world.
This patch removes MPAM enablement from global context and adds it to
EL3 State context which enables/disables MPAM during world switches.
Renamed ENABLE_MPAM_FOR_LOWER_ELS to ENABLE_FEAT_MPAM and
removed mpam_init_el3() as RESET behaviour is trapping.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I131f9dba5df236a71959b2d425ee11af7f3c38c4
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| 17e0a8c5 | 25-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_remove_shm" into integration
* changes:
docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated
feat(stm32mp15): disable OP-TEE shared memory |
| 6e86475d | 12-Oct-2023 |
Sona Mathew <sonarebecca.mathew@arm.com> |
fix(cpus): workaround for Cortex-A510 erratum 2080326
Cortex-A510 erratum 2080326 is a Cat B erratum that applies
to all revisions <= r0p2 and is fixed in r0p3.
The workaround sequence helps perform
fix(cpus): workaround for Cortex-A510 erratum 2080326
Cortex-A510 erratum 2080326 is a Cat B erratum that applies
to all revisions <= r0p2 and is fixed in r0p3.
The workaround sequence helps perform a DSB after each TLBI
instruction and can be applied only for version r0p2 and has
minimal performance impact.
The workaround is not applicable for versions < r0p2.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1873361/latest
Change-Id: Ib9bce8b711c25a79f7b2f891ae6f8b366fc80ddd
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| ab2b56df | 16-Oct-2023 |
Sona Mathew <sonarebecca.mathew@arm.com> |
fix(cpus): fix the rev-var of Neoverse-V1
Update the revision and variant information in the
errata ABI file, neoverse_v1.S file for erratum ID - 2294912
to match the revision and variant in the lat
fix(cpus): fix the rev-var of Neoverse-V1
Update the revision and variant information in the
errata ABI file, neoverse_v1.S file for erratum ID - 2294912
to match the revision and variant in the latest SDEN.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1401781/latest
Change-Id: I38a0f53c3515860ba442b5c0872c8ab051fdda6f
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| 8ae66d62 | 16-Oct-2023 |
Sona Mathew <sonarebecca.mathew@arm.com> |
fix(cpus): fix the rev-var of Cortex-X2
Update the revision and variant information in the
errata ABI file, cortex_X2.S file for erratum ID - 2058056
to match the revision and variant in the latest
fix(cpus): fix the rev-var of Cortex-X2
Update the revision and variant information in the
errata ABI file, cortex_X2.S file for erratum ID - 2058056
to match the revision and variant in the latest SDEN.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I28ee39949d977c53d6f5243100f0c29bc3c0428c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| c814619a | 10-Oct-2023 |
Sona Mathew <sonarebecca.mathew@arm.com> |
fix(cpus): update the rev-var for Cortex-A78AE
Update the revision and variant information in the
cortex_a78_ae.s and errata ABI file for erratum ID - 2376748
based on the latest SDEN.
SDEN documen
fix(cpus): update the rev-var for Cortex-A78AE
Update the revision and variant information in the
cortex_a78_ae.s and errata ABI file for erratum ID - 2376748
based on the latest SDEN.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1707912/latest
Change-Id: I082aac41adf717b0d5d59046a8933a3f5a3de94f
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| 2bf7939a | 10-Oct-2023 |
Sona Mathew <sonarebecca.mathew@arm.com> |
fix(cpus): fix the rev-var for Cortex-A710
Update the revision and variant information in the
errata ABI file, cortex_A710.S file for erratum ID - 2058056
and erratum ID - 2055002 to match the revis
fix(cpus): fix the rev-var for Cortex-A710
Update the revision and variant information in the
errata ABI file, cortex_A710.S file for erratum ID - 2058056
and erratum ID - 2055002 to match the revision and variant
in the latest SDEN.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775101/latest
Change-Id: Ie010dae90dabf8670f588a06f9a606cf41e22afa
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| bf41b992 | 20-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(maintainers): remove Jorge Ramirez-Ortiz from rcar3 maintainers" into integration |
| 12e683a6 | 30-Jun-2022 |
Yann Gautier <yann.gautier@st.com> |
docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated
TF-A is no more in charge of configuring OP-TEE shared memory.
Set the STM32MP15_OPTEE_RSV_SHM flag as deprecated (as well as the code
depend
docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated
TF-A is no more in charge of configuring OP-TEE shared memory.
Set the STM32MP15_OPTEE_RSV_SHM flag as deprecated (as well as the code
depending on it).
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I863d9a1e45e0bfc2f45d9bd84b90d626738934ab
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| d17c7324 | 18-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
docs: add code-owners for Firmare Handoff Library
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I2c64e7582a744f54b54085d3a1d7ac91e269ce3d |
| 542ff765 | 18-Oct-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(maintainers): remove Jorge Ramirez-Ortiz from rcar3 maintainers
On behalf of Jorge himself.
Change-Id: I2dca445a240f7bc16c02365e936b064f6a246d89
Signed-off-by: Sandrine Bailleux <sandrine.bail
docs(maintainers): remove Jorge Ramirez-Ortiz from rcar3 maintainers
On behalf of Jorge himself.
Change-Id: I2dca445a240f7bc16c02365e936b064f6a246d89
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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