| 093ba62e | 21-Aug-2020 |
Peng Fan <peng.fan@nxp.com> |
doc: Correct CPACR.FPEN usage
To avoid trapping from EL0/1, FPEN bits need to be set 0x3, not clearing.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: Ic34e9aeb876872883c5f040618ed6d50f21dac
doc: Correct CPACR.FPEN usage
To avoid trapping from EL0/1, FPEN bits need to be set 0x3, not clearing.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: Ic34e9aeb876872883c5f040618ed6d50f21dacd0
show more ...
|
| 61f0ffc4 | 05-Aug-2020 |
johpow01 <john.powell@arm.com> |
Workaround for Neoverse N1 erratum 1868343
Neoverse N1 erratum 1868343 is a Cat B erratum, present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the CPUACT
Workaround for Neoverse N1 erratum 1868343
Neoverse N1 erratum 1868343 is a Cat B erratum, present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the CPUACTLR_EL1 system register, which delays instruction fetch after branch misprediction. This workaround will have a small impact on performance.
SDEN can be found here: https://documentation-service.arm.com/static/5f2c130260a93e65927bc92f
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I37da2b3b2da697701b883bff9a1eff2772352844
show more ...
|
| 70b6701b | 07-Sep-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "doc: Improve contribution guidelines" into integration |
| cd62b834 | 03-Sep-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "Add Chris Kay as code owner for CMake Build Definitions." into integration |
| aec40abc | 03-Sep-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
Add Chris Kay as code owner for CMake Build Definitions.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I69365d4aed1160af41e291f6e4b1dd31cbd12e02 |
| 959a0486 | 02-Sep-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "maintainers: step down as code owner of UniPhier platform" into integration |
| e98d934a | 01-Sep-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "Remove Jack Bond-Preston as CMake Build Definitions code owner" into integration |
| 8a737ee4 | 29-Aug-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
maintainers: step down as code owner of UniPhier platform
I am leaving Socionext. Orphan the UniPhier platform until somebody takes the role.
Change-Id: I54d3da6d49c1ccaaa475431654db578b683db88a Si
maintainers: step down as code owner of UniPhier platform
I am leaving Socionext. Orphan the UniPhier platform until somebody takes the role.
Change-Id: I54d3da6d49c1ccaaa475431654db578b683db88a Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
| fd1fe2d5 | 28-Aug-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
Remove Jack Bond-Preston as CMake Build Definitions code owner
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I542ec3cf1bb929a5656dda6dbad816b69837c646 |
| e87c8231 | 23-Aug-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
doc: Update the cot-binding for nv-counter node
Updated the cot-binding documentation to add 'id' property for the trusted and non-trusted nv-counters.
Signed-off-by: Manish V Badarkhe <Manish.Bada
doc: Update the cot-binding for nv-counter node
Updated the cot-binding documentation to add 'id' property for the trusted and non-trusted nv-counters.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: If1c628c5b90fe403dd96c7cd0cd04f37288c965c
show more ...
|
| 7969747e | 14-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Improve contribution guidelines
- Add some guidance about the type of information a patch author should provide to facilitate the review (and for future reference).
- Make a number of implic
doc: Improve contribution guidelines
- Add some guidance about the type of information a patch author should provide to facilitate the review (and for future reference).
- Make a number of implicit expectations explicit: - Every patch must compile. - All CI tests must pass.
- Mention that the patch author is expected to add reviewers and explain how to choose them.
- Explain the patch submission rules in terms of Gerrit labels.
Also do some cosmetic changes, like adding empty lines, shuffling some paragraphs around.
Change-Id: I6dac486684310b5a35aac7353e10fe5474a81ec5 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| 768f8331 | 21-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "doc: Minor formatting improvement in the coding guidelines document" into integration |
| 06ffa166 | 20-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Recommend using C rather than assembly language
Add a section for that in the coding guidelines.
Change-Id: Ie6819c4df5889a861460eb96acf2bc9c0cfb494e Signed-off-by: Sandrine Bailleux <sandrine
doc: Recommend using C rather than assembly language
Add a section for that in the coding guidelines.
Change-Id: Ie6819c4df5889a861460eb96acf2bc9c0cfb494e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| 76380111 | 20-Aug-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "at_errata_fix" into integration
* changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT
Merge changes from topic "at_errata_fix" into integration
* changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT instruction
show more ...
|
| 9061c0c9 | 20-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Minor formatting improvement in the coding guidelines document
Change-Id: I5362780db422772fd547dc8e68e459109edccdd0 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| 6a2426a9 | 11-Jun-2020 |
Masahisa Kojima <masahisa.kojima@linaro.org> |
qemu/qemu_sbsa: enable SPM support
Enable the spm_mm framework for the qemu_sbsa platform. Memory layout required for spm_mm is created in secure SRAM.
Co-developed-by: Fu Wei <fu.wei@linaro.org> S
qemu/qemu_sbsa: enable SPM support
Enable the spm_mm framework for the qemu_sbsa platform. Memory layout required for spm_mm is created in secure SRAM.
Co-developed-by: Fu Wei <fu.wei@linaro.org> Signed-off-by: Fu Wei <fu.wei@linaro.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Change-Id: I104a623e8bc1e44d035b95f014a13b3f8b33a62a
show more ...
|
| e008a29a | 31-Jul-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
doc: Update description for AT speculative workaround
Documented the CPU specific build macros created for AT speculative workaround.
Updated the description of 'ERRATA_SPECULATIVE_AT' errata worka
doc: Update description for AT speculative workaround
Documented the CPU specific build macros created for AT speculative workaround.
Updated the description of 'ERRATA_SPECULATIVE_AT' errata workaround option.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ie46a80d4e8183c1d5c8b153f08742a04d41a2af2
show more ...
|
| 0d4ad1fe | 17-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/arm: Use common build flag for using generic sp804 driver" into integration |
| fddfb3ba | 12-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/arm: Use common build flag for using generic sp804 driver
SP804 TIMER is not platform specific, and current code base adds multiple defines to use this driver. Like FVP_USE_SP804_TIMER and FVP_
plat/arm: Use common build flag for using generic sp804 driver
SP804 TIMER is not platform specific, and current code base adds multiple defines to use this driver. Like FVP_USE_SP804_TIMER and FVP_VE_USE_SP804_TIMER.
This patch removes platform specific build flag and adds generic flag `USE_SP804_TIMER` to be set to 1 by platform if needed.
Change-Id: I5ab792c189885fd1b98ddd187f3a38ebdd0baba2 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
show more ...
|
| e256cc63 | 12-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Refactor the contribution guidelines
Ensuring that each file changed by a patch has the correct copyright and license information does not only apply to documentation files but to all files wit
doc: Refactor the contribution guidelines
Ensuring that each file changed by a patch has the correct copyright and license information does not only apply to documentation files but to all files within the source tree.
Move the guidance for copyright and license headers out of the paragraph about updating the documentation to avoid any confusion.
Also do some cosmetic changes (adding empty lines, fitting in longer lines in the 80-column limit, ...) to improve the readability of the RST file.
Change-Id: I241a2089ca9db70f5a9f26b7070b947674b43265 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| 155eac29 | 12-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Mention the TF-A Tech Forum as a way to contact developers
Change-Id: Ib4ad853ebb6e28adcf9ed14714d43799f9370343 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| ecad5b89 | 12-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Emphasize that security issues must not be reported as normal bugs
Change-Id: I43e452c9993a8608b20ec029562982f5dcf8e6b2 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| a88b3c29 | 03-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Stop advising the creation of Phabricator issues
We have noticed that Phabricator (the ticketing system on tf.org [1]) has far less visibility within the community than the mailing list [2]. Fo
doc: Stop advising the creation of Phabricator issues
We have noticed that Phabricator (the ticketing system on tf.org [1]) has far less visibility within the community than the mailing list [2]. For this reason, let's drop usage of Phabricator for anything else than bug reports. For the rest, advise contributors to start a discussion on the mailing list, where they are more likely to get feedback.
[1] https://developer.trustedfirmware.org/project/board/1/ [2] https://lists.trustedfirmware.org/mailman/listinfo/tf-a
Change-Id: I7d2d3d305ad0a0f8aacc2a2f25eb5ff429853a3f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| b3385aa0 | 11-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "TF-A AMU extension: fix detection of group 1 counters." into integration |
| 8f09da46 | 10-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "release/14.0" into integration
* changes: docs: marvell: update PHY porting layer description docs: marvell: update path in marvell documentation docs: marvell: updat
Merge changes from topic "release/14.0" into integration
* changes: docs: marvell: update PHY porting layer description docs: marvell: update path in marvell documentation docs: marvell: update build instructions with CN913x plat: marvell: octeontx: add support for t9130 plat: marvell: t9130: add SVC support plat: marvell: t9130: update AVS settings plat: marvell: t9130: pass actual CP count for load_image plat: marvell: armada: a7k: add support to SVC validation mode plat: marvell: armada: add support for twin-die combined memory device
show more ...
|