| aaf1d8df | 10-Jun-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "jc/detect_feat" into integration
* changes: feat(trbe): add trbe under feature detection mechanism feat(brbe): add brbe under feature detection mechanism |
| c1284a7f | 07-Jun-2022 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
fix(changelog): fix the broken link to commitlintrc.js
The link to commitlintrc.js file in the v2.7 changelog is updated.
Change-Id: I24ee736180d8df72b2d831e110a9a3a80a6d9862 Signed-off-by: Jayanth
fix(changelog): fix the broken link to commitlintrc.js
The link to commitlintrc.js file in the v2.7 changelog is updated.
Change-Id: I24ee736180d8df72b2d831e110a9a3a80a6d9862 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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| 47c681b7 | 19-May-2022 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(trbe): add trbe under feature detection mechanism
This change adds "FEAT_TRBE" to be part of feature detection mechanism.
Previously feature enablement flags were of boolean type, containing e
feat(trbe): add trbe under feature detection mechanism
This change adds "FEAT_TRBE" to be part of feature detection mechanism.
Previously feature enablement flags were of boolean type, containing either 0 or 1. With the introduction of feature detection procedure we now support three states for feature enablement build flags(0 to 2).
Accordingly, "ENABLE_TRBE_FOR_NS" flag is now modified from boolean to numeric type to align with the feature detection.
Change-Id: I53d3bc8dc2f6eac63feef22dfd627f3a48480afc Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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| 1298f2f1 | 09-May-2022 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(brbe): add brbe under feature detection mechanism
This change adds "FEAT_BRBE" to be part of feature detection mechanism.
Previously feature enablement flags were of boolean type, possessing e
feat(brbe): add brbe under feature detection mechanism
This change adds "FEAT_BRBE" to be part of feature detection mechanism.
Previously feature enablement flags were of boolean type, possessing either 0 or 1. With the introduction of feature detection procedure we now support three states for feature enablement build flags(0 to 2).
Accordingly, "ENABLE_BRBE_FOR_NS" flag is now modified from boolean to numeric type to align with the feature detection.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: I1eb52863b4afb10b808e2f0b6584a8a210d0f38c
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| 35f4c729 | 01-Jun-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "docs(changelog): changelog for v2.7 release" into integration |
| 24c5d206 | 19-May-2022 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
docs(changelog): changelog for v2.7 release
Change-Id: I573e5eb3c7fad097892292c8a967dc02d72d12e6 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
| ae985349 | 01-Jun-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "sb/threat-model" into integration
* changes: docs(threat-model): broaden the scope of threat #05 docs(threat-model): emphasize whether mitigations are implemented |
| 9eea92a1 | 28-Apr-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
docs(spm): refresh FF-A SPM design doc
- Move manifest binding doc as a dedicated SPM doc section. - Highlight introduction of an EL3 FF-A SPM solution. - Refresh TF-A build options. - Refresh PE MM
docs(spm): refresh FF-A SPM design doc
- Move manifest binding doc as a dedicated SPM doc section. - Highlight introduction of an EL3 FF-A SPM solution. - Refresh TF-A build options. - Refresh PE MMU configuration section. - Add arch extensions for security hardening section. - Minor corrections, typos fixes and rephrasing.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2db06c140ef5871a812ce00a4398c663d5433bb4
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| 79a91381 | 12-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
docs(spm): update FF-A manifest binding
- Add security state attribute to memory and device regions. - Rename device region reg attribution to base-address aligned with memory regions. - Add pages
docs(spm): update FF-A manifest binding
- Add security state attribute to memory and device regions. - Rename device region reg attribution to base-address aligned with memory regions. - Add pages-count field to device regions. - Refresh interrupt attributes description in device regions.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I901f48d410edb8b10f65bb35398b80f18105e427
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| 0677796c | 16-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(threat-model): broaden the scope of threat #05
- Cite crash reports as an example of sensitive information. Previously, it might have sounded like this was the focus of the threat.
- W
docs(threat-model): broaden the scope of threat #05
- Cite crash reports as an example of sensitive information. Previously, it might have sounded like this was the focus of the threat.
- Warn about logging high-precision timing information, as well as conditionally logging (potentially nonsensitive) information depending on sensitive information.
Change-Id: I33232dcb1e4b5c81efd4cd621b24ab5ac7b58685 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 7e32cdb2 | 13-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(threat-model): emphasize whether mitigations are implemented
For each threat, we now separate: - how to mitigate against it; - whether TF-A currently implements these mitigations.
A new "Mit
docs(threat-model): emphasize whether mitigations are implemented
For each threat, we now separate: - how to mitigate against it; - whether TF-A currently implements these mitigations.
A new "Mitigations implemented?" box is added to each threat to provide the implementation status. For threats that are partially mitigated from platform code, the original text is improved to make these expectations clearer. The hope is that platform integrators will have an easier time identifying what they need to carefully implement in order to follow the security recommendations from the threat model.
Change-Id: I8473d75946daf6c91a0e15e61758c183603e195b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| ccfa411b | 30-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ja/boot_protocol" into integration
* changes: docs(spm): update ff-a boot protocol documentation docs(maintainers): add code owner to sptool |
| 573ac373 | 24-May-2022 |
J-Alves <joao.alves@arm.com> |
docs(spm): update ff-a boot protocol documentation
Updated following sections to document implementation of the FF-A boot information protocol: - Describing secure partitions. - Secure Partition Pac
docs(spm): update ff-a boot protocol documentation
Updated following sections to document implementation of the FF-A boot information protocol: - Describing secure partitions. - Secure Partition Packages. - Passing boot data to the SP. Also updated description of the manifest field 'gp-register-num'.
Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I5c856437b60cdf05566dd636a01207c9b9f42e61
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| 77b73416 | 24-May-2022 |
J-Alves <joao.alves@arm.com> |
docs(maintainers): add code owner to sptool
Add Joao Alves as code owner to the sptool.
Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I9e44e322ba1cce62308bf16c4a6253f7b0117fe0 |
| 4466cf82 | 03-May-2022 |
Daniel Boulby <daniel.boulby@arm.com> |
fix(build): use DWARF 4 when building debug
GCC 11 and Clang 14 now use the DWARF 5 standard by default however Arm-DS currently only supports up to version 4. Therefore, for debug builds, ensure th
fix(build): use DWARF 4 when building debug
GCC 11 and Clang 14 now use the DWARF 5 standard by default however Arm-DS currently only supports up to version 4. Therefore, for debug builds, ensure the DWARF 4 standard is used. Also update references for Arm DS-5 to it's successor Arm-DS (Arm Development Studio).
Change-Id: Ica59588de3d121c1b795b3699f42c31f032cee49 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| 453abc80 | 19-May-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge changes from topic "sb/threat-model" into integration
* changes: docs(threat-model): make measured boot out of scope docs(threat-model): revamp threat #9 |
| 0a9a0edf | 19-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mb/drtm-work-phase-1" into integration
* changes: build(changelog): add new scope for Arm SMMU driver feat(smmu): add SMMU abort transaction function docs(build): add
Merge changes from topic "mb/drtm-work-phase-1" into integration
* changes: build(changelog): add new scope for Arm SMMU driver feat(smmu): add SMMU abort transaction function docs(build): add build option for DRTM support build(drtm): add DRTM support build option
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| 687cb6bd | 19-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/threat-model" into integration
* changes: docs(threat-model): remove some redundant text in threat #08 docs(threat-model): make experimental features out of scope
Merge changes from topic "sb/threat-model" into integration
* changes: docs(threat-model): remove some redundant text in threat #08 docs(threat-model): make experimental features out of scope docs(threat-model): cosmetic changes
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| d08c4966 | 16-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(threat-model): make measured boot out of scope
Add an explicit note that measured boot is out of scope of the threat model. For example, we have no threat related to the secure management of me
docs(threat-model): make measured boot out of scope
Add an explicit note that measured boot is out of scope of the threat model. For example, we have no threat related to the secure management of measurements, nor do we list its security benefits (e.g. in terms of repudiation).
This might be a future improvement to the threat model but for now just acknowledge it is not considered.
Change-Id: I2fb799a2ef0951aa681a755a948bd2b67415d156 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 859eabd4 | 14-Feb-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
docs(build): add build option for DRTM support
Documented the build option for DRTM support.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Signed-off-by: Lucian Paul-Trifu <lucian.paul
docs(build): add build option for DRTM support
Documented the build option for DRTM support.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com> Change-Id: Ic1543ee5f1d0046d5062d9744bd1a136d940b687
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| 48e73457 | 18-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/update-maintainers" into integration
* changes: docs(maintainers): remove John Powell from code owners docs(maintainers): remove Jimmy Brisson from code owners |
| ee211d08 | 17-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "docs: update supported FVP models documentation" into integration |
| 173c3afc | 28-Apr-2022 |
Maksims Svecovs <maksims.svecovs@arm.com> |
docs: update supported FVP models documentation
Update supported models list according to changes for v2.7 release in ci/tf-a-ci-scripts repository: * general FVP model update: 5c54251 * CSS model u
docs: update supported FVP models documentation
Update supported models list according to changes for v2.7 release in ci/tf-a-ci-scripts repository: * general FVP model update: 5c54251 * CSS model update: 3bd12fb
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com> Change-Id: I38c2ef2991b23873821c7e34ad2900b9ad023c4b
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| 652df566 | 17-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(maintainers): remove John Powell from code owners
John Powell is no longer part of the TF-A core team at Arm.
Change-Id: Iaa91474cb2c5c334b9ae6f2376724fad2677e285 Signed-off-by: Sandrine Baill
docs(maintainers): remove John Powell from code owners
John Powell is no longer part of the TF-A core team at Arm.
Change-Id: Iaa91474cb2c5c334b9ae6f2376724fad2677e285 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 9293278c | 17-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(maintainers): remove Jimmy Brisson from code owners
Jimmy Brisson is no longer part of the TF-A core team at Arm.
Change-Id: I2966c513a0c2cda438a05dedd42149d16190cbf6 Signed-off-by: Sandrine B
docs(maintainers): remove Jimmy Brisson from code owners
Jimmy Brisson is no longer part of the TF-A core team at Arm.
Change-Id: I2966c513a0c2cda438a05dedd42149d16190cbf6 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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