| 42c70c08 | 11-Nov-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
build: deprecate Arm TC0 FVP platform
Arm has decided to deprecate the TC0 platform. The development of software and fast models for TC0 platform has been discontinued. TC0 platform has been superse
build: deprecate Arm TC0 FVP platform
Arm has decided to deprecate the TC0 platform. The development of software and fast models for TC0 platform has been discontinued. TC0 platform has been superseded by the TC1 and TC2 platforms, which are already supported in TF-A and CI repositories.
Change-Id: I0269816a6ee733f732669027eae4e14cd60b6084 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 2b138c6b | 11-Nov-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "fix(cpus): workaround for Cortex-A77 erratum 2743100" into integration |
| 79bf51c2 | 11-Nov-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(docs): update maintainers list" into integration |
| f23ce639 | 07-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
fix(docs): update maintainers list
As part of release process revisit list of maintainers to keep it updated.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I63b87265a6bff00ad05d8
fix(docs): update maintainers list
As part of release process revisit list of maintainers to keep it updated.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I63b87265a6bff00ad05d8b3b7cad694cdf48e9ea
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| a06c5cad | 10-Nov-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "chore(docs): fix broken url references to arm procedure call" into integration |
| f41e23ea | 10-Nov-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mp/ras_refactoring" into integration
* changes: docs: document do_panic() and panic() helper functions fix(ras): restrict RAS support for NS world |
| 702b46cb | 10-Nov-2022 |
Govindraj Raja <govindraj.raja@arm.com> |
chore(docs): fix broken url references to arm procedure call
Couple for urls under section: `5.6. Use of built-in C and libc data types` from docs has broken urls since the new arm procedure call do
chore(docs): fix broken url references to arm procedure call
Couple for urls under section: `5.6. Use of built-in C and libc data types` from docs has broken urls since the new arm procedure call doc is moved to be part of `ARM-software/abi-aa`.
Change-Id: Ied184ed56c8335d4cbc687e56962439091a18e42 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 4fdeaffe | 01-Nov-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(cpus): workaround for Cortex-A77 erratum 2743100
Cortex-A77 erratum 2743100 is a Cat B erratum that applies to revisions r0p0, r1p0, r1p1, and is still open. The workaround is to insert a dsb be
fix(cpus): workaround for Cortex-A77 erratum 2743100
Cortex-A77 erratum 2743100 is a Cat B erratum that applies to revisions r0p0, r1p0, r1p1, and is still open. The workaround is to insert a dsb before the isb in the power down sequence.
SDEN can be found here: https://developer.arm.com/documentation/SDEN1152370/latest
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I8e49a2dac8611f31ace249a17ae7a90cd60e742a
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| 04c7303b | 04-Nov-2022 |
Okash Khawaja <okash@google.com> |
feat(cpus): make cache ops conditional
When a core is in debug recovery mode its caches are not invalidated upon reset, so the L1 and L2 cache contents from before reset are observable after reset.
feat(cpus): make cache ops conditional
When a core is in debug recovery mode its caches are not invalidated upon reset, so the L1 and L2 cache contents from before reset are observable after reset. Similarly, debug recovery mode of DynamIQ cluster ensures that contents of the shared L3 cache are also not invalidated upon transition to On mode.
Booting cores in debug recovery mode means booting with caches disabled and preserving the caches until a point where software can dump the caches and retrieve their contents. TF-A however unconditionally cleans and invalidates caches at multiple points during boot. This can lead to memory corruption as well as loss of cache contents to be used for debugging.
This patch fixes this by calling a platform hook before performing CMOs in helper routines in cache_helpers.S. The platform hook plat_can_cmo is an assembly routine which must not clobber x2 and x3, and avoid using stack. The whole checking is conditional upon `CONDITIONAL_CMO` which can be set at compile time.
Signed-off-by: Okash Khawaja <okash@google.com> Change-Id: I172e999e4acd0f872c24056e647cc947ee54b193
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| 0d41e174 | 10-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "chore(docs): move deprecated platforms information around" into integration |
| c87e1f62 | 09-Nov-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "errata" into integration
* changes: fix(cpus): workaround for Cortex-A76 erratum 2743102 fix(cpus): workaround for Neoverse N1 erratum 2743102 |
| 00bf236e | 09-Nov-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "refactor(trng): cleanup the existing TRNG support" into integration |
| 00c322b3 | 09-Nov-2022 |
Soby Mathew <soby.mathew@arm.com> |
Merge "docs(rme): add instruction to build rmm" into integration |
| 51a96cee | 09-Nov-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "docs(security): rename Makalu and SB optimisation" into integration |
| 0e5fd065 | 09-Nov-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "docs(maintainers): update qti maintainer" into integration |
| 99d9ce8a | 02-Nov-2022 |
Shruti Gupta <shruti.gupta@arm.com> |
docs(rme): add instruction to build rmm
Add documentation to build and run TF-A with RMM, Linux kernel and TFTF Realm Payload.
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com> Change-Id: I951b41a
docs(rme): add instruction to build rmm
Add documentation to build and run TF-A with RMM, Linux kernel and TFTF Realm Payload.
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com> Change-Id: I951b41a144aabe0fec16eb933d7f005a65f06fb2
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| 2f3d647b | 09-Nov-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "docs: add link to DCO" into integration |
| a6a1dcbe | 08-Nov-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
chore(docs): move deprecated platforms information around
We used to have a dedicated page for deprecated platforms information. This document contained 2 pieces of information:
a) the process for
chore(docs): move deprecated platforms information around
We used to have a dedicated page for deprecated platforms information. This document contained 2 pieces of information:
a) the process for deprecating a platform port; b) the list of deprecated platforms to this day.
I think it makes more sense to move b) to the platforms ports landing page, such that it is more visible.
This also has the nice effect to move the 'Deprecated platforms' title as the last entry of the 'Platform ports' table of contents, like so:
- Platform ports - 1. Allwinner ARMv8 SoCs - 2. Arm Development Platforms ... - 39. Broadcom Stingray - Deprecated platforms
instead of it being lost in the middle of supported platform ports.
Regarding a), this gets moved under the "Processes & Policies" section. More specifically, it gets clubbed with the existing platform compatibility policy. The combined document gets renamed into a "Platforms Ports Policy" document.
Change-Id: I6e9ce2abc68b8a8ac88e7bd5f21749c14c9a2af6 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| e28d403c | 09-Nov-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "chore(docs): refresh platform ports landing page" into integration |
| 78e7b2b4 | 09-Nov-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat: pass SMCCCv1.3 SVE hint bit to dispatchers" into integration |
| b80cd431 | 05-Nov-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
docs(security): rename Makalu and SB optimisation
Changing Makalu reference to the public name Cortex-A715. Also, added a note on use of SB instruction for all CPUs supporting ENABLE_FEAT_SB.
Signe
docs(security): rename Makalu and SB optimisation
Changing Makalu reference to the public name Cortex-A715. Also, added a note on use of SB instruction for all CPUs supporting ENABLE_FEAT_SB.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I98bd36c684fa7ae79bd4e8e641fd73404435c202
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| c2a634b7 | 08-Nov-2022 |
Chris Kay <chris.kay@arm.com> |
docs: add link to DCO
The link to the Developer Certificate of Origin was mistakenly removed in a patch some time ago. This change re-adds it.
Change-Id: Ia8aed055cb449cdf4c1aaeac9b81ca15099e73f5 S
docs: add link to DCO
The link to the Developer Certificate of Origin was mistakenly removed in a patch some time ago. This change re-adds it.
Change-Id: Ia8aed055cb449cdf4c1aaeac9b81ca15099e73f5 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 5988a807 | 02-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
docs: document do_panic() and panic() helper functions
panic() and do_panic() are widely used helper functions called when encountering a critical failure that cannot be recovered from. Document the
docs: document do_panic() and panic() helper functions
panic() and do_panic() are widely used helper functions called when encountering a critical failure that cannot be recovered from. Document them in porting guide. Also, remove panic() documentation from PSCI guide(where it is unused anyways).
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ib0965cce56c03d0de5ac0d05d5714a6942793ede
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| 0b22e591 | 11-Oct-2022 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
refactor(trng): cleanup the existing TRNG support
This patch adds the following changes to complete the existing TRNG implementation:
1. Adds a feature specific scope for buildlog generation. 2. Up
refactor(trng): cleanup the existing TRNG support
This patch adds the following changes to complete the existing TRNG implementation:
1. Adds a feature specific scope for buildlog generation. 2. Updates the docs on the build flag "TRNG_SUPPORT" and its values. 3. Makefile update and improves the existing comments at few sections for better understanding of the underlying logic.
Change-Id: I3f72f0ccd5c94005a2df87158cf23199d2160d37 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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| 2fe661c2 | 08-Nov-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
chore(docs): refresh platform ports landing page
- Remove mentions of Arm SGM-775 and MediaTek MT6795 platforms. Both platform ports were deleted from TF-A source tree in the last release (v2
chore(docs): refresh platform ports landing page
- Remove mentions of Arm SGM-775 and MediaTek MT6795 platforms. Both platform ports were deleted from TF-A source tree in the last release (v2.7).
- Remove mention of Arm Morello platform, as it now has a dedicated documentation page accessible from the table of contents (see docs/plat/arm/morello/).
Change-Id: Ie3acdddab81f5589bb36114a8a766200f5b08ad4 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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