History log of /rk3399_ARM-atf/docs/plat/stm32mp1.rst (Results 1 – 25 of 42)
Revision Date Author Comments
# cc933e1d 15-Sep-2023 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "stm32mp2" into integration

* changes:
feat(stm32mp2): generate stm32 file
feat(stm32mp2-fdts): add stm32mp257f-ev1 board
feat(stm32mp2-fdts): introduce stm32mp25 pinc

Merge changes from topic "stm32mp2" into integration

* changes:
feat(stm32mp2): generate stm32 file
feat(stm32mp2-fdts): add stm32mp257f-ev1 board
feat(stm32mp2-fdts): introduce stm32mp25 pinctrl files
feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
feat(stm32mp2): add console configuration
feat(st): add RCC registers list
feat(st-uart): add AARCH64 stm32_console driver
feat(st): introduce new platform STM32MP2
feat(dt-bindings): add the STM32MP2 clock and reset bindings
docs(changelog): add scopes for STM32MP2
feat(docs): introduce STM32MP2 doc
refactor(docs): add a sub-menu for ST platforms
refactor(st): move plat_image_load.c
refactor(st): rename PLAT_NB_FIXED_REGS
refactor(st): move some storage definitions to common part
refactor(st): move SDMMC definitions to driver
feat(st-clock): stub fdt_get_rcc_secure_state
feat(st-clock): allow aarch64 compilation of STGEN functions
feat(st): allow AARCH64 compilation for common code
refactor(st): rename QSPI macros

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# ce7f8044 14-Jun-2023 Yann Gautier <yann.gautier@st.com>

refactor(docs): add a sub-menu for ST platforms

In order to ease introduction of new STM32 MPUs platforms, a dedicated
ST sub-menu (and directory) is created.
The old page is kept, but with an orpha

refactor(docs): add a sub-menu for ST platforms

In order to ease introduction of new STM32 MPUs platforms, a dedicated
ST sub-menu (and directory) is created.
The old page is kept, but with an orphan parameter to avoid build
issues with the docs, and to avoid listing it in the menu. It is
updated to just have links with the new pages.
A new page STM32 MPUs is created to group common options for all STM32
MPUs.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I799b57967d76a985835c7a3d9d6ab21beb44ba40

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# a4c69581 15-Mar-2023 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3" into integration


# 42d4d3ba 22-Nov-2022 Arvind Ram Prakash <arvind.ramprakash@arm.com>

refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3

BL2_AT_EL3 is an overloaded macro which has two uses:
1. When BL2 is entry point into TF-A(no BL1)
2. When BL2 is runnin

refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3

BL2_AT_EL3 is an overloaded macro which has two uses:
1. When BL2 is entry point into TF-A(no BL1)
2. When BL2 is running at EL3 exception level
These two scenarios are not exactly same even though first implicitly
means second to be true. To distinguish between these two use cases we
introduce new macros.
BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2.
Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where
BL2 runs at EL3 (including four world systems).

BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the
repository.

Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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# 5fab71a7 14-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration


# 981b9dcb 14-Nov-2022 Yann Gautier <yann.gautier@st.com>

refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562

refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE

The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.

Change-Id: I04452453ed84567b0de39e900594a81526562259
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# c3170fd8 14-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools

Merge changes from topic "stm32mp1-trusted-boot" into integration

* changes:
docs(st): update documentation for TRUSTED_BOARD_BOOT
fix(build): ensure that the correct rule is called for tools
feat(stm32mp1): add the platform specific build for tools
fix(stm32mp13-fdts): remove secure status
feat(stm32mp1-fdts): add CoT and fuse references for authentication
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
feat(stm32mp1): add the decryption support
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
feat(stm32mp1): update ROM code API for header v2 management
feat(stm32mp1): remove unused function from boot API
refactor(stm32mp1): remove authentication using STM32 image mode
fix(fconf): fix type error displaying disable_auth
feat(tbbr): increase PK_DER_LEN size
fix(auth): correct sign-compare warning
feat(auth): allow to verify PublicKey with platform format PK
feat(cert-create): update for ECDSA brainpoolP256r/t1 support
feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
feat(st-crypto): remove BL32 HASH driver usage
feat(stm32mp1): add a stm32mp crypto library
feat(st-crypto): add STM32 RNG driver
feat(st-crypto): add AES decrypt/auth by SAES IP
feat(st-crypto): add ECDSA signature check with PKA
feat(st-crypto): update HASH for new hardware version used in STM32MP13

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# b82a30c2 06-Oct-2022 Lionel Debieve <lionel.debieve@foss.st.com>

docs(st): update documentation for TRUSTED_BOARD_BOOT

Update the documentation to indicate commands needed for
TRUSTED_BOARD_BOOT management.

Change-Id: I7b8781eaa7f8b6b8d675a625c7ff2e1ee767222a
Si

docs(st): update documentation for TRUSTED_BOARD_BOOT

Update the documentation to indicate commands needed for
TRUSTED_BOARD_BOOT management.

Change-Id: I7b8781eaa7f8b6b8d675a625c7ff2e1ee767222a
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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# e8f4ec1a 03-Oct-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st_uart_updates" into integration

* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFI

Merge changes from topic "st_uart_updates" into integration

* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
feat(st): add trace for early console
fix(stm32mp1): enable crash console in FIQ handler
feat(st-uart): add initialization with the device tree
refactor(stm32mp1): move DT_UART_COMPAT in include file
feat(stm32mp1): configure the serial boot load address
fix(stm32mp1): update the FIP load address for serial boot
refactor(st): configure baudrate for UART programmer
refactor(st-uart): compute the over sampling dynamically

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# 156709dd 13-Sep-2022 Yann Gautier <yann.gautier@foss.st.com>

docs(st): introduce STM32MP_RECONFIGURE_CONSOLE

This flag will be used in BL32, to reconfigure UART parameters for
the early or crash console. By default, it is zero, as UART is
already configured i

docs(st): introduce STM32MP_RECONFIGURE_CONSOLE

This flag will be used in BL32, to reconfigure UART parameters for
the early or crash console. By default, it is zero, as UART is
already configured in BL2.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b28ff489479ab04a2fade027933524cdd36e959

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# 4b2f23e5 15-Mar-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it ove

feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it overlap the OP-TEE final location. So the default value
for DWL_BUFFER_BASE is invalid.

To avoid this conflict the serial boot load address = DWL_BUFFER_BASE
can be modified with a configuration flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie27b87c10c57fea5d4c6200ce4f624e775b9a080

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# 2ff6a49e 22-Mar-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2

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# bdec516e 18-Dec-2020 Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com>

feat(stm32mp1): introduce new flag for STM32MP13

STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can b

feat(stm32mp1): introduce new flag for STM32MP13

STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can be used as monitor.
STM32MP13 uses the header v2.0 format for stm32image generation
for BL2.

Change-Id: Ie5b0e3230c5e064fe96f3561fc5b3208914dea53
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 8dec6481 06-Mar-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st-uart-baudrate" into integration

* changes:
refactor(st): configure UART baudrate
docs(stm32mp1): document some compilation flags
feat(st-uart): manage oversampling

Merge changes from topic "st-uart-baudrate" into integration

* changes:
refactor(st): configure UART baudrate
docs(stm32mp1): document some compilation flags
feat(st-uart): manage oversampling by 8
fix(st-uart): correctly fill BRR register

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# 99887cb9 02-Mar-2022 Yann Gautier <yann.gautier@foss.st.com>

refactor(st): configure UART baudrate

Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 11520

refactor(st): configure UART baudrate

Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243

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# 975cf6ff 03-Mar-2022 Yann Gautier <yann.gautier@st.com>

docs(stm32mp1): document some compilation flags

Add missing serial boot devices flags.
Add optional compilation flags, and their defauld values.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Ch

docs(stm32mp1): document some compilation flags

Add missing serial boot devices flags.
Add optional compilation flags, and their defauld values.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I507f7110bcd7b9af136a6fc6b8af342b084c8dbc

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# 65da2f2a 21-Oct-2021 Manish Pandey <manish.pandey2@arm.com>

Merge "docs(stm32mp1): fix FIP command with OP-TEE" into integration


# 50088851 21-Oct-2021 Yann Gautier <yann.gautier@st.com>

docs(stm32mp1): fix FIP command with OP-TEE

When building a FIP with OP-TEE as BL32 on STM32MP1, AARCH32_SP=optee
has to be added to the make command.

Change-Id: I900c01957fe4ed7ed13ca955edd91ed1c5

docs(stm32mp1): fix FIP command with OP-TEE

When building a FIP with OP-TEE as BL32 on STM32MP1, AARCH32_SP=optee
has to be added to the make command.

Change-Id: I900c01957fe4ed7ed13ca955edd91ed1c5c5c4fa
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 9ecf9438 09-Sep-2021 Mark Dykes <mark.dykes@arm.com>

Merge "docs(stm32mp1): update doc for FIP/FCONF" into integration


# 07f81627 12-Feb-2021 Yann Gautier <yann.gautier@foss.st.com>

docs(stm32mp1): update doc for FIP/FCONF

Describe the boot using FIP, and how to compile it.
The STM32IMAGE boot chain is still available but it is not recommended.
Update the build command lines, f

docs(stm32mp1): update doc for FIP/FCONF

Describe the boot using FIP, and how to compile it.
The STM32IMAGE boot chain is still available but it is not recommended.
Update the build command lines, for FIP.
The memory mapping is also updated.

Change-Id: I2b1e0df5500b6213d33dc558b0e0da38340a4d79
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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# d7439276 19-Feb-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "docs: stm32mp1: correct formatting issues" into integration


# f1127926 15-Feb-2021 Yann Gautier <yann.gautier@foss.st.com>

docs: stm32mp1: correct formatting issues

Add blank lines before lists and code example.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I901646e0be74227af983079d0cbe05c6a217fab6


# 80d9cf78 13-Oct-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "stm32mp1_plat_updates" into integration

* changes:
docs: update STM32MP1 with versions details
stm32mp1: get peripheral base address from a define
stm32mp1: add finis

Merge changes from topic "stm32mp1_plat_updates" into integration

* changes:
docs: update STM32MP1 with versions details
stm32mp1: get peripheral base address from a define
stm32mp1: add finished good variant in board identifier

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# 63544012 13-Oct-2020 Yann Gautier <yann.gautier@st.com>

docs: update STM32MP1 with versions details

After introducing the new STM32MP1 SoC versions in patch [1], the
document describing STM32MP1 platform is updated with the information
given in the patch

docs: update STM32MP1 with versions details

After introducing the new STM32MP1 SoC versions in patch [1], the
document describing STM32MP1 platform is updated with the information
given in the patch commit message.

[1]: stm32mp1: add support for new SoC profiles

Change-Id: I6d7ce1a3c29678ddac78a6685f5d5daf28c3c3a1
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 5ecfd890 04-Oct-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "doc: stm32mp1: Improve OP-TEE related documentation" into integration


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