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2a4b4b71 |
| 11-Jul-2017 |
Isla Mitchell <isla.mitchell@arm.com> |
Fix order of #includes
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions in order to retain header groupings, minimise changes to imported
Fix order of #includes
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions in order to retain header groupings, minimise changes to imported headers, and where there are headers within the #if and #ifndef statements.
Change-Id: I65085a142ba6a83792b26efb47df1329153f1624 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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1b5fa6ef |
| 12-Dec-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #774 from jeenu-arm/no-return-macro
Define and use no_ret macro where no return is expected
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a806dad5 |
| 30-Nov-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is transferred to functions from which return isn't expected. Such jumps are ma
Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is transferred to functions from which return isn't expected. Such jumps are made using 'bl' instruction to provide the callee with the location from which it was jumped to. Additionally, debuggers infer the caller by examining where 'lr' register points to. If a 'bl' of the nature described above falls at the end of an assembly function, 'lr' will be left pointing to a location outside of the function range. This misleads the debugger back trace.
This patch defines a 'no_ret' macro to be used when jumping to functions from which return isn't expected. The macro ensures to use 'bl' instruction for the jump, and also, for debug builds, places a 'nop' instruction immediately thereafter (unless instructed otherwise) so as to leave 'lr' pointing within the function range.
Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0 Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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44abeaa6 |
| 22-Sep-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #713 from yatharth-arm/yk/AArch32_porting
Add basic AArch32 support for BL1 & BL2
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f3b4914b |
| 28-Jun-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Add generic changes in BL1
This patch adds generic changes in BL1 to support AArch32 state. New AArch32 specific assembly/C files are introduced and some files are moved to AArch32/64 speci
AArch32: Add generic changes in BL1
This patch adds generic changes in BL1 to support AArch32 state. New AArch32 specific assembly/C files are introduced and some files are moved to AArch32/64 specific folders. BL1 for AArch64 is refactored but functionally identical. BL1 executes in Secure Monitor mode in AArch32 state.
NOTE: BL1 in AArch32 state ONLY handles BL1_RUN_IMAGE SMC.
Change-Id: I6e2296374c7efbf3cf2aa1a0ce8de0732d8c98a5
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f6ace15f |
| 31-Aug-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #689 from yatharth-arm/yk/plat_report_expn
Remove looping around `plat_report_exception`
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5bbc451e |
| 17-Aug-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Remove looping around `plat_report_exception`
This patch removes the tight loop that calls `plat_report_exception` in unhandled exceptions in AArch64 state. The new behaviour is to call the `plat_re
Remove looping around `plat_report_exception`
This patch removes the tight loop that calls `plat_report_exception` in unhandled exceptions in AArch64 state. The new behaviour is to call the `plat_report_exception` only once followed by call to `plat_panic_handler`. This allows platforms to take platform-specific action when there is an unhandled exception, instead of always spinning in a tight loop.
Note: This is a subtle break in behaviour for platforms that expect `plat_report_exception` to be continuously executed when there is an unhandled exception.
Change-Id: Ie2453804b9b7caf9b010ee73e1a90eeb8384e4e8
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aa037ca9 |
| 27-May-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #634 from sandrine-bailleux-arm/sb/exception-vectors
Improve robustness and readability of exception code
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e0ae9fab |
| 24-May-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce some helper macros for exception vectors
This patch introduces some assembler macros to simplify the declaration of the exception vectors. It abstracts the section the exception code is pu
Introduce some helper macros for exception vectors
This patch introduces some assembler macros to simplify the declaration of the exception vectors. It abstracts the section the exception code is put into as well as the alignments constraints mandated by the ARMv8 architecture. For all TF images, the exception code has been updated to make use of these macros.
This patch also updates some invalid comments in the exception vector code.
Change-Id: I35737b8f1c8c24b6da89b0a954c8152a4096fa95
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ab5a53ef |
| 09-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #453 from yatharth-arm/yk/fwu-6
Firmware Update patch stack
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48bfb88e |
| 10-Oct-2015 |
Yatharth Kochar <yatharth.kochar@arm.com> |
FWU: Add Generic Firmware Update framework support in BL1
Firmware update(a.k.a FWU) feature is part of the TBB architecture. BL1 is responsible for carrying out the FWU process if platform specific
FWU: Add Generic Firmware Update framework support in BL1
Firmware update(a.k.a FWU) feature is part of the TBB architecture. BL1 is responsible for carrying out the FWU process if platform specific code detects that it is needed.
This patch adds support for FWU feature support in BL1 which is included by enabling `TRUSTED_BOARD_BOOT` compile time flag.
This patch adds bl1_fwu.c which contains all the core operations of FWU, which are; SMC handler, image copy, authentication, execution and resumption. It also adds bl1.h introducing #defines for all BL1 SMCs.
Following platform porting functions are introduced:
int bl1_plat_mem_check(uintptr_t mem_base, unsigned int mem_size, unsigned int flags); This function can be used to add platform specific memory checks for the provided base/size for the given security state. The weak definition will invoke `assert()` and return -ENOMEM.
__dead2 void bl1_plat_fwu_done(void *cookie, void *reserved); This function can be used to initiate platform specific procedure to mark completion of the FWU process. The weak definition waits forever calling `wfi()`.
plat_bl1_common.c contains weak definitions for above functions.
FWU process starts when platform detects it and return the image_id other than BL2_IMAGE_ID by using `bl1_plat_get_next_image_id()` in `bl1_main()`.
NOTE: User MUST provide platform specific real definition for bl1_plat_mem_check() in order to use it for Firmware update.
Change-Id: Ice189a0885d9722d9e1dd03f76cac1aceb0e25ed
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7baff11f |
| 09-Oct-2015 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Add descriptor based image management support in BL1
As of now BL1 loads and execute BL2 based on hard coded information provided in BL1. But due to addition of support for upcoming Firmware Update
Add descriptor based image management support in BL1
As of now BL1 loads and execute BL2 based on hard coded information provided in BL1. But due to addition of support for upcoming Firmware Update feature, BL1 now require more flexible approach to load and run different images using information provided by the platform.
This patch adds new mechanism to load and execute images based on platform provided image id's. BL1 now queries the platform to fetch the image id of the next image to be loaded and executed. In order to achieve this, a new struct image_desc_t was added which holds the information about images, such as: ep_info and image_info.
This patch introduces following platform porting functions:
unsigned int bl1_plat_get_next_image_id(void); This is used to identify the next image to be loaded and executed by BL1.
struct image_desc *bl1_plat_get_image_desc(unsigned int image_id); This is used to retrieve the image_desc for given image_id.
void bl1_plat_set_ep_info(unsigned int image_id, struct entry_point_info *ep_info); This function allows platforms to update ep_info for given image_id.
The plat_bl1_common.c file provides default weak implementations of all above functions, the `bl1_plat_get_image_desc()` always return BL2 image descriptor, the `bl1_plat_get_next_image_id()` always return BL2 image ID and `bl1_plat_set_ep_info()` is empty and just returns. These functions gets compiled into all BL1 platforms by default.
Platform setup in BL1, using `bl1_platform_setup()`, is now done _after_ the initialization of authentication module. This change provides the opportunity to use authentication while doing the platform setup in BL1.
In order to store secure/non-secure context, BL31 uses percpu_data[] to store context pointer for each core. In case of BL1 only the primary CPU will be active hence percpu_data[] is not required to store the context pointer.
This patch introduce bl1_cpu_context[] and bl1_cpu_context_ptr[] to store the context and context pointers respectively. It also also re-defines cm_get_context() and cm_set_context() for BL1 in bl1/bl1_context_mgmt.c.
BL1 now follows the BL31 pattern of using SP_EL0 for the C runtime environment, to support resuming execution from a previously saved context.
NOTE: THE `bl1_plat_set_bl2_ep_info()` PLATFORM PORTING FUNCTION IS NO LONGER CALLED BY BL1 COMMON CODE. PLATFORMS THAT OVERRIDE THIS FUNCTION MAY NEED TO IMPLEMENT `bl1_plat_set_ep_info()` INSTEAD TO MAINTAIN EXISTING BEHAVIOUR.
Change-Id: Ieee4c124b951c2e9bc1c1013fa2073221195d881
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bbf8f6f9 |
| 02-Oct-2015 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Move context management code to common location
The upcoming Firmware Update feature needs transitioning across Secure/Normal worlds to complete the FWU process and hence requires context management
Move context management code to common location
The upcoming Firmware Update feature needs transitioning across Secure/Normal worlds to complete the FWU process and hence requires context management code to perform this task.
Currently context management code is part of BL31 stage only. This patch moves the code from (include)/bl31 to (include)/common. Some function declarations/definitions and macros have also moved to different files to help code sharing.
Change-Id: I3858b08aecdb76d390765ab2b099f457873f7b0c
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712038db |
| 01-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu
Add support to boot EL3 payloads and only a single CPU at cold reset
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862b5dc2 |
| 10-Nov-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Pass the entry point info to bl1_plat_prepare_exit()
This patch modifies the prototype of the bl1_plat_prepare_exit() platform API to pass the address of the entry point info structure received from
Pass the entry point info to bl1_plat_prepare_exit()
This patch modifies the prototype of the bl1_plat_prepare_exit() platform API to pass the address of the entry point info structure received from BL2. The structure contains information that can be useful, depending on the kind of clean up or bookkeeping operations to perform.
The weak implementation of this function ignores this argument to preserve platform backwards compatibility.
NOTE: THIS PATCH MAY BREAK PLATFORM PORTS THAT ARE RELYING ON THE FORMER PROTOTYPE OF THE BL1_PLAT_PREPARE_EXIT() API.
Change-Id: I3fc18f637de06c85719c4ee84c85d6a4572a0fdb
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35e8c766 |
| 10-Nov-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce SPIN_ON_BL1_EXIT build flag
This patch introduces a new build flag, SPIN_ON_BL1_EXIT, which puts an infinite loop in BL1. It is intended to help debugging the post-BL2 phase of the Trusted
Introduce SPIN_ON_BL1_EXIT build flag
This patch introduces a new build flag, SPIN_ON_BL1_EXIT, which puts an infinite loop in BL1. It is intended to help debugging the post-BL2 phase of the Trusted Firmware by stopping execution in BL1 just before handing over to BL31. At this point, the developer may take control of the target using a debugger.
This feature is disabled by default and can be enabled by rebuilding BL1 with SPIN_ON_BL1_EXIT=1.
User Guide updated accordingly.
Change-Id: I6b6779d5949c9e5571dd371255520ef1ac39685c
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dd64d425 |
| 04-Nov-2015 |
Achin Gupta <achin.gupta@arm.com> |
Merge pull request #421 from sandrine-bailleux/sb/improve-display_boot_progress
Improve images transitions debugging messages
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ee5c2b13 |
| 27-Oct-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Improve display_boot_progress() function
- Remove out-dated information about the use of printf() in the function comment.
- Make the argument const, as the function doesn't need to modify it.
Improve display_boot_progress() function
- Remove out-dated information about the use of printf() in the function comment.
- Make the argument const, as the function doesn't need to modify it.
- Rename the function into bl1_print_bl31_ep_info() to make its purpose clearer.
Change-Id: I2a9d215a37f0ec11aefce0c5c9e050473b7a6b25
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7b66a026 |
| 21-Oct-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #411 from jcastillo-arm/jc/plat_bl1_exit
Jc/plat bl1 exit
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4425448a |
| 20-Oct-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #409 from sandrine-bailleux/sb/break-down-bl1-sync-exceptions
Break down BL1 AArch64 synchronous exception handler
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e3f67124 |
| 05-Oct-2015 |
Juan Castillo <jcastillo.devel@gmail.com> |
Add optional bl1_plat_prepare_exit() API
This patch adds an optional API to the platform port:
void bl1_plat_prepare_exit(void);
This function is called prior to exiting BL1 in response to the
Add optional bl1_plat_prepare_exit() API
This patch adds an optional API to the platform port:
void bl1_plat_prepare_exit(void);
This function is called prior to exiting BL1 in response to the RUN_IMAGE_SMC request raised by BL2. It should be used to perform platform specific clean up or bookkeeping operations before transferring control to the next image.
A weak empty definition of this function has been provided to preserve platform backwards compatibility.
Change-Id: Iec09697de5c449ae84601403795cdb6aca166ba1
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1fe4d453 |
| 29-Sep-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Break down BL1 AArch64 synchronous exception handler
The AArch64 synchronous exception vector code in BL1 is almost reaching its architectural limit of 32 instructions. This means there is very litt
Break down BL1 AArch64 synchronous exception handler
The AArch64 synchronous exception vector code in BL1 is almost reaching its architectural limit of 32 instructions. This means there is very little space for this code to grow.
This patch reduces the size of the exception vector code by moving most of its code in a function to which we branch from SynchronousExceptionA64.
Change-Id: Ib35351767a685fb2c2398029d32e54026194f7ed
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b110f61a |
| 27-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #203 from danh-arm/dh/misc-docs-1.0
Miscellaneous documentation fixes
|