core: arm: fix style issues in asm-defines.c

Fixing a few cases of alignment that doesn't match open parenthesis.

Fixes: c02f9fb09df2 ("arm: add auto generated asm-defines.h")
Signed-off-by: Jens W

core: arm: fix style issues in asm-defines.c

Fixing a few cases of alignment that doesn't match open parenthesis.

Fixes: c02f9fb09df2 ("arm: add auto generated asm-defines.h")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: preserve 64bit smccc when possible

Prior to this patch when a FFA_MSG_SEND_DIRECT_REQ_64 was received the
response was sent as FFA_MSG_SEND_DIRECT_RESP_32. While not breaking
with the FF-

core: ffa: preserve 64bit smccc when possible

Prior to this patch when a FFA_MSG_SEND_DIRECT_REQ_64 was received the
response was sent as FFA_MSG_SEND_DIRECT_RESP_32. While not breaking
with the FF-A specification, it's still a bit unexpected and will cause
an error in the FF-A framework driver. So fix this by keeping track of
the SMCCC (SMC Calling Convention) used during the current
FFA_MSG_SEND_DIRECT_REQ and respond with matching SMCCC.

This has no impact on AArch32 mode since only the 32-bit SMCCC is valid
in that case. The greatest impact on AArch64 is that we must be able to
find out the current SMCCC during RPC, this means storing it in struct
thread_core_local to be able to access it in assembly low level
routines.

Support for FFA_MSG_SEND_DIRECT_REQ_64 is also advertised in
FFA_FEATURES.

Fixes: 15da69cff2ca ("core: ffa: Enable handling 64-bit direct messages")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ci: build sam-sama5d2_xplained

Adds platform sam-sama5d2_xplained to CI build.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

ci: build sam-sama5d27_som1_ek

Adds platform sam-sama5d27_som1_ek to CI build

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

core: pta: imx: fix typo DEK blob command

The PTA command had the manufacturing protection prefix instead of the
DEK blob prefix.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jero

core: pta: imx: fix typo DEK blob command

The PTA command had the manufacturing protection prefix instead of the
DEK blob prefix.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: riscv: Fix condition of is_from_user()

RISC-V defines that xPP(previous privilege mode) field of CSR status
indicates the previous privilege level prior to the trap. Since the
encoding of user

core: riscv: Fix condition of is_from_user()

RISC-V defines that xPP(previous privilege mode) field of CSR status
indicates the previous privilege level prior to the trap. Since the
encoding of user mode is 0, we should compare the xPP field with 0 here
to know that the trap is from user mode.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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riscv: plat-virt: Align PLIC configurations with QEMU v8.1.1

Align the PLIC configurations with RISC-V QEMU virtual platform based on
official QEMU v8.1.1 tag. The maximum size of PLIC should be 0x6

riscv: plat-virt: Align PLIC configurations with QEMU v8.1.1

Align the PLIC configurations with RISC-V QEMU virtual platform based on
official QEMU v8.1.1 tag. The maximum size of PLIC should be 0x600000,
and the number of interrupt sources should be 95.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: plic: Implement mask/unmask operations

Implement mask/unmask operations for PLIC, otherwise OP-TEE panics
during boot process due to failure of itr_chip_is_valid().

Signed-off-by: Alvin Ch

drivers: plic: Implement mask/unmask operations

Implement mask/unmask operations for PLIC, otherwise OP-TEE panics
during boot process due to failure of itr_chip_is_valid().

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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drivers: plic: Maintain controller data in driver source file

To align the design from other architecture, we move the interrupt
controller data instance from platform source file to driver source
f

drivers: plic: Maintain controller data in driver source file

To align the design from other architecture, we move the interrupt
controller data instance from platform source file to driver source
file. With this change, the PLIC initialization functions no more get
the controller data as input argument. Platforms do not need to care
about the interrupt controller data instance.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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core: io: IO_READ32_POLL_TIMEOUT()

Implement Polling Read Register Interface inspired by linux kernel.

Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Reviewed-by: Etienne Carriere <etienne.carr

core: io: IO_READ32_POLL_TIMEOUT()

Implement Polling Read Register Interface inspired by linux kernel.

Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: regulator: register to dt_driver

Adds regulator_dt_register() for regulator drivers to register
regulator instances based on the DT description of the platform.

Regulator instances may not

drivers: regulator: register to dt_driver

Adds regulator_dt_register() for regulator drivers to register
regulator instances based on the DT description of the platform.

Regulator instances may not be created and initialized when
regulator_dt_register() returns. When a regulator depends on a
supply this latter may not yet be registered and initialized.
The framework will resolve the regulator dependencies later.

At OP-TEE core last initcall stage, a debug message informs
in case of remaining unresolved regulator dependency. Used resources
are released and no error status is returns to the system.

regulator_dt_register() uses a dedicated struct regu_dt_desc
ABI to get the description of the regulator to be registered.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: dt_driver: add dt_driver_provider_priv_data()

Implements dt_driver_provider_priv_data() to get the private data
registered with a provider. Regulator framework will use this
function to return

core: dt_driver: add dt_driver_provider_priv_data()

Implements dt_driver_provider_priv_data() to get the private data
registered with a provider. Regulator framework will use this
function to return the regulator handle associated to a regulator
provider driver.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: dt_driver: define DT_DRIVER_REGULATOR

Adds DT_DRIVER_REGULATOR for a regulator consumer to retrieve its
regulator device(s) from device tree information.

Acked-by: Gatien Chevallier <gatien.c

core: dt_driver: define DT_DRIVER_REGULATOR

Adds DT_DRIVER_REGULATOR for a regulator consumer to retrieve its
regulator device(s) from device tree information.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: enable support for regulators

Enables regulator framework on platform stm32mp1.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallie

plat-stm32mp1: enable support for regulators

Enables regulator framework on platform stm32mp1.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: always on property

Implements always-on regulator property for regulators that once enabled
shall never be disabled. This is archived using a regulator_enable()
call to increment

drivers: regulator: always on property

Implements always-on regulator property for regulators that once enabled
shall never be disabled. This is archived using a regulator_enable()
call to increment its refcount.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: fix flags in regulator framework

Fixes commit introducing regulator voltage that did not implement
always-on flag.

Fixes: 1a3d3273040b ("drivers: regulator framework")
Acked-by: Jerome For

drivers: fix flags in regulator framework

Fixes commit introducing regulator voltage that did not implement
always-on flag.

Fixes: 1a3d3273040b ("drivers: regulator framework")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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MAINTAINERS: add RISC-V maintainer entry

Edit MAINTAINERS to add myself as maintainer for RISC-V support.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jerome Forissier <je

MAINTAINERS: add RISC-V maintainer entry

Edit MAINTAINERS to add myself as maintainer for RISC-V support.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-mediatek: add support for MT8188 SoC

Add OP-TEE support for the MT8188 SoC.

Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: ls: enable CFG_PKCS11_TA

Enable PKCS11 TA by default for LS platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: imx: enable CFG_PKCS11_TA

Enable PKCS11 TA by default for i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: ls: enabled CFG_ENABLE_EMBEDDED_TESTS by default

Enable embedded tests by default on Layerscape platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jer

core: ls: enabled CFG_ENABLE_EMBEDDED_TESTS by default

Enable embedded tests by default on Layerscape platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx: enabled CFG_ENABLE_EMBEDDED_TESTS by default

Enable embedded tests by default on i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.f

core: imx: enabled CFG_ENABLE_EMBEDDED_TESTS by default

Enable embedded tests by default on i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: ls: increase heap size to 128k

In xtest_regression_4011, with libtomcrypt enabled, the allocation of a 4k
buffer would eventually fail (TEE_ERROR_OUT_OF_MEMORY) during the
allocation.

Signed-

core: ls: increase heap size to 128k

In xtest_regression_4011, with libtomcrypt enabled, the allocation of a 4k
buffer would eventually fail (TEE_ERROR_OUT_OF_MEMORY) during the
allocation.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx: increase heap size to 128k

In xtest_regression_4011, with libtomcrypt enabled, the allocation of a 4k
buffer would eventually fail (TEE_ERROR_OUT_OF_MEMORY) during the
allocation.

Signed

core: imx: increase heap size to 128k

In xtest_regression_4011, with libtomcrypt enabled, the allocation of a 4k
buffer would eventually fail (TEE_ERROR_OUT_OF_MEMORY) during the
allocation.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_csu: add resume capability to CSU driver

Register CSU driver to the power management framework.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.

drivers: imx_csu: add resume capability to CSU driver

Register CSU driver to the power management framework.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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