drivers: clk: sam: add PLL clock driver for sama7g5

As PLL is compatible for sama7g5 and sam9x60, add sam9x60 PLL functions for
configuring sama7g5 PLL.

Signed-off-by: Tony Han <tony.han@microchip.

drivers: clk: sam: add PLL clock driver for sama7g5

As PLL is compatible for sama7g5 and sam9x60, add sam9x60 PLL functions for
configuring sama7g5 PLL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update to support generic clock for sama7g5

Add a mux table for select from different generic clock source.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Fori

drivers: clk: sam: update to support generic clock for sama7g5

Add a mux table for select from different generic clock source.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: update to support main system bus clock for sama7g5

Add functions for configuring sama7g5 main system bus clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome

drivers: clk: sam: update to support main system bus clock for sama7g5

Add functions for configuring sama7g5 main system bus clock.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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.gitignore: Ignore all dot files and folders except the standard ones

Improve the gitignore to handle dot files and dot folders that are
created by most of development tools, such as IDEs.

This pat

.gitignore: Ignore all dot files and folders except the standard ones

Improve the gitignore to handle dot files and dot folders that are
created by most of development tools, such as IDEs.

This patch allows OPTEE-OS developers to store their specific tool
configurations under dot files or folders and not be bothered by the output
of the git status command.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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.gitignore: Change entries to only ignore in the source root folder

Previously, each gitignore entry was ignored all across the project.
This patch allows to ignore only entries that are in the sour

.gitignore: Change entries to only ignore in the source root folder

Previously, each gitignore entry was ignored all across the project.
This patch allows to ignore only entries that are in the source root
folder, except for editor's swap files.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: kernel: add runtime check for CE

Add runtime check during boot for supported ARMv8 Crypto Extensions.
Core will panic if configuration enables an ARMv8 CE feature
that the hardware does n

core: arm: kernel: add runtime check for CE

Add runtime check during boot for supported ARMv8 Crypto Extensions.
Core will panic if configuration enables an ARMv8 CE feature
that the hardware does not support.

Link: https://github.com/OP-TEE/optee_os/issues/6631
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: add helper functions for checking CE support

Add helper functions for checking implementation of SHA1, SHA256,
SHA512, SHA3, SM3, SM4 instructions.

Acked-by: Etienne Carriere <etienne.ca

core: arm: add helper functions for checking CE support

Add helper functions for checking implementation of SHA1, SHA256,
SHA512, SHA3, SM3, SM4 instructions.

Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: add check in aarch32 for feat_crc32_implemented()

Add support for checking CRC32 HW instruction in aarch32.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wik

core: arm: add check in aarch32 for feat_crc32_implemented()

Add support for checking CRC32 HW instruction in aarch32.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm64: remove ID_AA64ISAR0_EL1 macros

Remove old definitions for ID_AA64ISAR0_EL1 CRC32 bitmask
and shift.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander

core: arm64: remove ID_AA64ISAR0_EL1 macros

Remove old definitions for ID_AA64ISAR0_EL1 CRC32 bitmask
and shift.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: rewrite feat_crc32_implemented()

Rewrite check in feat_crc32_implementedfor for ARM64.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklande

core: arm: rewrite feat_crc32_implemented()

Rewrite check in feat_crc32_implementedfor for ARM64.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm64: add masks for ID_AA64ISAR0_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_AA64ISAR0_EL1 register:

Algo Bits
SM4 - [43:40]
SM3 - [39:36]
SHA

core: arm64: add masks for ID_AA64ISAR0_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_AA64ISAR0_EL1 register:

Algo Bits
SM4 - [43:40]
SM3 - [39:36]
SHA3 - [35:32]
RDM - [31:28]
TME - [27:24]
Atomic - [23:20]
CRC32 - [19:16]
SHA2 - [15:12]
SHA1 - [11:8]
AES - [7:4]

For additional details check ARM Architecture Reference Manual
for ARMv8-A architecture profile.
ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0.

Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: arm: add masks for ID_ISAR5_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_ISAR5_EL1 register:

Algo Bits
CRC32 - [19:16]
SHA2 - [15:12]
SHA1 - [1

core: arm: add masks for ID_ISAR5_EL1 fields

Add masks for obtaining Crypto Extensions support status from
ID_ISAR5_EL1 register:

Algo Bits
CRC32 - [19:16]
SHA2 - [15:12]
SHA1 - [11:8]
AES - [7:4]

For additional details check ARM Architecture Reference Manual
for ARMv8-A architecture profile.
D10.2.66 ID_ISAR5_EL1, AArch32 Instruction Set Attribute Register 5

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: virt, ffa: keep guest partition until resources are reclaimed

Move a struct guest_partition to prtn_destroy_list if there are
resources remaining to be reclaimed by the hypervisor. Currently t

core: virt, ffa: keep guest partition until resources are reclaimed

Move a struct guest_partition to prtn_destroy_list if there are
resources remaining to be reclaimed by the hypervisor. Currently this is
needed with FF-A and SPMC at S-EL1.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: store shm_bits in partition for SPMC at S-EL1

Store the bitmask keeping track of allocated shared memory handles in
the current partition when configured with CFG_NS_VIRTUALIZATION and
CF

core: ffa: store shm_bits in partition for SPMC at S-EL1

Store the bitmask keeping track of allocated shared memory handles in
the current partition when configured with CFG_NS_VIRTUALIZATION and
CFG_CORE_SEL1_SPMC.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: add SPMC_CORE_SEL1_MAX_SHM_COUNT

Add SPMC_CORE_SEL1_MAX_SHM_COUNT, telling how many shared memory object
are supported in a configuration with SPMC at S-EL1.

Signed-off-by: Jens Wiklande

core: ffa: add SPMC_CORE_SEL1_MAX_SHM_COUNT

Add SPMC_CORE_SEL1_MAX_SHM_COUNT, telling how many shared memory object
are supported in a configuration with SPMC at S-EL1.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: thread_spmc.c: add set_simple_ret_val()

Simplify common FFA_ERRROR/FFA_SUCCESS_32 patterns where an error code
is returned on error or FFA_SUCCESS_32 without further values are used
on success

core: thread_spmc.c: add set_simple_ret_val()

Simplify common FFA_ERRROR/FFA_SUCCESS_32 patterns where an error code
is returned on error or FFA_SUCCESS_32 without further values are used
on success.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ci: add RISC-V build (rv64, PLATFORM=virt)

Add a 64-bit build of OP-TEE for the RISC-V architecture.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienn

ci: add RISC-V build (rv64, PLATFORM=virt)

Add a 64-bit build of OP-TEE for the RISC-V architecture.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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mk/lib.mk: add library to link line only when it does contain objects

This commit addresses a build issue when the output directory is not
cleaned from a previous build. Here is a test case:

# Sta

mk/lib.mk: add library to link line only when it does contain objects

This commit addresses a build issue when the output directory is not
cleaned from a previous build. Here is a test case:

# Start from a clean state
$ rm -rf ./out
# (1) Build for Arm, with unwinding enabled
$ make -s -j$(nproc) ARCH=arm PLATFORM=vexpress-qemu_armv8a O=out CFG_UNWIND=y && echo OK
OK
# (2) Build for RISC-V, with unwinding enabled too
$ make -s -j$(nproc) ARCH=riscv PLATFORM=virt O=out CFG_UNWIND=y && echo OK
OK
# (3) Build for Arm again but with unwinding disabled
$ make -s -j$(nproc) ARCH=arm PLATFORM=vexpress-qemu_armv8a O=out CFG_UNWIND=n
aarch64-linux-gnu-ld.bfd: skipping incompatible out/ldelf-lib/libunw/libunw.a when searching for -lunw
aarch64-linux-gnu-ld.bfd: cannot find -lunw: No such file or directory
make: *** [ldelf/link.mk:60: out/ldelf/ldelf.elf] Error 1
make: *** Waiting for unfinished jobs....

In step (3), the libunw.a file leftover from step (2) causes a problem
because it is not generated again for the current ARCH (due to
CFG_UNWIND=n, so there is effectively nothing to build). Yet it is
unconditionally added to the link line by mk/lib.mk although
CFG_UNWIND=n. Therefore change the logic in mk/lib.mk to deal with that.

Step (2) causes no error because due to CFG_UNWIND=y and due to
dependencies (different source files, different cross compiler), the
archive file is re-created.

Note that it is not OK to simply guard the inclusion of mk/lib.mk with
CFG_UNWIND in core/core.mk and ldelf/ldelf.mk because we still want
the library headers to be accessible (no conditionals on #include <...>).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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libunw: riscv: simplify architecture test

Test ARCH rather than CFG_RV32_$(sm) and CFG_RV64_$(sm).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etien

libunw: riscv: simplify architecture test

Test ARCH rather than CFG_RV32_$(sm) and CFG_RV64_$(sm).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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libunw: arm: unwind_arm32.c should be compiled only for Arm

unwind_arm32.c contains functions to unwind arm32 code. This is used
when libunw is built for arm32 or arm64, in other words when ARCH=arm

libunw: arm: unwind_arm32.c should be compiled only for Arm

unwind_arm32.c contains functions to unwind arm32 code. This is used
when libunw is built for arm32 or arm64, in other words when ARCH=arm.
Other architectures (such as ARCH=riscv) obviously don't need it.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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ldelf: riscv: e64_relocate(): tag sym_idx as __maybe_unused

The sym_idx variable in e64_relocate() is not used in the rv64 build.
Therefore, mark it __maybe_unused to avoid a warning.

Signed-off-by

ldelf: riscv: e64_relocate(): tag sym_idx as __maybe_unused

The sym_idx variable in e64_relocate() is not used in the rv64 build.
Therefore, mark it __maybe_unused to avoid a warning.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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riscv: set default cross-compilers

Similar to what is done when ARCH=arm, set the default CROSS_COMPILE/
CROSS_COMPILE32/CROSS_COMPILE64 values to something sensible when
ARCH=riscv. This simplifies

riscv: set default cross-compilers

Similar to what is done when ARCH=arm, set the default CROSS_COMPILE/
CROSS_COMPILE32/CROSS_COMPILE64 values to something sensible when
ARCH=riscv. This simplifies build command lines.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: gic: wait for writes to propagate

Some updates to the GIC redistributor takes a while before they are
visible to all agents in the system. The GICR_CTLR_RWP bit in GICR_CTLR
indicates if updat

core: gic: wait for writes to propagate

Some updates to the GIC redistributor takes a while before they are
visible to all agents in the system. The GICR_CTLR_RWP bit in GICR_CTLR
indicates if updates are still being propagated. Add checks for this
after each write to GICR_ICENABLER0 to make sure that the system is
consistent before continuing.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: gic: support to configure PPI interrupts

Add support to configure PPI interrupts (assigning to Secure Group 1
etc). Since PPIs are per CPU interrupts as SGIs their configuration
should be sync

core: gic: support to configure PPI interrupts

Add support to configure PPI interrupts (assigning to Secure Group 1
etc). Since PPIs are per CPU interrupts as SGIs their configuration
should be synchronized to all CPUs in the same way. Add support to
synchronize needed PPI configuration to other CPUs.

The configuration that needs to be synchronized to other CPUs should
ideally not be changed once the primary CPU has booted. So add a check
in gic_op_enable() to catch this.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: call init_multi_core_panic_handler() earlier

Call init_multi_core_panic_handler() slightly earlier in during boot
using nex_driver_init_late() instead of boot_final(). This avoids with a
comin

core: call init_multi_core_panic_handler() earlier

Call init_multi_core_panic_handler() slightly earlier in during boot
using nex_driver_init_late() instead of boot_final(). This avoids with a
coming assert() in the GIC driver to check that SGI and PPI can't be
configured after or at nex_release_init_resource().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...