| 6dfe9e12 | 31-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ltc: fix undefined left shift
Fixes left shift out of bounds (undefined behavior) in twoexpt().
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens
core: ltc: fix undefined left shift
Fixes left shift out of bounds (undefined behavior) in twoexpt().
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a4ba7d5c | 31-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix tee_uuid_from_octets()
Fixes undefined behavior (shift out of bounds) in tee_uuid_from_octets().
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wikland
core: bugfix tee_uuid_from_octets()
Fixes undefined behavior (shift out of bounds) in tee_uuid_from_octets().
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cc71b593 | 26-Jan-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
RPMB: fix tee_rpmb_free()
Don't call thread_rpc_free_payload() unless thread_rpc_alloc_payload() was successful, which is when the physical address is non-zero.
Fixes: https://github.com/OP-TEE/opt
RPMB: fix tee_rpmb_free()
Don't call thread_rpc_free_payload() unless thread_rpc_alloc_payload() was successful, which is when the physical address is non-zero.
Fixes: https://github.com/OP-TEE/optee_os/issues/1319 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 883c4be3 | 13-Oct-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Add support for user TA profiling with gprof (-pg)
Adds the infrastructure to collect profiling information from Trusted Applications running in user mode and instrumented with -pg. Enable with: CFG
Add support for user TA profiling with gprof (-pg)
Adds the infrastructure to collect profiling information from Trusted Applications running in user mode and instrumented with -pg. Enable with: CFG_TA_GPROF_SUPPORT=y.
Profiling support in itself adds no significant performance overhead. Instrumented applications however may run 1.3x - 2x slower, and have a larger .bss section (+1.36 times .text size for 32-bit TAs, +1.77 times .text size for 64-bit ones).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (D02 64-bit) Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU 32-bit) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| add06171 | 26-Oct-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Move definitions from optee_msg.h to optee_msg_supplicant.h
Commands that are specific to tee-supplicant belong in their own file. This allows optee_msg.h to remain untouched as more supplicant comm
Move definitions from optee_msg.h to optee_msg_supplicant.h
Commands that are specific to tee-supplicant belong in their own file. This allows optee_msg.h to remain untouched as more supplicant commands are added. With this change: - optee_msg.h is used by the driver and OP-TEE OS (note: there are two slightly different versions of the file adapted to each environment but they define the same things) - optee_msg_supplicant.h is used by OP-TEE OS and tee-supplicant
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3e21f81b | 26-Oct-2016 |
Jerome Forissier <jerome.forissier@linaro.org> |
Rename optee_msg_fs.h to optee_msg_supplicant.h
The file contains the definition of the RPC interface with tee-supplicant, not limited to filesystem functions.
Signed-off-by: Jerome Forissier <jero
Rename optee_msg_fs.h to optee_msg_supplicant.h
The file contains the definition of the RPC interface with tee-supplicant, not limited to filesystem functions.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| acc10c43 | 08-Dec-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove tee_dispatch_* functions
Prior to this patch the tee_dispatch_* functions where called when invoking TAs from normal world.
The tee_dipatch_* functions provided little value and has no
core: remove tee_dispatch_* functions
Prior to this patch the tee_dispatch_* functions where called when invoking TAs from normal world.
The tee_dipatch_* functions provided little value and has now been collapsed into the architecture specific entry_std.c reducing the stack usage.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 47181b4d | 23-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: generic_entry: fix copy_init assembly warning
Fixes assembly warning: Warning: duplicated register (r13) in register list in the copy_init loop used when pager is enabled.
Reviewed-by: Etienn
core: generic_entry: fix copy_init assembly warning
Fixes assembly warning: Warning: duplicated register (r13) in register list in the copy_init loop used when pager is enabled.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 538240bc | 23-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: fix warning with CFG_PAGED_USER_TA=n
Fixes warning when using pager with CFG_PAGED_USER_TA=n.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander
core: pager: fix warning with CFG_PAGED_USER_TA=n
Fixes warning when using pager with CFG_PAGED_USER_TA=n.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ed1993b7 | 23-Jan-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
storage: RPMB: don't try to program the RPMB key by default
Prevent leakage of the RPMB security key by never programming it, unless a special build option is set (CFG_RPMB_WRITE_KEY=y).
Signed-off
storage: RPMB: don't try to program the RPMB key by default
Prevent leakage of the RPMB security key by never programming it, unless a special build option is set (CFG_RPMB_WRITE_KEY=y).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 97f9e0dd | 08-Dec-2016 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: optimize cache handling in load_elf_segments()
Prior to this patch the entire TA code was dcache cleaned and icache invalided resulting in many unneeded paged faults when the pager is enabled.
core: optimize cache handling in load_elf_segments()
Prior to this patch the entire TA code was dcache cleaned and icache invalided resulting in many unneeded paged faults when the pager is enabled.
With this patch the pager is taken into account. When pager is enabled only clean dcache and invalide icache for mapped pages.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (HiKey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0cad9723 | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove obsolete mobj_is_unsafe()
Removes obsolete mobj_is_unsafe(). As a consequence some tee_ta_manager code can be removed too.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> T
core: remove obsolete mobj_is_unsafe()
Removes obsolete mobj_is_unsafe(). As a consequence some tee_ta_manager code can be removed too.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 33be6f32 | 20-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: static ta: bugfix copy_in_param()
Prior to this patch copy_in_param() for static TA mistook the size of the mobj as the size of the parameter. This patches fixes that.
Fixes: 0dcfa5686d02 ("c
core: static ta: bugfix copy_in_param()
Prior to this patch copy_in_param() for static TA mistook the size of the mobj as the size of the parameter. This patches fixes that.
Fixes: 0dcfa5686d02 ("core: introduce MOBJ abstraction") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3958b8b2 | 20-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: bugfix mobj_virt
Prior to this patch is mobj_virt using mobj_phys_ops instead of the expected mobj_virt_ops. This patch fixes mobj_virt to use mobj_virt_ops.
Fixes: 0dcfa5686d02 ("core: intro
core: bugfix mobj_virt
Prior to this patch is mobj_virt using mobj_phys_ops instead of the expected mobj_virt_ops. This patch fixes mobj_virt to use mobj_virt_ops.
Fixes: 0dcfa5686d02 ("core: introduce MOBJ abstraction") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d8555bdd | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add paged secure shared memory
Adds feature to allocate paged secure memory that can be transferred between TAs as needed.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by
core: add paged secure shared memory
Adds feature to allocate paged secure memory that can be transferred between TAs as needed.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Volodymyr Babchuk <vlad.babchuk@gmail.com> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, Hikey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6dbcd9dd | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: use mobj for user mappings
Replaces the old mm and mm_stack elements with mobj_code and mobj_stack in user context.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Vol
core: use mobj for user mappings
Replaces the old mm and mm_stack elements with mobj_code and mobj_stack in user context.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Volodymyr Babchuk <vlad.babchuk@gmail.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0dcfa568 | 19-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: introduce MOBJ abstraction
Introduces MOBJ for memory objects, no changes in features except breaking unsafe-nw-param/mem-multipurpose.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.
core: introduce MOBJ abstraction
Introduces MOBJ for memory objects, no changes in features except breaking unsafe-nw-param/mem-multipurpose.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by Volodymyr Babchuk <vlad.babchuk@gmail.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b0bf72b2 | 12-Jan-2017 |
Andy Green <andy@warmcat.com> |
cruft: remove unreferenced HEAP_SIZE
There are no consumers of this and it just confuses the issue of how to set the heap size.
Signed-off-by: Andy Green <andy@warmcat.com> Acked-by: Jerome Forissi
cruft: remove unreferenced HEAP_SIZE
There are no consumers of this and it just confuses the issue of how to set the heap size.
Signed-off-by: Andy Green <andy@warmcat.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> [Wrap commit description. Rebase on top of master.] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 192cd568 | 28-Dec-2016 |
Peng Fan <peng.fan@nxp.com> |
core: arm: imx: add PSCI on
Add PSCI on for plat-imx.
Note: The CFG_BOOT_SECONDARY_REQUEST includes spin_table which is not required by PSCI.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-
core: arm: imx: add PSCI on
Add PSCI on for plat-imx.
Note: The CFG_BOOT_SECONDARY_REQUEST includes spin_table which is not required by PSCI.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> [s/psci/PSCI/ in commit log. Rebase on top of master.] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 319556cd | 11-Jan-2017 |
Peng Fan <peng.fan@nxp.com> |
core: arm: add PSCI support
Introduce basic PSCI support. When CFG_PSCI_ARM32 is defined, PSCI functions will be enabled. Add __weak property for the PSCI functions, developers could have their own
core: arm: add PSCI support
Introduce basic PSCI support. When CFG_PSCI_ARM32 is defined, PSCI functions will be enabled. Add __weak property for the PSCI functions, developers could have their own implementation.
PSCI is handled in monitor mode, and when finished, directly returns to nsec world.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> [s/psci/PSCI/ in commit log. Rebase on top of master.] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 9ac870c9 | 06-Jan-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Make sure "make clean" removes everything "make" has created under $(O)
"make clean" would leave behind some files and many directories. Fix this by correctly tracking the files and directories crea
Make sure "make clean" removes everything "make" has created under $(O)
"make clean" would leave behind some files and many directories. Fix this by correctly tracking the files and directories created under $(O) during the build process: - Fix incorrect file names in $(cleanfiles) and add a few missing ones. - Introduce a makefile macro: $(cleandirs-for-rmdir), defined in a new file: mk/cleandirs.mk. It returns the list of directories that should be removed, given a list of files. The clean target removes the files, then all the directories in depth- first order. $(O) is also removed, if found to be empty.
Note that a more straightforward approach was discussed in [1]: use "rm -rf $(O)/some_dir" and get rid of the whole file and directory tracking via $(cleanfiles) and $(cleandirs). Although it was agreed it would be safe, doing so would necessarily break the backward compatibility for build scripts relying on "make O=<some path>", due to the additional level ($(O)/some_dir).
Finally, mk/cleandirs.mk is exported to the TA dev kit and the clean rule for the TAs is updated.
[1] https://github.com/OP-TEE/optee_os/pull/1270
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Andy Green <andy@warmcat.com>
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| 608bd28c | 04-Jan-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: plat-vexpress: qemu_armv8a: correct DRAM config
The previous fix for DRAM configuration wasn't correct for QEMU virt ARMv8A. This patch fixes that.
Acked-by: Jerome Forissier <jerome.forissie
core: plat-vexpress: qemu_armv8a: correct DRAM config
The previous fix for DRAM configuration wasn't correct for QEMU virt ARMv8A. This patch fixes that.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU ARMv8-A) Fixes: 0f8333b888f1 ("plat-vexpress/qemu: correct DRAM layout") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 61db4299 | 05-Jan-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: sql_fs_write(): update meta.length only if length has changed
If the data size is not increased as a result of the write operation, meta.length must not be changed.
Fixes: https://github.com/
core: sql_fs_write(): update meta.length only if length has changed
If the data size is not increased as a result of the write operation, meta.length must not be changed.
Fixes: https://github.com/OP-TEE/optee_os/issues/1268 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
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| 070bca9b | 06-Jan-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix cpu_spin_trylock() against debug lock counting
To avoid confusion in cpu_spin_trylock() it now returns a boolean value: true on success, false on failure.
Signed-off-by: Etienne Carriere
core: fix cpu_spin_trylock() against debug lock counting
To avoid confusion in cpu_spin_trylock() it now returns a boolean value: true on success, false on failure.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> [Rebase on top of master] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| eacb3524 | 06-Jan-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix AArch64 __cpu_spin_trylock() return value
Before this change __cpu_spin_trylock() return value was always the lock address, not the trylock status.
Signed-off-by: Jens Wiklander <jens.wik
core: fix AArch64 __cpu_spin_trylock() return value
Before this change __cpu_spin_trylock() return value was always the lock address, not the trylock status.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> [Rebase on top of master] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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