cruft: remove unreferenced HEAP_SIZE

There are no consumers of this and it just confuses the issue of how to
set the heap size.

Signed-off-by: Andy Green <andy@warmcat.com>
Acked-by: Jerome Forissi

cruft: remove unreferenced HEAP_SIZE

There are no consumers of this and it just confuses the issue of how to
set the heap size.

Signed-off-by: Andy Green <andy@warmcat.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[Wrap commit description. Rebase on top of master.]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: imx: add PSCI on

Add PSCI on for plat-imx.

Note:
The CFG_BOOT_SECONDARY_REQUEST includes spin_table which is not
required by PSCI.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-

core: arm: imx: add PSCI on

Add PSCI on for plat-imx.

Note:
The CFG_BOOT_SECONDARY_REQUEST includes spin_table which is not
required by PSCI.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[s/psci/PSCI/ in commit log. Rebase on top of master.]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: add PSCI support

Introduce basic PSCI support.
When CFG_PSCI_ARM32 is defined, PSCI functions will be enabled.
Add __weak property for the PSCI functions, developers could
have their own

core: arm: add PSCI support

Introduce basic PSCI support.
When CFG_PSCI_ARM32 is defined, PSCI functions will be enabled.
Add __weak property for the PSCI functions, developers could
have their own implementation.

PSCI is handled in monitor mode, and when finished, directly returns
to nsec world.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[s/psci/PSCI/ in commit log. Rebase on top of master.]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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Make sure "make clean" removes everything "make" has created under $(O)

"make clean" would leave behind some files and many directories. Fix
this by correctly tracking the files and directories crea

Make sure "make clean" removes everything "make" has created under $(O)

"make clean" would leave behind some files and many directories. Fix
this by correctly tracking the files and directories created under $(O)
during the build process:
- Fix incorrect file names in $(cleanfiles) and add a few missing
ones.
- Introduce a makefile macro: $(cleandirs-for-rmdir), defined in a new
file: mk/cleandirs.mk. It returns the list of directories that should
be removed, given a list of files.
The clean target removes the files, then all the directories in depth-
first order. $(O) is also removed, if found to be empty.

Note that a more straightforward approach was discussed in [1]: use
"rm -rf $(O)/some_dir" and get rid of the whole file and directory
tracking via $(cleanfiles) and $(cleandirs). Although it was agreed it
would be safe, doing so would necessarily break the backward
compatibility for build scripts relying on "make O=<some path>", due to
the additional level ($(O)/some_dir).

Finally, mk/cleandirs.mk is exported to the TA dev kit and the clean
rule for the TAs is updated.

[1] https://github.com/OP-TEE/optee_os/pull/1270

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Andy Green <andy@warmcat.com>

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core: plat-vexpress: qemu_armv8a: correct DRAM config

The previous fix for DRAM configuration wasn't correct for QEMU virt
ARMv8A. This patch fixes that.

Acked-by: Jerome Forissier <jerome.forissie

core: plat-vexpress: qemu_armv8a: correct DRAM config

The previous fix for DRAM configuration wasn't correct for QEMU virt
ARMv8A. This patch fixes that.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU ARMv8-A)
Fixes: 0f8333b888f1 ("plat-vexpress/qemu: correct DRAM layout")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: sql_fs_write(): update meta.length only if length has changed

If the data size is not increased as a result of the write operation,
meta.length must not be changed.

Fixes: https://github.com/

core: sql_fs_write(): update meta.length only if length has changed

If the data size is not increased as a result of the write operation,
meta.length must not be changed.

Fixes: https://github.com/OP-TEE/optee_os/issues/1268
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>

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core: fix cpu_spin_trylock() against debug lock counting

To avoid confusion in cpu_spin_trylock() it now returns a boolean
value: true on success, false on failure.

Signed-off-by: Etienne Carriere

core: fix cpu_spin_trylock() against debug lock counting

To avoid confusion in cpu_spin_trylock() it now returns a boolean
value: true on success, false on failure.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: fix AArch64 __cpu_spin_trylock() return value

Before this change __cpu_spin_trylock() return value was always
the lock address, not the trylock status.

Signed-off-by: Jens Wiklander <jens.wik

core: fix AArch64 __cpu_spin_trylock() return value

Before this change __cpu_spin_trylock() return value was always
the lock address, not the trylock status.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx: imx6ulevk: handle gic and csu

we use uboot to initialize gic and csu before.
Now switch to let OP-TEE handle them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <i

core: imx: imx6ulevk: handle gic and csu

we use uboot to initialize gic and csu before.
Now switch to let OP-TEE handle them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: imx: Drop CONSOLE_UART_PA_BASE

Drop CONSOLE_UART_PA_BASE

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[Rebase on top of master]
Sign

core: arm: imx: Drop CONSOLE_UART_PA_BASE

Drop CONSOLE_UART_PA_BASE

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: imx: mx6ulevk: fix CONSOLE_UART_BASE

Fix CONSOLE_UART_BASE, otherwise we will met panic.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewe

core: imx: mx6ulevk: fix CONSOLE_UART_BASE

Fix CONSOLE_UART_BASE, otherwise we will met panic.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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secure storage: update head message when info->dataSize update

When one invokes TEE_WriteObjectData and write some data
into the secure storage file, the data size of the file
may change, but curren

secure storage: update head message when info->dataSize update

When one invokes TEE_WriteObjectData and write some data
into the secure storage file, the data size of the file
may change, but currently it will not update the head
message in persistent objects. This commit will fix this
problem by updating head message when info->dataSize update.

Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: lpae: deal with unaligned regions

Fixes problem in defined memory regions where physical address isn't
pgdir aligned.

Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Fixes: 0f8333b888f1 (

core: lpae: deal with unaligned regions

Fixes problem in defined memory regions where physical address isn't
pgdir aligned.

Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Fixes: 0f8333b888f1 ("plat-vexpress/qemu: correct DRAM layout")
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: add core_mmu_divide_block() function

This function divides L1/L2 translation table entry to L2/L3 entries.
It can be used when we need finer mapping than currently possible.

Signed-off-by

core_mmu: add core_mmu_divide_block() function

This function divides L1/L2 translation table entry to L2/L3 entries.
It can be used when we need finer mapping than currently possible.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu_v7: slight refactoring to look like core_mmu_lpae

This patch makes core_mmu_v7.c to look simmilar to core_mmu_lpae.c
- ARMv7-specific definitions was moved from core_mmu_defs.h to .c file

core_mmu_v7: slight refactoring to look like core_mmu_lpae

This patch makes core_mmu_v7.c to look simmilar to core_mmu_lpae.c
- ARMv7-specific definitions was moved from core_mmu_defs.h to .c file
- core_mmu_defs.h was removed, because it stored definitions only for v7
- core_mmu_alloc_l2() now really allocates l2 pages

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: make type_to_attr() function available globally

This function will be used by shared memory subsystem.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklande

core_mmu: make type_to_attr() function available globally

This function will be used by shared memory subsystem.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu.c: introduce add_va_space function

There can be more that one VA space. But old approach does not support
this because there can't be two VA spaces that begin at PA 0x0.

Signed-off-by: Vol

core_mmu.c: introduce add_va_space function

There can be more that one VA space. But old approach does not support
this because there can't be two VA spaces that begin at PA 0x0.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress/qemu: correct DRAM layout.

There are really more memory in qemu config, than configured in
platform_config.h
Invalid DRAM layout causes core_pbuf_is(CORE_MEM_EXTRAM) to fail
when it sh

plat-vexpress/qemu: correct DRAM layout.

There are really more memory in qemu config, than configured in
platform_config.h
Invalid DRAM layout causes core_pbuf_is(CORE_MEM_EXTRAM) to fail
when it should not.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ti: Move load address and increase SHMEM

Move and expand the shared memory allocation as suggested
by the comment above the definition. This should be a safe
place and size for all DRA7 based p

plat-ti: Move load address and increase SHMEM

Move and expand the shared memory allocation as suggested
by the comment above the definition. This should be a safe
place and size for all DRA7 based platforms.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-ti: Move console related functions to a separate file

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk

plat-ti: Move console related functions to a separate file

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: Add register size definition for serial8250_uart

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@

drivers: Add register size definition for serial8250_uart

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
[Rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-ti: Fixed issues with MMU mapping

The UART is in non-secure IO mem, mark it as such. Also map the
non-secure context in-case we are started with the MMU enabled.

Signed-off-by: Harinarayan Bha

plat-ti: Fixed issues with MMU mapping

The UART is in non-secure IO mem, mark it as such. Also map the
non-secure context in-case we are started with the MMU enabled.

Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>

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core: arm: support Xilinx ZYNQ7000 ZC702 (plat-zynq7k)

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wi

core: arm: support Xilinx ZYNQ7000 ZC702 (plat-zynq7k)

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: update plat-ls to support secondary core boot

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.

core: arm: update plat-ls to support secondary core boot

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: re-factor plat-imx6

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>