drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@

drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert)

drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert).

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: rename the sama7g5 UTMI clocks for USB PHY

The UTMI clocks for USB PHY are handled in OP-TEE due to they are
controlled by the registers from RSTC (reset controller) which is
alwa

drivers: clk: sam: rename the sama7g5 UTMI clocks for USB PHY

The UTMI clocks for USB PHY are handled in OP-TEE due to they are
controlled by the registers from RSTC (reset controller) which is
always-secured.
SCMI "reset domain management protocol" makes it prossible to handle the
resets from the kernel running in normal world. So the code in kernel for
these clocks need to be enabled. Here renaming the clocks to avoid
registering them failed from the kernel.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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clk: clk-stm32-core: fix use of ROUNDUP2_DIV() in stm32_div_get_rate()

Replace the use of ROUNDUP2_DIV() by ROUNDUP_DIV() in stm32_div_get_rate()
as some dividers may not be a power of two. In this

clk: clk-stm32-core: fix use of ROUNDUP2_DIV() in stm32_div_get_rate()

Replace the use of ROUNDUP2_DIV() by ROUNDUP_DIV() in stm32_div_get_rate()
as some dividers may not be a power of two. In this case, the platform
panics.

Fixes: 76d6685e5f3b ("tree-wide: use power-of-2 rounding macros where applicable")
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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core: notif_default: support ns-virtualization

Add support for CFG_NS_VIRTUALIZATION=y in the default notification
implementation used with the SMC ABI.

virt_add_guest_spec_data() is used to add st

core: notif_default: support ns-virtualization

Add support for CFG_NS_VIRTUALIZATION=y in the default notification
implementation used with the SMC ABI.

virt_add_guest_spec_data() is used to add struct notif_vm_bitmap for
bookkeeping per guest, similarly to the implementation for the FF-A ABI.

This takes care of and removes the assert for "!guest" in
notif_send_async().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com>
Tested-by: Yuvraj Sakshith <ysakshith@gmail.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: guest ID test for notif and VM creation

Block normal world from calling OPTEE_SMC_VM_CREATED with reserved
hypervisor client-id (0) as VMID parameter.

Normal world calls OPTEE_SMC_VM_CRE

core: arm: guest ID test for notif and VM creation

Block normal world from calling OPTEE_SMC_VM_CREATED with reserved
hypervisor client-id (0) as VMID parameter.

Normal world calls OPTEE_SMC_VM_CREATED with guest VMID in a1 and
HYP_CLNT_ID in a7. This eventually leads to copying of __data_start
to __data_end from the default partition to the guest's MMU partition.
Everything goes well until normal world passes HYP_CLNT_ID into a1 which
goes unchecked in OPTEE. When the "second VM" is created from normal
world, the first VM's MMU partition's __data_start is copied into
the new VM's MMU partition which eventually breaks the bpool freelist
pointers.

This can deliberately be used by normal world to put OP-TEE into panic.

Set guest ID when NOTIF_EVENT_STARTED is called preventing assetion
failure in get_notif_data().

Fixes: d237e616e155 ("core: make generic notifications virtualization-aware")
Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: pass guest ID to SMC_ENABLE_ASYNC_NOTIF

notif_deliver_atomic_event() expects guest_id which
is used to retrieve struct guest_partition* from
virt_get_guest(). The guest_id passed is stati

core: arm: pass guest ID to SMC_ENABLE_ASYNC_NOTIF

notif_deliver_atomic_event() expects guest_id which
is used to retrieve struct guest_partition* from
virt_get_guest(). The guest_id passed is static (0),
which causes trouble when OPTEE_SMC_ENABLE_ASYNC_NOTIF
comes from a guest. When this happens, virt_get_guest()
returns NULL which fails the assertion in get_notif_data()
which exclusively checks for CONFIG_NS_VIRTUALIZATION.

Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: refactor ubsan panic code

Move panic invocation to common function. That makes entire code a
little bit more compact and removes duplications. Also remove
volatile modifier from ubsan_panic va

core: refactor ubsan panic code

Move panic invocation to common function. That makes entire code a
little bit more compact and removes duplications. Also remove
volatile modifier from ubsan_panic variable to make checkpatch
happy.

Signed-off-by: Aleksandr Iashchenko <alexhoppus111@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix error in ubsan_builtin_unreachable naming

There is only __ubsan_handle_builtin_unreachable interface in gcc.
It was there starting from version 4.9.0.

Signed-off-by: Aleksandr Iashchenko

core: fix error in ubsan_builtin_unreachable naming

There is only __ubsan_handle_builtin_unreachable interface in gcc.
It was there starting from version 4.9.0.

Signed-off-by: Aleksandr Iashchenko <alexhoppus111@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix gcc warnings in ubsan

Latest gcc versions utilize void * as argument type for most of the
ubsan related handlers prototypes. Reproduced with gcc 11.2 .

Signed-off-by: Aleksandr Iashchenko

core: fix gcc warnings in ubsan

Latest gcc versions utilize void * as argument type for most of the
ubsan related handlers prototypes. Reproduced with gcc 11.2 .

Signed-off-by: Aleksandr Iashchenko <alexhoppus111@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix undefined reference to ubsan function

Add UBSan handler __ubsan_handle_invalid_builtin, which support
__builtin* functions validation. In some cases when __builtin functions
are used, und

core: fix undefined reference to ubsan function

Add UBSan handler __ubsan_handle_invalid_builtin, which support
__builtin* functions validation. In some cases when __builtin functions
are used, undefined behaviour might be triggered by invalid arguments.
E.g. passing 0 as the argument to __builtin_ctz or __builtin_clz
invokes undefined behavior and is diagnosed by UBSan.

Signed-off-by: Aleksandr Iashchenko <alexhoppus111@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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tree-wide: use ROUNDUP_DIV() where applicable

Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Je

tree-wide: use ROUNDUP_DIV() where applicable

Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108

plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108 test cases of which 0 failed
| 0 test cases were skipped
| TEE test application done!

* Compiled with:
| make PLATFORM=telechips-tcc805x

Signed-off-by: Sungmin Han <sungminhan@telechips.com>
Signed-off-by: GY Hwang <gy.hwang@telechips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: hisilicon: add pbkdf2 algorithm

Add pbkdf2 algorithm for hisilicon SEC driver.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

drivers: caam: introduce AE_CCM and AE_GCM compilation flags

imx6dl-sabresd, imx6q-sabresd, imx6sx-sdb does not support AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: S

drivers: caam: introduce AE_CCM and AE_GCM compilation flags

imx6dl-sabresd, imx6q-sabresd, imx6sx-sdb does not support AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add AES CCM

Implement CAAM AES CCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklande

drivers: caam: Add AES CCM

Implement CAAM AES CCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add AES GCM

Implement CAAM AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklande

drivers: caam: Add AES GCM

Implement CAAM AES GCM

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add caam_cpy_buf_src()

Add caam_cpy_buf_src() function that copy a data buffer into a caam buffer.

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra

drivers: caam: Add caam_cpy_buf_src()

Add caam_cpy_buf_src() function that copy a data buffer into a caam buffer.

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Update CCB Clear Written Register

Introduce more CCB CLR WR register

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked

drivers: caam: Update CCB Clear Written Register

Introduce more CCB CLR WR register

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add SEQ FIFO Load

Introduce Sequence Fifo load command

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wikl

drivers: caam: Add SEQ FIFO Load

Introduce Sequence Fifo load command

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@mi

drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: extend the time for waiting PLL ready

The start-up time (simulation data) of sama7g5 PLL is 50us in condition
reaching 95% of target frequency. The PLL lock status bit is not set

drivers: clk: sam: extend the time for waiting PLL ready

The start-up time (simulation data) of sama7g5 PLL is 50us in condition
reaching 95% of target frequency. The PLL lock status bit is not set a few
times with current timeout setting. Extend the time to make sure the check
is successful for any cases.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-versal2: config to select console uart

Add configuration to select console uart for AMD Versal Gen 2 platform.
Console UART can be selected through CFG_CONSOLE_UART.
Defaults to UART0.

Signed-

plat-versal2: config to select console uart

Add configuration to select console uart for AMD Versal Gen 2 platform.
Console UART can be selected through CFG_CONSOLE_UART.
Defaults to UART0.

Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>

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vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when

vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when
pager is enabled. For example, without this change the command
"time xtest regression_1006" takes around 3 minutes on my build machine,
but it takes only 9 seconds with the increased TZSRAM. Similarly, the
same test on the GitHub CI runners needs 10 minutes before the change
and only 15 seconds after.

This is related to commit 46fdfeea761f ("vexpress-qemu_armv8a: increase
CFG_CORE_HEAP_SIZE to 131072") and commit b4ed37a8c754 ("plat-vexpress:
increase QEMU heap size") which effectively took away 64K + 64KB from
the pager.

This is expected to solve the occasional timeouts that we see occurring
with the QEMUv8_check1 CI job.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want

tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want to
leverage the implementation of these routines optimized for a
power-of-2 rounding argument.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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