drivers: caam: Update CCB Clear Written Register

Introduce more CCB CLR WR register

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked

drivers: caam: Update CCB Clear Written Register

Introduce more CCB CLR WR register

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: Add SEQ FIFO Load

Introduce Sequence Fifo load command

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wikl

drivers: caam: Add SEQ FIFO Load

Introduce Sequence Fifo load command

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@mi

drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: sam: extend the time for waiting PLL ready

The start-up time (simulation data) of sama7g5 PLL is 50us in condition
reaching 95% of target frequency. The PLL lock status bit is not set

drivers: clk: sam: extend the time for waiting PLL ready

The start-up time (simulation data) of sama7g5 PLL is 50us in condition
reaching 95% of target frequency. The PLL lock status bit is not set a few
times with current timeout setting. Extend the time to make sure the check
is successful for any cases.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-versal2: config to select console uart

Add configuration to select console uart for AMD Versal Gen 2 platform.
Console UART can be selected through CFG_CONSOLE_UART.
Defaults to UART0.

Signed-

plat-versal2: config to select console uart

Add configuration to select console uart for AMD Versal Gen 2 platform.
Console UART can be selected through CFG_CONSOLE_UART.
Defaults to UART0.

Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>

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vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when

vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when
pager is enabled. For example, without this change the command
"time xtest regression_1006" takes around 3 minutes on my build machine,
but it takes only 9 seconds with the increased TZSRAM. Similarly, the
same test on the GitHub CI runners needs 10 minutes before the change
and only 15 seconds after.

This is related to commit 46fdfeea761f ("vexpress-qemu_armv8a: increase
CFG_CORE_HEAP_SIZE to 131072") and commit b4ed37a8c754 ("plat-vexpress:
increase QEMU heap size") which effectively took away 64K + 64KB from
the pager.

This is expected to solve the occasional timeouts that we see occurring
with the QEMUv8_check1 CI job.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want

tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want to
leverage the implementation of these routines optimized for a
power-of-2 rounding argument.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: remove incr_refcnt()/decr_refcnt()

Remove platform specific refcount helper functions incr_refcnt()
and decr_refcnt() and related that are no more used since commit
f63f11bd1763 ("dri

plat-stm32mp1: remove incr_refcnt()/decr_refcnt()

Remove platform specific refcount helper functions incr_refcnt()
and decr_refcnt() and related that are no more used since commit
f63f11bd1763 ("drivers: stm32_rng: keep rng enable from initialization")
merged in OP-TEE tag 3.21.0.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: stm32_util.h: remove unused include files

Remove inclusion of header files no more needed in
plat-stm32mp1/stm32_util.h.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com

plat-stm32mp1: stm32_util.h: remove unused include files

Remove inclusion of header files no more needed in
plat-stm32mp1/stm32_util.h.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: regulator: fix missing header file in stm32mp13_regulator_iod

Add missing inclusion of kernel/dt_driver.h that is needed by
stm32mp13_regulator_iod driver.

Signed-off-by: Etienne Carriere

drivers: regulator: fix missing header file in stm32mp13_regulator_iod

Add missing inclusion of kernel/dt_driver.h that is needed by
stm32mp13_regulator_iod driver.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp2: remove deprecated shared_resource stub functions

Remove stm32mp2 platform shared_resources driver stub functions
stm32mp_register_secure_periph_iomem(),
stm32mp_register_non_secure_pe

plat-stm32mp2: remove deprecated shared_resource stub functions

Remove stm32mp2 platform shared_resources driver stub functions
stm32mp_register_secure_periph_iomem(),
stm32mp_register_non_secure_periph_iomem() and
stm32mp_register_gpioz_pin_count() since shared_resources platform driver,
inherited from stm32mp1, has been fully removed in the source tree.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove deprecated shared_resource driver

Remove stm32mp1 platform shared_resources.c driver that is no more used.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked

plat-stm32mp1: remove deprecated shared_resource driver

Remove stm32mp1 platform shared_resources.c driver that is no more used.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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driver: crypto: hisilicon: add RSA algorithm

Add RSA support in Hisilicon crypto drivers.

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acke

driver: crypto: hisilicon: add RSA algorithm

Add RSA support in Hisilicon crypto drivers.

Signed-off-by: yuzexi <yuzexi@hisilicon.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: remove unused stm32mp_nsec_can_access_reset()

Remove unused platform functions stm32mp_nsec_can_access_reset()
and stm32mp_gpio_bank_is_non_secure().

Signed-off-by: Etienne Carriere

plat-stm32mp1: remove unused stm32mp_nsec_can_access_reset()

Remove unused platform functions stm32mp_nsec_can_access_reset()
and stm32mp_gpio_bank_is_non_secure().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()

Remove unused platform functions stm32mp_nsec_can_access_clock()
and stm32mp_gpio_bank_is_secure().

Signed-off-by: Etienne Carriere <eti

plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()

Remove unused platform functions stm32mp_nsec_can_access_clock()
and stm32mp_gpio_bank_is_secure().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: scmi_server: test reset/clock access against ETZPC config

Check whether or not an SCMI clock or SCMI reset domain can be accessed
using the firewall API instead of relying on shared_r

plat-stm32mp1: scmi_server: test reset/clock access against ETZPC config

Check whether or not an SCMI clock or SCMI reset domain can be accessed
using the firewall API instead of relying on shared_resources.c driver.
This latter is not useless since integration of the firewall framework
and will be soon removed.

Remove also the buggy tests on SCMI reset being exposed that relied
on wrong API function stm32mp_nsec_can_access_clock(). Test on reset
domain being accessible or not is now dynamically handled with
nsec_can_access_resource().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: firewall: stm32_etzpc: add check_access handler

Implement .check_access handler in stm32_etzpc driver.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick D

drivers: firewall: stm32_etzpc: add check_access handler

Implement .check_access handler in stm32_etzpc driver.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove PMIC registering to shared_resources driver

Remove registering of STM32MP1 PMIC driver to shared_resources driver
that is deprecated since integration of the firewall framework

plat-stm32mp1: remove PMIC registering to shared_resources driver

Remove registering of STM32MP1 PMIC driver to shared_resources driver
that is deprecated since integration of the firewall framework and
will soon be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_cryp: remove registering to shared_resource driver

Remove registering of STM32 CRYP driver to shared_resources driver that
is deprecated since integration of the firewall framework an

drivers: stm32_cryp: remove registering to shared_resource driver

Remove registering of STM32 CRYP driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework a

drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_rng: remove registering to shared_resources driver

Remove registering of STM32 RNG driver to shared_resources driver that
is deprecated since integration of the firewall framework and

drivers: stm32_rng: remove registering to shared_resources driver

Remove registering of STM32 RNG driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_iwdg: remove useless device list

STM32 watchdog driver does not manage several instances of IWDG hence
remove the useless code. To simplify code, remove stm32_iwdg_register()
local fu

drivers: stm32_iwdg: remove useless device list

STM32 watchdog driver does not manage several instances of IWDG hence
remove the useless code. To simplify code, remove stm32_iwdg_register()
local function.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_iwdg: remove registering to shared_resources driver

Remove registering of STM32 IWDG driver to platform shared_resources
driver that is deprecated since integration of the firewall fr

drivers: stm32_iwdg: remove registering to shared_resources driver

Remove registering of STM32 IWDG driver to platform shared_resources
driver that is deprecated since integration of the firewall framework
in stm32mp1 platforms. Since this integration, OP-TEE only consider
IWDG secure instances hence remove the useless code for IWDG assigned
to non-secure world.

As watchdog drivers are only used when registering to OP-TEE watchdog
services (CFG_WDT_SM_HANDLER) simplify the code to always register
IWDG instance.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER

Driver stm32_iwdg only aims at exposing an OP-TEE watchdog
service hence declare CFG_STM32_IWDG dependency on CFG_WDT and
CFG_WDT_SM_HANDLER

plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER

Driver stm32_iwdg only aims at exposing an OP-TEE watchdog
service hence declare CFG_STM32_IWDG dependency on CFG_WDT and
CFG_WDT_SM_HANDLER in stm32mp1 platform configuration file.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-vexpress: increase QEMU heap size

The core heap usage is increased by around 20kB with fTPM enabled so it
makes sense if this has to be compensated.

Increase heap size for the QEMU variants:
-

plat-vexpress: increase QEMU heap size

The core heap usage is increased by around 20kB with fTPM enabled so it
makes sense if this has to be compensated.

Increase heap size for the QEMU variants:
- QEMU v7 from 64kB to 96kB
- QEMU v8 from 128kB to 192kB

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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