| 72a9b1a0 | 21-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: crypto.h manages cipher context memory
To ease integration with other crypto libraries change the cipher context interface in crypto.h to manage the memory used for the cipher context.
Review
core: crypto.h manages cipher context memory
To ease integration with other crypto libraries change the cipher context interface in crypto.h to manage the memory used for the cipher context.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 82ef73bc | 21-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: crypto.h manages mac context memory
To ease integration with other crypto libraries change the mac context interface in crypto.h to manage the memory used for the mac context.
Reviewed-by: Je
core: crypto.h manages mac context memory
To ease integration with other crypto libraries change the mac context interface in crypto.h to manage the memory used for the mac context.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ecf2e014 | 21-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: crypto.h manages hash context memory
To ease integration with other crypto libraries change the hash context interface in crypto.h to manage the memory used for the hash context.
Reviewed-by:
core: crypto.h manages hash context memory
To ease integration with other crypto libraries change the hash context interface in crypto.h to manage the memory used for the hash context.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b1d7375c | 15-Dec-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Remove 'All rights reserved' from Linaro files
The text 'All rights reserved' is useless [1]. The Free Software Foundation's REUSE Initiative best practices document [2] does not contain these words
Remove 'All rights reserved' from Linaro files
The text 'All rights reserved' is useless [1]. The Free Software Foundation's REUSE Initiative best practices document [2] does not contain these words. Therefore, we can safely remove the text from the files that are owned by Linaro.
Generated by: spdxify.py --linaro-only --strip-arr optee_os/
Link: [1] https://en.wikipedia.org/wiki/All_rights_reserved Link: [2] https://reuse.software/practices/ Link: [3] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| 78b7c7c7 | 15-Dec-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Remove license notice from Linaro files
Now that we have added SPDX identifiers, we can safely remove the verbose license text from the files that are owned by Linaro.
Generated by [1]: spdxify.p
Remove license notice from Linaro files
Now that we have added SPDX identifiers, we can safely remove the verbose license text from the files that are owned by Linaro.
Generated by [1]: spdxify.py --linaro-only --strip-license-text optee_os/
Link: [1] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| 1bb92983 | 15-Dec-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Add SPDX license identifiers
Adds one SPDX-License-Identifier line [1] to each source files that contains license text.
Generated by [2]: spdxify.py --add-spdx optee_os/
The scancode tool [3] wa
Add SPDX license identifiers
Adds one SPDX-License-Identifier line [1] to each source files that contains license text.
Generated by [2]: spdxify.py --add-spdx optee_os/
The scancode tool [3] was used to double check the license matching code in the Python script. All the licenses detected by scancode are either detected by spdxify.py, or have no SPDX identifier, or are false matches.
Link: [1] https://spdx.org/licenses/ Link: [2] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py Link: [3] https://github.com/nexB/scancode-toolkit Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| fb7ef469 | 15-Dec-2017 |
Jerome Forissier <jerome.forissier@linaro.org> |
Reformat copyright/license header in files with an SPDX ID
Some files were committed with an SPDX license identifier before the rules were defined [1]. Reformat them accordingly.
[1] documentation/
Reformat copyright/license header in files with an SPDX ID
Some files were committed with an SPDX license identifier before the rules were defined [1]. Reformat them accordingly.
[1] documentation/copyright_and_license_headers.rst
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Joakim Bech <joakim.bech@linaro.org>
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| 513b7c9c | 10-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: lpae: zero initialize all l1 tables
Fixes: 4cc2823eb25c ("core: user mode translation table") Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jerome Forissier <jerome.fo
core: lpae: zero initialize all l1 tables
Fixes: 4cc2823eb25c ("core: user mode translation table") Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey)
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| 1df3ba05 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename mattr_uflags_to_str()
Renames mattr_uflags_to_str() to mattr_perm_to_str() and report all permission bits using a 7 bytes long string instead.
This allows observing the permissions of
core: rename mattr_uflags_to_str()
Renames mattr_uflags_to_str() to mattr_perm_to_str() and report all permission bits using a 7 bytes long string instead.
This allows observing the permissions of the minimal kernel mapping added to the user space context.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 21a7f5c6 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make all mapping non-global
Makes all mapping non-global to avoid the otherwise required tlb invalidation when switching to user mode.
This change makes the fix for CVE-2017-5754 complete.
R
core: make all mapping non-global
Makes all mapping non-global to avoid the otherwise required tlb invalidation when switching to user mode.
This change makes the fix for CVE-2017-5754 complete.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5b8a58b4 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: use minimal kernel map in user space
Adds a trampoline in the exception vector to switch to a minimal kernel map when in user mode. When returning to kernel mode the full kernel mode map is re
core: use minimal kernel map in user space
Adds a trampoline in the exception vector to switch to a minimal kernel map when in user mode. When returning to kernel mode the full kernel mode map is restored.
Arm32 tries to mimic the arm64 exception model somewhat by letting each exception handler run with disabled asynchronous aborts, irq and fiq.
Form arm32 accesses to the cpus thread_core_local is only done via the stack pointer in abort mode. Entry of user mode is only done via abort mode, that means that the abort mode spsr register carries the new cpsr. Care is taken to have all exceptions disabled while using abort mode.
ASIDs are paired with a user mode ASID with lowest bit sset and a kernel mode ASID with the lowest bit cleared.
ASID 0 is reserved for kernel mode use when there's no user mode mapping active.
With this change an active used mode mapping while in kernel mode uses (asid | 0), and while in user mode (asid | 1). The switch is done via the trampoline in the vector.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5cee6ca7 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: thread_a32.S: move intr handler macros
Moves the interrupt handler macros closer to the vector.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jero
core: thread_a32.S: move intr handler macros
Moves the interrupt handler macros closer to the vector.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 722b96ee | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: exception handlers in one section
Moves all exception handlers into the section of the vector, .text.thread_vect_table. This makes it possible to later map just the exception vector and
core: arm32: exception handlers in one section
Moves all exception handlers into the section of the vector, .text.thread_vect_table. This makes it possible to later map just the exception vector and the closest associated code while in user mode.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4cc2823e | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: user mode translation table
Adds a second translation table to be used while in user mode containing user mode mapping and a minimal kernel mapping.
Reviewed-by: Etienne Carriere <etienne.car
core: user mode translation table
Adds a second translation table to be used while in user mode containing user mode mapping and a minimal kernel mapping.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1a8307fe | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: add kernel mapping to user map
Adds a minimal kernel mapping needed when user mapping is active.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Andrew Davis <andrew
core: mm: add kernel mapping to user map
Adds a minimal kernel mapping needed when user mapping is active.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| aea6fd28 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: thread: add thread_get_user_kcode()
Adds thread_get_user_kcode() to report required kernel mapping (exception vector and some associated code in the same section as the vector) inside a user m
core: thread: add thread_get_user_kcode()
Adds thread_get_user_kcode() to report required kernel mapping (exception vector and some associated code in the same section as the vector) inside a user mapping.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2c2cb3ab | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add mobj_tee_ram
Adds mobj_tee_ram to describe TEE RAM mapping inside a user mapping.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissi
core: add mobj_tee_ram
Adds mobj_tee_ram to describe TEE RAM mapping inside a user mapping.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9cdfbc72 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: tlbi_asid() handle kernel mode ASID too
When invalidating an ASID (lowest bit 0), clear the paired ASID (lowest bit 1)too.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed
core: tlbi_asid() handle kernel mode ASID too
When invalidating an ASID (lowest bit 0), clear the paired ASID (lowest bit 1)too.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 55705e76 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor ASID management
Refactors Address Space Identifier management. The field in struct user_ta_ctx is moved into struct tee_mmu_info and renamed to asid.
Allocation refactored internally
core: refactor ASID management
Refactors Address Space Identifier management. The field in struct user_ta_ctx is moved into struct tee_mmu_info and renamed to asid.
Allocation refactored internally with asid_alloc() and asid_free() functions, based on bitstring.h macros.
ASIDs starts at 2, and is always an even number.
ASIDs with the lowest bit set is reserved for as the second ASID when using ASIDs in pairs.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 33b3d81d | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make core_mmu.h asm friendly
Makes core_mmu.h assembly friendly by excluding C code with #ifndef ASM
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier
core: make core_mmu.h asm friendly
Makes core_mmu.h assembly friendly by excluding C code with #ifndef ASM
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Andrew Davis <andrew.davis@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ca5e2958 | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32_macros.S: add {read,write}_ttbr0_64bit
Adds the macros read_ttbr0_64bit and write_ttbr0_64bit
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <
core: arm32_macros.S: add {read,write}_ttbr0_64bit
Adds the macros read_ttbr0_64bit and write_ttbr0_64bit
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3ccaf0dc | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32_macros.S: add {read,write}_tpidrprw
Adds the assembly macros write_tpidrprw and read_tpidrprw to access the TPIDRPRW register.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org
core: arm32_macros.S: add {read,write}_tpidrprw
Adds the assembly macros write_tpidrprw and read_tpidrprw to access the TPIDRPRW register.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3bc90f3d | 13-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: sm: invalidate branch predictor
If build with secure monitor and CFG_CORE_WORKAROUND_SPECTRE_BP=y invalidate branch predictor on non-secure entry.
Fixes CVE-2017-5715
Reviewed-by: Jer
core: arm32: sm: invalidate branch predictor
If build with secure monitor and CFG_CORE_WORKAROUND_SPECTRE_BP=y invalidate branch predictor on non-secure entry.
Fixes CVE-2017-5715
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 705ee6a3 | 23-Dec-2017 |
Zeng Tao <prime.zeng@hisilicon.com> |
core: fix the reopen session condition for single instance TA
when a single instance TA is not muti-session, it 's allowed to open a new session only if the TA context reference is not zero, no matt
core: fix the reopen session condition for single instance TA
when a single instance TA is not muti-session, it 's allowed to open a new session only if the TA context reference is not zero, no matter whether it is keepalive or not.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com>
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| d5d50c3c | 27-Dec-2017 |
Jens Wiklander <jens.wiklander@linaro.org> |
Fix USER_TA_PROP_TYPE_BOOL handling
In 'ta_props' in ta/arch/arm/user_ta_header.c properties tagged as USER_TA_PROP_TYPE_BOOL are assigned a pointer to a bool, but is in the rest of the code handled
Fix USER_TA_PROP_TYPE_BOOL handling
In 'ta_props' in ta/arch/arm/user_ta_header.c properties tagged as USER_TA_PROP_TYPE_BOOL are assigned a pointer to a bool, but is in the rest of the code handled as if it was a pointer to a uint32_t. This works as long as a bool is four bytes, with certain compilers the size of a `bool` is 1 instead leading to errors.
TA properties can be supplied via the define TA_CURRENT_TA_EXT_PROPERTIES. The pattern used in ta/arch/arm/user_ta_header.c is likely copied when assigning properties via TA_CURRENT_TA_EXT_PROPERTIES.
This patch is fixing the assumption that the size of a `bool` is the same as the size of a `uint32_t` by changing all handling of USER_TA_PROP_TYPE_BOOL to base it on the type `bool` instead of `uint32_t`.
Reviewed-by: Jianhui Li <airbak.li@hisilicon.com> Tested by: Jianhui Li <airbak.li@hisilicon.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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