| c0b2e931 | 03-Feb-2018 |
Victor Chong <victor.chong@linaro.org> |
Force ARCH to arm
It is the only value used for now. No other value works, not even aarch64.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@li
Force ARCH to arm
It is the only value used for now. No other value works, not even aarch64.
Signed-off-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 512f5091 | 24-Jan-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
smc: extend protocol to support virtualization
In order to support multiple guests, OP-TEE should be able to track guest lifecycle. Idea is that hypervisor informs OP-TEE when it wants to create a n
smc: extend protocol to support virtualization
In order to support multiple guests, OP-TEE should be able to track guest lifecycle. Idea is that hypervisor informs OP-TEE when it wants to create a new virtual machine. OP-TEE allocates resources for it or returns an error, if there are not enough resources available. When virtual machine is being destroyed OP-TEE frees any resources that was allocated previously.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ab535411 | 02-Feb-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: add pager constraint on mobj get_pa method
On user TA crash or panic the core may dump the TA state among which the physical address of the memory area mapped in the TA space which are referen
core: add pager constraint on mobj get_pa method
On user TA crash or panic the core may dump the TA state among which the physical address of the memory area mapped in the TA space which are referenced by the mobj layer. Therefore the get_pa method for such mobj shall have a KEEP_PAGER constraint.
This change adds such constraint for static shm and registered shm memory objects.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 94a72998 | 01-Feb-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fs_htree: include meta in root hash
Includes the meta data when calculating the hash of the root node to detect changes in file length while number of blocks is unchanged.
Signed-off-by: Jens
core: fs_htree: include meta in root hash
Includes the meta data when calculating the hash of the root node to detect changes in file length while number of blocks is unchanged.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Fixes: https://github.com/OP-TEE/optee_os/issues/2094 Reported-by: Kevin Peng <kevinp@marvell.com> Tested-by: Kevin Peng <kevinp@marvell.com> [jf: add Fixes:, Reported-by: and Tested-by: tags] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| bf071c7a | 31-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: REE FS: ree_fs_truncate() commit dirh writes
To commit the changes done by ree_fs_truncate() in the dirfile, call commit_dirh_writes() before closing the dirh.
Signed-off-by: Jens Wiklander <
core: REE FS: ree_fs_truncate() commit dirh writes
To commit the changes done by ree_fs_truncate() in the dirfile, call commit_dirh_writes() before closing the dirh.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 33e4def6 | 25-Jan-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: REE FS: make sure dirty flag is set when object is truncated
When an object is truncated but the number of blocks is unchanged, only the metadata's length field is modified. The hash tree laye
core: REE FS: make sure dirty flag is set when object is truncated
When an object is truncated but the number of blocks is unchanged, only the metadata's length field is modified. The hash tree layer has to be notified so that it knows it has to flush the data before closing the object, otherwise the truncation is lost. Add a function for that purpose: tee_fs_htree_meta_set_dirty(), and call it whenever meta->length is updated.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e1c98967 | 25-Jan-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: REE FS: ree_fs_truncate(): fix reversed error checks
Reported-by: Kevin Peng <kevinp@marvell.com> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jen
core: REE FS: ree_fs_truncate(): fix reversed error checks
Reported-by: Kevin Peng <kevinp@marvell.com> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bda4804c | 01-Feb-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: sm_a32: add missing isb after scr change
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <
core: sm_a32: add missing isb after scr change
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ae9208f1 | 30-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
arm32: enable ACTLR_CA8_ENABLE_INVALIDATE_BTB
Enables ACTLR_CA8_ENABLE_INVALIDATE_BTB (ACTLR[6]) in generic boot if compiled with CFG_CORE_WORKAROUND_SPECTRE_BP or CFG_CORE_WORKAROUND_SPECTRE_BP_SEC
arm32: enable ACTLR_CA8_ENABLE_INVALIDATE_BTB
Enables ACTLR_CA8_ENABLE_INVALIDATE_BTB (ACTLR[6]) in generic boot if compiled with CFG_CORE_WORKAROUND_SPECTRE_BP or CFG_CORE_WORKAROUND_SPECTRE_BP_SEC and the cpu is discovered to be Cortex-A8.
Fixes CVE-2017-5715 Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 259d7eb1 | 25-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mmu: protect global asid field with a lock
Protects the global ASID bitfield (g_asid) with a spinlock.
Fixes: 99f969dd6c99 ("core: fine grained tee_ta_mutex locking") Reviewed-by: Volodymyr B
core: mmu: protect global asid field with a lock
Protects the global ASID bitfield (g_asid) with a spinlock.
Fixes: 99f969dd6c99 ("core: fine grained tee_ta_mutex locking") Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey)
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| b0961f98 | 29-Jan-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: fix handling of NULL memory references by Internal Client API
GlobalPlatform TEE Internal Core API v1.1.2 section 4.9.4 states that parameters of type *_MEMREF_* can have memref.buffer == NULL
core: fix handling of NULL memory references by Internal Client API
GlobalPlatform TEE Internal Core API v1.1.2 section 4.9.4 states that parameters of type *_MEMREF_* can have memref.buffer == NULL, provided that memref.size is zero.
The corresponding test in tee_svc_copy_param() is backwards, so reverse it.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Kevin Peng <kevinp@marvell.com> Link: https://github.com/OP-TEE/optee_os/issues/2105 Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU) Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Tested-by: Kevin Peng <kevinp@marvell.com>
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| 6fde6f02 | 25-Jan-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
Revert "core: fine grained tee_ta_mutex locking"
Commit 99f969dd6c99 ("core: fine grained tee_ta_mutex locking") fixes a deadlock that can occur if a TA is loaded while not enough page tables are av
Revert "core: fine grained tee_ta_mutex locking"
Commit 99f969dd6c99 ("core: fine grained tee_ta_mutex locking") fixes a deadlock that can occur if a TA is loaded while not enough page tables are available in pgt_cache to map the context. But it also splits up a big critical section and there's obviously a few hidden dependencies towards tee_ta_mutex causing stability issues with the pager. Running 'while xtest 1013; do true; done' in AArch64 with at least three threads running in parallel will ultimately fail.
Therefore, revert the fine grained locking commit until the race conditions are sorted out.
Reported-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| c10e9d48 | 24-Jan-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
secstor: fix memory leak in install_ta()
If signature check failed, we need to close tadb session first.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jerome Forissier <jer
secstor: fix memory leak in install_ta()
If signature check failed, we need to close tadb session first.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e9596d07 | 22-Jan-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: prevent crash in tee_mmu_final() on TA loading error
If the creation of the TA execution context fails before the mapping directives are initialized, tee_mmu_final() will be called with the TA
core: prevent crash in tee_mmu_final() on TA loading error
If the creation of the TA execution context fails before the mapping directives are initialized, tee_mmu_final() will be called with the TA context field mmu being NULL.
This change allows tee_mmu_final() to be called with uninitialized mapping resources without crashing the core.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b9a1067e | 22-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix reference counting in tee_tadb_open()
Fixes reference counting error in tee_tadb_open() that was exposed by commit 99f969dd6c99 ("core: fine grained tee_ta_mutex locking")
Fixes: 5baee69a
core: fix reference counting in tee_tadb_open()
Fixes reference counting error in tee_tadb_open() that was exposed by commit 99f969dd6c99 ("core: fine grained tee_ta_mutex locking")
Fixes: 5baee69a0140 ("core: add tadb") Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU v7) Reported-by: Andrew Davis <andrew.davis@linaro.org> Tested-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 24a8c0ad | 19-Dec-2017 |
Peter Griffin <peter.griffin@linaro.org> |
hikey: Enable cache APIs for hikey platform.
When decrypting into SDP buffers TA's like Playready and Widevine need to be able to flush the cache.
Signed-off-by: Peter Griffin <peter.griffin@linaro
hikey: Enable cache APIs for hikey platform.
When decrypting into SDP buffers TA's like Playready and Widevine need to be able to flush the cache.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| baa999cd | 19-Jan-2018 |
Tetsuya Yoshizaki <yoshizaki.tetsuya@socionext.com> |
ltc: ctr: update pt and ct after acceleration
Problem occurs in the condition of the following case:
1st decryption: Decrypt a ciphertext whose length is a multiple of the block size (16B) (len = n
ltc: ctr: update pt and ct after acceleration
Problem occurs in the condition of the following case:
1st decryption: Decrypt a ciphertext whose length is a multiple of the block size (16B) (len = n * block_size) 2nd decryption: Decrypt the continuing ciphertext whose length is not a multiple of the block size (len = m * block_size + l)
In this case accel_ctr_encrypt() is firstly used at the 2nd decryption. If pt and ct are not updated, the top (l = len % block_size) bytes of decryption result are sometimes destroyed.
Signed-off-by: Tetsuya Yoshizaki <yoshizaki.tetsuya@socionext.com> Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960) Link: https://github.com/libtom/libtomcrypt/commit/d1d3ae2d1e70
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| 99f969dd | 18-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fine grained tee_ta_mutex locking
Changes TA loading and session initialization to use fine grained locking based on the tee_ta_mutex.
This avoids a potential dead lock with PGT cache where w
core: fine grained tee_ta_mutex locking
Changes TA loading and session initialization to use fine grained locking based on the tee_ta_mutex.
This avoids a potential dead lock with PGT cache where we're waiting for new page tables with tee_ta_mutex locked, which prevents tee_ta_close_session() to indirectly return any page tables.
This change also removes the last really big critical section. With this TAs can be loaded in parallel.
Reported-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Tested-by: Zhizhou Zhang <zhizhouzhang@asrmicro.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bf300713 | 18-Jan-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: tee_svc.c: stop using tee_ta_mutex
A MOBJ handles serialization internally so there's no need to acquire tee_ta_mutex before freeing or allocating a MOBJ.
Acked-by: Jerome Forissier <jerome.f
core: tee_svc.c: stop using tee_ta_mutex
A MOBJ handles serialization internally so there's no need to acquire tee_ta_mutex before freeing or allocating a MOBJ.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4eaf9b04 | 18-Jan-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
Fix compiler warning with register_sdp_mem()
Fixes the following warning/error when CFG_SECURE_DATA_PATH is disabled:
$ make PLATFORM=hikey CFG_SECURE_DATA_PATH=n ... core/arch/arm/mm/core_mmu.c
Fix compiler warning with register_sdp_mem()
Fixes the following warning/error when CFG_SECURE_DATA_PATH is disabled:
$ make PLATFORM=hikey CFG_SECURE_DATA_PATH=n ... core/arch/arm/mm/core_mmu.c:90:61: error: ISO C does not allow extra ';' outside of a function [-Werror=pedantic] register_sdp_mem(CFG_TEE_SDP_MEM_BASE, CFG_TEE_SDP_MEM_SIZE); ^ cc1: all warnings being treated as errors
Fixes: 2d9ed57b6bd8 ("Define register_sdp_mem() only when CFG_SECURE_DATA_PATH is defined") Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 31faca5d | 16-Jan-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
Remove support for Allwinner A80 platform (plat-sunxi)
It has been almost three years since we have heard about plat-sunxi (no new contributions, no patch ack'ed or tested, no feedback at release ti
Remove support for Allwinner A80 platform (plat-sunxi)
It has been almost three years since we have heard about plat-sunxi (no new contributions, no patch ack'ed or tested, no feedback at release time). Therefore, remove support for this platform.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> CC: Sun Yangbang <sunny@allwinnertech.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5051b512 | 15-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
arm32: sm: init CNTVOFF
There is an property "arm,cpu-registers-not-fw-configured" in Linux side, that could workaround the issue that firmare initialize CNTVOFF.
But if use that property, virtuali
arm32: sm: init CNTVOFF
There is an property "arm,cpu-registers-not-fw-configured" in Linux side, that could workaround the issue that firmare initialize CNTVOFF.
But if use that property, virtualization support will be break in linux.
Also without CNTVOFF or that property no defined, kernel could not boot up on i.MX7D with two cores.
So we init CNTVOFF in OP-TEE to make kernel work well.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 343c1571 | 17-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
tzc380: export more api
Introduce tzc_security_inversion_en tzc_enable_region tzc_fail_dump and tzc_int_clear.
When we want to block secure access to region configured TZC_ATTR_SP_NS_RW, need to us
tzc380: export more api
Introduce tzc_security_inversion_en tzc_enable_region tzc_fail_dump and tzc_int_clear.
When we want to block secure access to region configured TZC_ATTR_SP_NS_RW, need to use tzc_security_inversion_en.
Sometimes we need to configure the regions first, then enable the region.
tzasc380 interrupt could be enabled to catch some illegal access with tzc_fail_dump and tzc_int_clear.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| fe1404da | 20-Dec-2017 |
Peng Fan <peng.fan@nxp.com> |
tzc380: do not write reserved bits
For region0, only SP is configurable, so should not configure region low/high.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jens Wiklander <jens.wiklander
tzc380: do not write reserved bits
For region0, only SP is configurable, so should not configure region low/high.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7f45f761 | 17-Oct-2017 |
Ken Liu <ken.liu@arm.com> |
core: add pseudo-TA for retrieve sdp physical address
Add a pseudo-TA to convert a Secure Data Path virtual address to physical address. May only be called by a TA that has TA_FLAG_SECURE_DATA_PATH.
core: add pseudo-TA for retrieve sdp physical address
Add a pseudo-TA to convert a Secure Data Path virtual address to physical address. May only be called by a TA that has TA_FLAG_SECURE_DATA_PATH.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Tested-by: Edison Ai <edison.ai@arm.com> (Juno) Signed-off-by: Edison Ai <edison.ai@arm.com>
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