| bed5dcff | 25-Jul-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: wdog: correct wdog_path
The prefix `0` is removed in Linux Kernel upstream code, so let's drop it to let wdog work.
Linux Kernel commit 67b8d5c7081221efa252("Linux 4.17-rc5")
Signed-off-by: P
imx: wdog: correct wdog_path
The prefix `0` is removed in Linux Kernel upstream code, so let's drop it to let wdog work.
Linux Kernel commit 67b8d5c7081221efa252("Linux 4.17-rc5")
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 50432453 | 27-Jun-2018 |
Jordan Rhee <jordanrh@microsoft.com> |
plat-imx: add i.MX6 Hummingboard Edge platform flavors
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
| 53afeff5 | 27-Jun-2018 |
Jordan Rhee <jordanrh@microsoft.com> |
plat-imx: make platform flavor list diff friendly
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
| bad91efa | 17-Jul-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-hikey: embed ta/avb as early TA
In order to support AVB in U-boot embed the AVB ta as an early TA.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <je
plat-hikey: embed ta/avb as early TA
In order to support AVB in U-boot embed the AVB ta as an early TA.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3638ea32 | 17-Jul-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
Add CFG_IN_TREE_EARLY_TAS
Adds CFG_IN_TREE_EARLY_TAS which is used to embed in-tree TAs as early TAs in the OP-TEE binary.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by:
Add CFG_IN_TREE_EARLY_TAS
Adds CFG_IN_TREE_EARLY_TAS which is used to embed in-tree TAs as early TAs in the OP-TEE binary.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b048d329 | 08-Jun-2018 |
Sourabh <sourabhdas143@gmail.com> |
user_ta: should go for other TA stores on any load error
There seems to be an issue that if RPMB_FS is enabled in OPTEE and TA is present in REE (normal file system), if priority for secure storage
user_ta: should go for other TA stores on any load error
There seems to be an issue that if RPMB_FS is enabled in OPTEE and TA is present in REE (normal file system), if priority for secure storage TA is higher and RPMB initialization fails, the error is returned and the OPTEE doesn't goes to find the TA from REE TA store.
The issue is fixed by adding a 'continue' statement after printing the respective error.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Sourabh Das <sourabhdas143@gmail.com>
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| 44061046 | 10-Jul-2018 |
Peng Fan <peng.fan@nxp.com> |
core: unwind: correct function args for print_stack_arm32/64
When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure: " core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32': core/
core: unwind: correct function args for print_stack_arm32/64
When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure: " core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32': core/arch/arm/kernel/abort.c:113:2: error: too many arguments to function 'print_stack_arm32' print_stack_arm32(TRACE_ERROR, &state, exidx, exidx_sz, kernel_stack, ^~~~~~~~~~~~~~~~~ "
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f6d17e33 | 05-Jul-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: define syscall_t as void (*)(void)
syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to represent a pointer to any system call, in the syscall table for instance. As such,
core: define syscall_t as void (*)(void)
syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to represent a pointer to any system call, in the syscall table for instance. As such, the exact type behind syscall_t cannot reflect all the syscalls since they have different prototypes. The current declaration with a TEE_Result return type was probably chosen because it was a common characteristic of all syscalls to return a TEE_Result.
However, this type causes compilation warnings with GCC 8.1:
core/arch/arm/tee/arch_svc.c:43:36: warning: cast between incompatible function types from ‘void (*)(long unsigned int)’ to ‘TEE_Result (*)(void)’ {aka ‘unsigned int (*)(void)’} [-Wcast-function-type] #define SYSCALL_ENTRY(_fn) { .fn = (syscall_t)_fn } ^ core/arch/arm/tee/arch_svc.c:50:2: note: in expansion of macro ‘SYSCALL_ENTRY’ SYSCALL_ENTRY(syscall_sys_return), ^~~~~~~~~~~~~
The solution is to use 'void (*)(void)' instead, as explained in the GCC documentation:
-Wcast-function-type
Warn when a function pointer is cast to an incompatible function pointer. [...] The function type void (*) (void) is special and matches everything, which can be used to suppress this warning. [...]
Link: [1] https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6c9c7a3f | 02-Jul-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
drivers: hi16xx_rng: replace mutex with spinlock
The mutex in hw_get_random_byte() protects a very short section of code. A spinlock is more lightweight and therefore better suited to the task.
Sig
drivers: hi16xx_rng: replace mutex with spinlock
The mutex in hw_get_random_byte() protects a very short section of code. A spinlock is more lightweight and therefore better suited to the task.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 93536408 | 30-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
thread: move stacks to separate sections
With this change it is possible to move tmp and abt stacks to kernel memory area, while leaving thread stacks in tee memory.
Signed-off-by: Volodymyr Babchu
thread: move stacks to separate sections
With this change it is possible to move tmp and abt stacks to kernel memory area, while leaving thread stacks in tee memory.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6dd18fa4 | 25-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
link_dummy.ld: provide __data_start symbol
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 19f2d3a3 | 25-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
linker.h: declare __data_start as non-const
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 696abe98 | 25-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
asid: move asid allocator from tee_mmu.c to core_mmu.c
ASIDs will be allocated for individual virtrual guests, so allocator should reside in more generic place.
Also, comment for MMU_NUM_ASIDS was
asid: move asid allocator from tee_mmu.c to core_mmu.c
ASIDs will be allocated for individual virtrual guests, so allocator should reside in more generic place.
Also, comment for MMU_NUM_ASIDS was updated.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6de30696 | 19-Jan-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
mmu: align va of memory regions to pa modulo PGDIR_SIZE
If pa % PGDIR_SIZE == va % PGDIR_SIZE, then we can effectively map large smallpage-aligned regions. Most of the region can be mapped with supe
mmu: align va of memory regions to pa modulo PGDIR_SIZE
If pa % PGDIR_SIZE == va % PGDIR_SIZE, then we can effectively map large smallpage-aligned regions. Most of the region can be mapped with super blocks and only ends will be mapped using small pages.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7558c164 | 31-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
generic_ram_layout: align TA_RAM to SMALL_PAGE_SIZE
This enables more optimal memory usage, as there will be no unused holes in memory mappings.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail
generic_ram_layout: align TA_RAM to SMALL_PAGE_SIZE
This enables more optimal memory usage, as there will be no unused holes in memory mappings.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8267e19b | 20-Jun-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm: sm: initialize PMCR.DP to 1 and save/restore PMCR
Introduce CFG_SM_NO_CYCLE_COUNTING to intitialize PMCR.DP to 1 and save/restore PMCR on world switch. Similar to what is done in ARM TF c
core: arm: sm: initialize PMCR.DP to 1 and save/restore PMCR
Introduce CFG_SM_NO_CYCLE_COUNTING to intitialize PMCR.DP to 1 and save/restore PMCR on world switch. Similar to what is done in ARM TF commit 3e61b2b54336 ("Init and save / restore of PMCR_EL0 / PMCR") [1].
The purpose of this is to (hopefully) make attacks such as CLKSCREW [2] harder to mount, although it is likely that timing information could be obtained via other means.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Link: [1] https://github.com/ARM-software/arm-trusted-firmware/commit/3e61b2b54336 Link: [2] https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-tang.pdf Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0160fec3 | 20-Jun-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm: sm: rename struct sm_mode_regs to sm_unbanked_regs
struct sm_mode_regs will soon be used to store one non-banked register other then the mode registers (PMCR). Rename it to sm_unbanked_re
core: arm: sm: rename struct sm_mode_regs to sm_unbanked_regs
struct sm_mode_regs will soon be used to store one non-banked register other then the mode registers (PMCR). Rename it to sm_unbanked_regs.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 645718ee | 23-Mar-2018 |
Silvano di Ninno <silvano.dininno@nxp.com> |
drivers: imx_wdog driver cleanup
use WDT_WCR defined in watchdog specific imx_wdog.h instead of WCR_OFF defined in the platform imx-regs.h
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
drivers: imx_wdog driver cleanup
use WDT_WCR defined in watchdog specific imx_wdog.h instead of WCR_OFF defined in the platform imx-regs.h
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| af8149de | 27-Jun-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make stack trace robust
Makes stack trace robust by checking addresses before copying data. Kernel stack traces are a bit more relaxed as we have crashed already.
Reviewed-by: Jerome Forissie
core: make stack trace robust
Makes stack trace robust by checking addresses before copying data. Kernel stack traces are a bit more relaxed as we have crashed already.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960 AArch32, Aarch64) Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno, QEMU) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a0c3590b | 20-Jun-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix offset in assign_mobj_to_param_mem()
Prior to this patch assign_mobj_to_param_mem() stored the offset supplied with a non-contiguous buffer in mem->offs. Since that offset already is store
core: fix offset in assign_mobj_to_param_mem()
Prior to this patch assign_mobj_to_param_mem() stored the offset supplied with a non-contiguous buffer in mem->offs. Since that offset already is stored inside the resulting MOBJ that offset is added twice. This patch fixes this by initializing mem->offs to 0 instead.
Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e7dc41ca | 26-Jun-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: update max pa after discovered nsec ddr
Once non-secure DDR is discovered either via FDT or via register_ddr() maximum output address is updated.
Note that is only has an effect in AAr
core: arm64: update max pa after discovered nsec ddr
Once non-secure DDR is discovered either via FDT or via register_ddr() maximum output address is updated.
Note that is only has an effect in AArch64.
Fixes: https://github.com/OP-TEE/optee_os/issues/2402 Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Suggested-by: Jean-Paul Etienne <jean-paul.etienne@arm.com> Reported-by: Rouven Czerwinski <rouven@czerwinskis.de> Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Juno, FVP) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8082150f | 26-Jun-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64.h: add TCR_EL1_IPS_MASK
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> |
| ae967ad5 | 27-Jun-2018 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm: fix MIN/MAX macro issue in platform_config.h
Use MIN_UNSAFE/MAX_UNSAFE macros as MAX/MIN macros fail to build from in current platform_config.h imaplement with the error trace below:
In f
plat-stm: fix MIN/MAX macro issue in platform_config.h
Use MIN_UNSAFE/MAX_UNSAFE macros as MAX/MIN macros fail to build from in current platform_config.h imaplement with the error trace below:
In file included from core/arch/arm/include/arm.h:8:0, from core/arch/arm/include/kernel/thread.h:11, from core/arch/arm/kernel/asm-defines.c:7: lib/libutils/ext/include/util.h:24:16: error: missing binary operator before token "(" (__extension__({ __typeof__(a) _a = (a); \ ^ core/arch/arm/plat-stm/./platform_config.h:190:25: note: in expansion of macro ‘MAX’ #define STM_SECDDR_END MAX(TZSRAM_BASE + TZSRAM_SIZE, \ ^~~ core/arch/arm/plat-stm/./platform_config.h:204:6: note: in expansion of macro ‘STM_SECDDR_END’ #if (STM_SECDDR_END < 0x80000000ULL) ^~~~~~~~~~~~~~ make: *** [out/core/include/generated/.asm-defines.s] Error 1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ce0eb3c6 | 23-Mar-2018 |
Silvano di Ninno <silvano.dininno@nxp.com> |
drivers: tzc380: fix tzc_configure_region api
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> |
| 2d8739bd | 03-Jan-2018 |
Igor Opaniuk <igor.opaniuk@linaro.org> |
benchmark: change the way of timestamp buffer allocation.
In case if timestamp buffer is allocated in userspace and new register user memory API is used for its registering in OP-TEE (introduced in
benchmark: change the way of timestamp buffer allocation.
In case if timestamp buffer is allocated in userspace and new register user memory API is used for its registering in OP-TEE (introduced in optee_client commit 27888d73d156 ("tee_client_api: register user memory")), there is no possibility to keep this mapping permanent among different TEEC_InvokeCommand invocations, as all SHM are automatically unmapped from OP-TEE VA space after TEEC_InvokeCommand is handled by OP-TEE.
Timestamp buffer is now allocated with thread_rpc_alloc_global_payload().
Fixes: https://github.com/OP-TEE/optee_os/issues/1979 Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
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