drivers: ele: use the baseline API to retrieve the UID

Use the baseline API instead of the HSM to retrieve the UID. These two
API calls are duplicates and the HSM call is soon deprecated.

Signed-of

drivers: ele: use the baseline API to retrieve the UID

Use the baseline API instead of the HSM to retrieve the UID. These two
API calls are duplicates and the HSM call is soon deprecated.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: ele: disable ASLR for imx8ulp

On imx8ulp, the RNG code from ELE is not available at resume. Disable
the ASLR feature and make it available for imx93 only.

Signed-off-by: Clement Faure <cle

drivers: ele: disable ASLR for imx8ulp

On imx8ulp, the RNG code from ELE is not available at resume. Disable
the ASLR feature and make it available for imx93 only.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: ele: add memory management functions

Add memory management function

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Et

drivers: ele: add memory management functions

Add memory management function

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: ele: getting common macros and functions in header file

Taking out macros and functions from c file and put them in
header file for being used by the other files of crypto driver.

Signed-o

drivers: ele: getting common macros and functions in header file

Taking out macros and functions from c file and put them in
header file for being used by the other files of crypto driver.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: ele: move ELE to a dedicated directory

Created a new folder in core/drivers/crypto named ele
and moved ele.c in that folder.
This is done for making the base for further crypto driver
based

drivers: ele: move ELE to a dedicated directory

Created a new folder in core/drivers/crypto named ele
and moved ele.c in that folder.
This is done for making the base for further crypto driver
based on ELE.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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riscv: plat-virt: add APLIC and IMSIC support for QEMU virt platform

- Add APLIC and IMSIC configurations for the QEMU virt platform.
- Override the interrupt controller initialization and interrupt

riscv: plat-virt: add APLIC and IMSIC support for QEMU virt platform

- Add APLIC and IMSIC configurations for the QEMU virt platform.
- Override the interrupt controller initialization and interrupt handler
functions when using APLIC or IMSIC.

Signed-off-by: Huang Borong <huangborong@bosc.ac.cn>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: add RISC-V APLIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the APLIC, which can serve as a new external interrupt controller to
replace the

drivers: add RISC-V APLIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the APLIC, which can serve as a new external interrupt controller to
replace the original Platform-Level Interrupt Controller (PLIC) or as a
device to convert wired interrupts into message-signaled interrupts
(MSIs) and forward them to the Incoming MSI Controller (IMSIC).

The APLIC driver supports both "direct delivery mode" and
"MSI delivery mode." Use the `CFG_RISCV_APLIC` flag to enable the
APLIC driver in "direct delivery mode," and use the
`CFG_RISCV_APLIC_MSI` flag to enable the APLIC driver in "MSI
delivery mode" when selecting `CFG_RISCV_IMSIC`.

APLIC initialization can be done through the device tree.

For more details, see: https://github.com/riscv/riscv-aia

Signed-off-by: Huang Borong <huangborong@bosc.ac.cn>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: add RISC-V IMSIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the IMSIC as a new external interrupt controller. An IMSIC receives and
records i

drivers: add RISC-V IMSIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the IMSIC as a new external interrupt controller. An IMSIC receives and
records incoming message-signaled interrupts (MSIs).

This commit enables the initialization of the IMSIC based on the device
tree and adds control and status registers (CSRs) for indirect access to
the IMSIC as well as for reading interrupt identities.

Use the `CFG_RISCV_IMSIC` flag to control whether to build this driver.

For more details, see: https://github.com/riscv/riscv-aia

Signed-off-by: Huang Borong <huangborong@bosc.ac.cn>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: kernel: Remove unused call_initcalls()

Remove call_initcalls() since there is no architecture calls it.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wi

core: kernel: Remove unused call_initcalls()

Remove call_initcalls() since there is no architecture calls it.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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core: arm: Remove dummy call_initcalls()

Remove call_initcalls() since we will remove prototype of this function.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jen

core: arm: Remove dummy call_initcalls()

Remove call_initcalls() since we will remove prototype of this function.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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core: riscv: Call call_driver_initcalls() late

Calls call_early_initcalls() and call_service_initcalls() directly
instead of call_initcalls() from init_tee_runtime().

This commit is to synchronize

core: riscv: Call call_driver_initcalls() late

Calls call_early_initcalls() and call_service_initcalls() directly
instead of call_initcalls() from init_tee_runtime().

This commit is to synchronize the initcalls with ARM architecture,
introduced in 27ed6973 (core: arm: call call_driver_initcalls() late).

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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core: riscv: Introduce boot_init_primary_final()

Introduce boot_init_primary_final() and move the call to
call_finalcalls() into that function.

This commit is to synchronize the boot stages with AR

core: riscv: Introduce boot_init_primary_final()

Introduce boot_init_primary_final() and move the call to
call_finalcalls() into that function.

This commit is to synchronize the boot stages with ARM architecture,
introduced in d0c23684 (core: arm: introduce boot_init_primary_final()).

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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core: do not acknowledge end of interrupt for special GIC interrupt IDs

According to the ARM documentation for GICV2/3/4, there is no need to
write to the end of interrupt register for some special

core: do not acknowledge end of interrupt for special GIC interrupt IDs

According to the ARM documentation for GICV2/3/4, there is no need to
write to the end of interrupt register for some special IDs. Apply this
recommendation to avoid writing to IO memory in this time sensitive
sequence.

Also distinguish unhandled interrupts with an error log.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fix debug event fault value for ARM32 with LPAE

According to ARM documentation, the debug event fault value is indeed
0b100010, which is 0x22, not 0x12. Fix this value in
core_mmu_get_fault_ty

core: fix debug event fault value for ARM32 with LPAE

According to ARM documentation, the debug event fault value is indeed
0b100010, which is 0x22, not 0x12. Fix this value in
core_mmu_get_fault_type().

Fixes: 0eff3e9bf016 ("arm32: Adds LPAE support")
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp2: add platform-specific abort handler

When a data abort occurs and its fault type is FAULT_TYPE_IGNORE, it
may be an abort generated by the SERC hardware block. Check if a
SERC Illegal

plat-stm32mp2: add platform-specific abort handler

When a data abort occurs and its fault type is FAULT_TYPE_IGNORE, it
may be an abort generated by the SERC hardware block. Check if a
SERC Illegal Access was caught and print the SERC register and panic()
if that is the case.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add platform-specific abort handler

Platforms may have specific code to handle an abort when fault type
is FAULT_TYPE_IGNORE. Add plat_abort_handler() that can be overridden
at platform level

core: add platform-specific abort handler

Platforms may have specific code to handle an abort when fault type
is FAULT_TYPE_IGNORE. Add plat_abort_handler() that can be overridden
at platform level.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: imx: rngb: early initialization

The RNGB module must be ready during init_tee_runtime to provide a
random stack canary value during bootup.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundr

drivers: imx: rngb: early initialization

The RNGB module must be ready during init_tee_runtime to provide a
random stack canary value during bootup.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: interrupt: fix interrupt_set_{affinity|wake}() description

Fix inline description of itr_num argument for interrupt_set_affinity()
and interrupt_set_wake().

Fixes: b2d6db21ec5e ("core: interr

core: interrupt: fix interrupt_set_{affinity|wake}() description

Fix inline description of itr_num argument for interrupt_set_affinity()
and interrupt_set_wake().

Fixes: b2d6db21ec5e ("core: interrupt: helper function for raise_pi, raise_sgi, set_affinity")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: interrupt: clarify inline comment in interrupt_create_handler()

Clarify inline comment in interrupt_create_handler() to explicit that
this function request add_configure_handler() to not confi

core: interrupt: clarify inline comment in interrupt_create_handler()

Clarify inline comment in interrupt_create_handler() to explicit that
this function request add_configure_handler() to not configure the
interrupt (since it's already configured from interrupt_dt_get_by_*()
API functions).

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: interrupt: clarify when dt_get_irq handler is needed

Add an inline comment telling struct itr_chip:dt_get_irq handler is
needed only when interrupt consumer manually get configuration
informat

core: interrupt: clarify when dt_get_irq handler is needed

Add an inline comment telling struct itr_chip:dt_get_irq handler is
needed only when interrupt consumer manually get configuration
information from the DT to later configure the interrupt. The
aim of this change is to clarify this handler is not needed for
interrupt provider registered with interrupt_register_provider()
and which consumer rely on interrupt_dt_get_by_*() to configure
their interrupts.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: interrupt: itr_chip may not require configure handler

The configure handler in struct itr_ops is not required for interrupt
providers which consumers only use the DT to get and configure their

core: interrupt: itr_chip may not require configure handler

The configure handler in struct itr_ops is not required for interrupt
providers which consumers only use the DT to get and configure their
interrupts (with interrupt_dt_get_by_*() and interrupt_create_handler()).
Therefore change itr_chip_is_valid() to not enforce its support
but add back that constraint for the interrupt main controller.

Add an itr_chip_dt_only_init() helper function for interrupt
controllers which consumers only use the DT to configure their
interrupt, that is such controllers do not need a configure handler.

itr_chip_is_valid() is not called outside interrupt.c where it is
used in itr_chip_init() and itr_chip_dt_only_init() so make it a local
function.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: interrupt: rename .add handler to .configure

Rename field add of struct itr_ops to configure for consistency
since that handler is used the configure the interrupt. Update
existing interrupt d

core: interrupt: rename .add handler to .configure

Rename field add of struct itr_ops to configure for consistency
since that handler is used the configure the interrupt. Update
existing interrupt drivers accordingly.

By the way fix inline comment spelling typo (s/contrainsts/constraints/).

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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scmi: Fix qemu_v8 configuration

OP-TEE SCMI server on qemu_v8 doesn't boot with latest SCP-firmware when
notification is enabled since the addition of clock notification in SCP.
This comes from that

scmi: Fix qemu_v8 configuration

OP-TEE SCMI server on qemu_v8 doesn't boot with latest SCP-firmware when
notification is enabled since the addition of clock notification in SCP.
This comes from that there is no notification channel supported yet for
OP-TEE SCMI server. Disable notification until notification support is
added.

Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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riscv: plat-virt: Let console devices be build time configurable

Currently RISC-V virtual platform enforces 16550 UART to be console
device. However, there are other console devices which can be cho

riscv: plat-virt: Let console devices be build time configurable

Currently RISC-V virtual platform enforces 16550 UART to be console
device. However, there are other console devices which can be chose by
developer. Thus, we allow the configurations for console device to be
overridden at build time while keeping the default value enabled.

Besides, fix CFG_SBI_CONSOLE to be CFG_RISCV_SBI_CONSOLE.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>

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core: arm: boot: mask native interrupts for virtualization

Native interrupts are prior to this patch unmasked while processing
initcalls. This is only permitted if the temporary stack isn't used.
Th

core: arm: boot: mask native interrupts for virtualization

Native interrupts are prior to this patch unmasked while processing
initcalls. This is only permitted if the temporary stack isn't used.
That's not true when CFG_NS_VIRTUALIZATION=y so fix this by only
unmasking when NS-virtualization isn't enabled.

Fixes: 259c34df294f ("core: arm: boot: enable native interrupts before initcalls")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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