| 8ea6cdca | 20-Nov-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: fix compatible name of PKA peripheral
Use st,stm32mp13-pka instead of st,stm32mp13-pka64 to be aligned with all other STMicroelectronics compatibles.
Signed-off-by: Thomas Bourgoin <tho
dts: stm32: fix compatible name of PKA peripheral
Use st,stm32mp13-pka instead of st,stm32mp13-pka64 to be aligned with all other STMicroelectronics compatibles.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| d1957bb3 | 24-Jan-2025 |
Jerome Forissier <jerome.forissier@linaro.org> |
ltc: ctr: fix counter increment when LTC_FAST is defined
In CTR mode the counter needs to be incremented upon completion of each block. Unfortunately, if there is no crypto acceleration (accel_ctr_e
ltc: ctr: fix counter increment when LTC_FAST is defined
In CTR mode the counter needs to be incremented upon completion of each block. Unfortunately, if there is no crypto acceleration (accel_ctr_encrypt == NULL) and if LTC_FAST is defined, this does not happen. Add the missing call to fix the issue.
Reported-by: Jork Loeser <jork.loeser@microsoft.com> Closes: https://lists.trustedfirmware.org/archives/list/op-tee@lists.trustedfirmware.org/thread/J4MMZPCM2MNKC2KWAXZUMTVEJP56U6OI/ Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bf27365d | 21-Jan-2025 |
Raymond Mao <raymond.mao@linaro.org> |
core: fix potential crash when setting transfer entry size
Fix a potential crash when the rounded up end-of-entry exceeds the boundary of the old end-of-transfer-list when setting the size of a tran
core: fix potential crash when setting transfer entry size
Fix a potential crash when the rounded up end-of-entry exceeds the boundary of the old end-of-transfer-list when setting the size of a transfer entry.
The crash happens when the specified entry is the last one in the transfer list and its rounded up end 'old_ev' exceeds the 'tl_old_ev' which is not rounded up, leading to a negative value with (tl_old_ev - old_ev).
Logically, 'tl_old_ev > old_ev' is the only case that indicates there are subsequent entries to be moved.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ded20780 | 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure
Change STM32 I2C driver to rely on the compatible DT property of the node to store whether the bus is expected assigned to secure or no
drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure
Change STM32 I2C driver to rely on the compatible DT property of the node to store whether the bus is expected assigned to secure or non-secure world. Using a non-secure I2C bus in OP-TEE on stm32mp1 platforms is something expected only on STM32MP15 variant for compatibility with platform already supported in upstream Linux/U-Boot components, as defined by st,stm32mp15-i2c-non-secure specific compatible string ID.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 234a510d | 09-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32: stm32mp15 DH board uses non-secure I2C4 bus
Update stm32mp15 based DH boards DTS file to explicitly use non-secure I2C4 bus as set in the ETZPC node st,decprot property.
Signed-off-by:
dts: stm32: stm32mp15 DH board uses non-secure I2C4 bus
Update stm32mp15 based DH boards DTS file to explicitly use non-secure I2C4 bus as set in the ETZPC node st,decprot property.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8261ca4b | 16-Jan-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: pta: stats: Explicit Public DDR stats are deprecated
Explicitly mention in Public DDR allocation stats info that these statistics are deprecated. With this change, the information displayed by
core: pta: stats: Explicit Public DDR stats are deprecated
Explicitly mention in Public DDR allocation stats info that these statistics are deprecated. With this change, the information displayed by `xtest --stats --alloc` better show why the printed values are all 0s for this pool.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6e2e1d60 | 16-Jan-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: pta: stats: Explicit when nexus heap stats is not applicable
Explicitly mention in the nexus heap statistics info when the nexus heap is disabled. With this change, the information displayed b
core: pta: stats: Explicit when nexus heap stats is not applicable
Explicitly mention in the nexus heap statistics info when the nexus heap is disabled. With this change, the information displayed by `xtest --stats --alloc` better show why the printed values are all 0s for this pool.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 76306f73 | 16-Jan-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: pta: stats: get RPMB secure storage allocation stats
Retrieve RPMB secure storage space allocation statistics from PTA stats STATS_CMD_ALLOC_STATS command.
STATS_NB_POOLS is intentionally not
core: pta: stats: get RPMB secure storage allocation stats
Retrieve RPMB secure storage space allocation statistics from PTA stats STATS_CMD_ALLOC_STATS command.
STATS_NB_POOLS is intentionally not incremented since it is expected to give the number of pools which IDs start from 1 (ALLOC_ID_HEAP), not from 0 (ALLOC_ID_ALL) that is a magic ID.
Ensure the stats are all 0 for when RPMB_FS is not supported or we failed to get the stats info. For this, let's zero initialize the shared buffer so that these default stats also apply on other stats that may not be reachable (deprecate public DDR pool, Nexus heap).
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| dc2cf47a | 16-Jan-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: rpmb: get RPMB storage space allocation stats
Add rpmb_mem_stats() to get the RPMB secure storage space allocation statistics.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> A
core: rpmb: get RPMB storage space allocation stats
Add rpmb_mem_stats() to get the RPMB secure storage space allocation statistics.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6c527967 | 21-Jan-2025 |
Raymond Mao <raymond.mao@linaro.org> |
core: expand the fdt transfer entry right before it is being used
Move the expanding of fdt transfer entry from boot_init_primary_early to boot_init_primary_late.
Logically expanding of the fdt ent
core: expand the fdt transfer entry right before it is being used
Move the expanding of fdt transfer entry from boot_init_primary_early to boot_init_primary_late.
Logically expanding of the fdt entry is not required until the system needs to update it with new nodes which happens in init primary late.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 37de1791 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: conf: default enable STGEN for STM32MP2 platforms
Default enable STGEN for STM32MP2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne C
plat-stm32mp2: conf: default enable STGEN for STM32MP2 platforms
Default enable STGEN for STM32MP2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 3d20b6a4 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add STGEN node in stm32mp251.dtsi
Add the STGEN node in the stm32mp251.dtsi SoC device tree file and default enable it as it is the source for the ARM generic timer of the ARM cortexA35.
dts: stm32: add STGEN node in stm32mp251.dtsi
Add the STGEN node in the stm32mp251.dtsi SoC device tree file and default enable it as it is the source for the ARM generic timer of the ARM cortexA35.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b0b019b8 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: counter: stm32_stgen: add STGEN driver
STGEN is the platform timer. It generates a time-count value that provides a consistent view of time for multiple processors and other blocks in a dev
drivers: counter: stm32_stgen: add STGEN driver
STGEN is the platform timer. It generates a time-count value that provides a consistent view of time for multiple processors and other blocks in a device. It is physically linked to the ARM generic timer.
Add the STGEN driver that is in charge of configuring the ARM generic timer source and send an SMC to the BL31 monitor to update the CP15 register. This driver is only compatible for 64bits platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1f2e0a3f | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
clk: stm32mp25: configure STGEN flexgen in .enable ops
STGEN flexgen is skipped during RCC probe to prevent misalignment between stgen_clk frequency and STGEN register. Configure the STGEN flexgen i
clk: stm32mp25: configure STGEN flexgen in .enable ops
STGEN flexgen is skipped during RCC probe to prevent misalignment between stgen_clk frequency and STGEN register. Configure the STGEN flexgen in the .enable ops so that it is configured after the STGEN itself is configured and started.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| dcdbcea2 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed
plat-stm32mp2: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 29ee70d6 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed
plat-stm32mp1: enable RTC framework if CFG_DRIVERS_RTC is set
If CFG_DRIVERS_RTC is enabled, force the compilation of the file core/drivers/rtc/rtc.c in order to share the generic functions.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f3fc82b9 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add RTC node in stm32mp251.dtsi
Add the RTC node in stm32mp251.dtsi and default enable it.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere
dts: stm32: add RTC node in stm32mp251.dtsi
Add the RTC node in stm32mp251.dtsi and default enable it.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4dcbaa6d | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne
plat-stm32mp2: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp2 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 5eb947b3 | 16-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp1 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne
plat-stm32mp1: conf: default enable the RTC driver
Default enable the RTC driver support on stm32mp1 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e419bc7f | 16-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rtc: introduce STM32 RTC driver
Driver interface allows to read date&time from RTC device, generate RTC timestamps and compute time delta between RTC date & time values.
The RTC is a
drivers: stm32_rtc: introduce STM32 RTC driver
Driver interface allows to read date&time from RTC device, generate RTC timestamps and compute time delta between RTC date & time values.
The RTC is a firewall-aware peripheral. It means that the RTC driver is in charge of configuring its own firewall restrictions and that the RTC has dedicated firewall configuration registers.
The RTC provide APIs with time structure compatible with linux kernel driver.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 0074d941 | 09-Jan-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: atmel_rtc: fix and update RTC ranges
Use RTC_TIME() helper macro to initialize Atmel RTC ranges and fix its month and weekday values. Also add the milliseconds field even though it's not us
drivers: atmel_rtc: fix and update RTC ranges
Use RTC_TIME() helper macro to initialize Atmel RTC ranges and fix its month and weekday values. Also add the milliseconds field even though it's not used.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 73aafcc9 | 08-Jan-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: rtc: check data consistency in rtc_set_time()
Ensure that arguments passed to rtc_set_time() are coherent to defined RTC range and Gregorian calendar values.
Signed-off-by: Gatien Chevalli
drivers: rtc: check data consistency in rtc_set_time()
Ensure that arguments passed to rtc_set_time() are coherent to defined RTC range and Gregorian calendar values.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a83e616e | 08-Jan-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: rtc: add RTC_TIME() helper macro
Add RTC_TIME() helper macro that allows to initialize all fields of a struct optee_rtc_time.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.co
drivers: rtc: add RTC_TIME() helper macro
Add RTC_TIME() helper macro that allows to initialize all fields of a struct optee_rtc_time.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 26899ca2 | 05-Feb-2024 |
Clément Le Goffic <clement.legoffic@foss.st.com> |
drivers: rtc: add RTC functions and millisecond field
Add a millisecond field in the optee_rtc_time structure.
Add different APIs to manipulate optee_rtc_time structures: rtc_is_a_leap_year(): Dete
drivers: rtc: add RTC functions and millisecond field
Add a millisecond field in the optee_rtc_time structure.
Add different APIs to manipulate optee_rtc_time structures: rtc_is_a_leap_year(): Detects if the given year is a leap year rtc_get_month_days(): Returns the number of day in the given month rtc_timecmp(): Compare two time captures rtc_diff_calendar_ms(): Returns the difference in milliseconds between two time captures rtc_diff_calendar_tick(): Returns the difference in number of ticks between two time captures
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bd64a3f4 | 06-Sep-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
dt-bindings: stm32: fix CLKSRC for RTC in stm32mp13 clock bindings
Bad copy/paste, use MUX ID to configure the clock source of RTC and not the clock ID.
Signed-off-by: Gabriel Fernandez <gabriel.fe
dt-bindings: stm32: fix CLKSRC for RTC in stm32mp13 clock bindings
Bad copy/paste, use MUX ID to configure the clock source of RTC and not the clock ID.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Fixes: 19a4632e0f17 ("dt-bindings: stm32: add stm32mp13 clock and reset bindings")
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