| e59d8fd7 | 21-Jun-2018 |
Amit Singh Tomar <amittomer25@gmail.com> |
plat-sunxi: Add Allwinner A64 support
This commit adds support for pine64[1] board based on Allwinner's A64 SoC.
1. Build command
# make PLATFORM=sunxi-sun50i_a64
2. Pass optee_example_hello_
plat-sunxi: Add Allwinner A64 support
This commit adds support for pine64[1] board based on Allwinner's A64 SoC.
1. Build command
# make PLATFORM=sunxi-sun50i_a64
2. Pass optee_example_hello_world and xtest.
[1]: https://www.pine64.org/
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
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| 066be2bc | 11-Aug-2018 |
Peng Fan <peng.fan@nxp.com> |
sm: pm_a32: typo fix
typo fix: do->pm
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 3798db34 | 08-Aug-2018 |
Silvano di Ninno <silvano.dininno@nxp.com> |
core: tee: crypt_utl: remove one crypto_init
Crypto_init is called twice in tee_cryp_init.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@
core: tee: crypt_utl: remove one crypto_init
Crypto_init is called twice in tee_cryp_init.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| cfa34ec6 | 03-Aug-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
abort.c: manipulate with VFP state only if thread is active
abort_handler() can be called both within and without thread context. In the latter case it stops on assert(thread_get_exceptions() & THRE
abort.c: manipulate with VFP state only if thread is active
abort_handler() can be called both within and without thread context. In the latter case it stops on assert(thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR) in thread_kernel_save_vfp() and no information about abort is displayed.
This assert fires during some initialization stages and during fast SMCs, because they are handled with foreign interrupts disabled.
To fix this, we should call thread_kernel_{save,restore}_vfp() only when foreign interrupts are enabled.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| 8d028a17 | 03-Aug-2018 |
Silvano di Ninno <silvano.dininno@nxp.com> |
core: arm: ree_fs: fix free hash_ctx
Properly free hash_ctx by calling crypto_hash_free_ctx instead of the generic free function.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-
core: arm: ree_fs: fix free hash_ctx
Properly free hash_ctx by calling crypto_hash_free_ctx instead of the generic free function.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| a53b813e | 25-Jul-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: cleanup configuration
Cleanup configuration to make it easy to add new platforms. Make most configurations be common to CFG_MX6/7. Normally only need to define CFG_DDR_SIZE and CFG_NS_ENTRY_ADD
imx: cleanup configuration
Cleanup configuration to make it easy to add new platforms. Make most configurations be common to CFG_MX6/7. Normally only need to define CFG_DDR_SIZE and CFG_NS_ENTRY_ADDR to support new platforms.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 7c176640 | 03-Aug-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
arm32: add assembly directive: .arch_extension sec
When compiling with -mcpu=cortex-a9, GCC 8.1 fails on the smc instruction:
$ make -s PLATFORM=stm CROSS_COMPILE32=<GCC8.1 path>/arm-linux-gnueabi
arm32: add assembly directive: .arch_extension sec
When compiling with -mcpu=cortex-a9, GCC 8.1 fails on the smc instruction:
$ make -s PLATFORM=stm CROSS_COMPILE32=<GCC8.1 path>/arm-linux-gnueabihf- core/arch/arm/kernel/thread_a32.S: Assembler messages: core/arch/arm/kernel/thread_a32.S:44: Error: selected processor does not support `smc #0' in ARM mode [snip] mk/compile.mk:146: recipe for target 'out/arm-plat-stm/core/arch/arm/kernel/thread_a32.o' failed make: *** [out/arm-plat-stm/core/arch/arm/kernel/thread_a32.o] Error 1
Use the '.arch_extension sec' directive to allow the assembler to emit the instruction.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
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| 74fc1bc7 | 03-Aug-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
core_self_tests.c: fix p1=realloc(p1) issue
This is invalid use of realloc, because it can cause memory leak.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jerome Forissier
core_self_tests.c: fix p1=realloc(p1) issue
This is invalid use of realloc, because it can cause memory leak.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| bed5dcff | 25-Jul-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: wdog: correct wdog_path
The prefix `0` is removed in Linux Kernel upstream code, so let's drop it to let wdog work.
Linux Kernel commit 67b8d5c7081221efa252("Linux 4.17-rc5")
Signed-off-by: P
imx: wdog: correct wdog_path
The prefix `0` is removed in Linux Kernel upstream code, so let's drop it to let wdog work.
Linux Kernel commit 67b8d5c7081221efa252("Linux 4.17-rc5")
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 50432453 | 27-Jun-2018 |
Jordan Rhee <jordanrh@microsoft.com> |
plat-imx: add i.MX6 Hummingboard Edge platform flavors
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
| 53afeff5 | 27-Jun-2018 |
Jordan Rhee <jordanrh@microsoft.com> |
plat-imx: make platform flavor list diff friendly
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
| bad91efa | 17-Jul-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-hikey: embed ta/avb as early TA
In order to support AVB in U-boot embed the AVB ta as an early TA.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <je
plat-hikey: embed ta/avb as early TA
In order to support AVB in U-boot embed the AVB ta as an early TA.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3638ea32 | 17-Jul-2018 |
Jens Wiklander <jens.wiklander@linaro.org> |
Add CFG_IN_TREE_EARLY_TAS
Adds CFG_IN_TREE_EARLY_TAS which is used to embed in-tree TAs as early TAs in the OP-TEE binary.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by:
Add CFG_IN_TREE_EARLY_TAS
Adds CFG_IN_TREE_EARLY_TAS which is used to embed in-tree TAs as early TAs in the OP-TEE binary.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b048d329 | 08-Jun-2018 |
Sourabh <sourabhdas143@gmail.com> |
user_ta: should go for other TA stores on any load error
There seems to be an issue that if RPMB_FS is enabled in OPTEE and TA is present in REE (normal file system), if priority for secure storage
user_ta: should go for other TA stores on any load error
There seems to be an issue that if RPMB_FS is enabled in OPTEE and TA is present in REE (normal file system), if priority for secure storage TA is higher and RPMB initialization fails, the error is returned and the OPTEE doesn't goes to find the TA from REE TA store.
The issue is fixed by adding a 'continue' statement after printing the respective error.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Sourabh Das <sourabhdas143@gmail.com>
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| 44061046 | 10-Jul-2018 |
Peng Fan <peng.fan@nxp.com> |
core: unwind: correct function args for print_stack_arm32/64
When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure: " core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32': core/
core: unwind: correct function args for print_stack_arm32/64
When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure: " core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32': core/arch/arm/kernel/abort.c:113:2: error: too many arguments to function 'print_stack_arm32' print_stack_arm32(TRACE_ERROR, &state, exidx, exidx_sz, kernel_stack, ^~~~~~~~~~~~~~~~~ "
Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f6d17e33 | 05-Jul-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: define syscall_t as void (*)(void)
syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to represent a pointer to any system call, in the syscall table for instance. As such,
core: define syscall_t as void (*)(void)
syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to represent a pointer to any system call, in the syscall table for instance. As such, the exact type behind syscall_t cannot reflect all the syscalls since they have different prototypes. The current declaration with a TEE_Result return type was probably chosen because it was a common characteristic of all syscalls to return a TEE_Result.
However, this type causes compilation warnings with GCC 8.1:
core/arch/arm/tee/arch_svc.c:43:36: warning: cast between incompatible function types from ‘void (*)(long unsigned int)’ to ‘TEE_Result (*)(void)’ {aka ‘unsigned int (*)(void)’} [-Wcast-function-type] #define SYSCALL_ENTRY(_fn) { .fn = (syscall_t)_fn } ^ core/arch/arm/tee/arch_svc.c:50:2: note: in expansion of macro ‘SYSCALL_ENTRY’ SYSCALL_ENTRY(syscall_sys_return), ^~~~~~~~~~~~~
The solution is to use 'void (*)(void)' instead, as explained in the GCC documentation:
-Wcast-function-type
Warn when a function pointer is cast to an incompatible function pointer. [...] The function type void (*) (void) is special and matches everything, which can be used to suppress this warning. [...]
Link: [1] https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6c9c7a3f | 02-Jul-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
drivers: hi16xx_rng: replace mutex with spinlock
The mutex in hw_get_random_byte() protects a very short section of code. A spinlock is more lightweight and therefore better suited to the task.
Sig
drivers: hi16xx_rng: replace mutex with spinlock
The mutex in hw_get_random_byte() protects a very short section of code. A spinlock is more lightweight and therefore better suited to the task.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 93536408 | 30-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
thread: move stacks to separate sections
With this change it is possible to move tmp and abt stacks to kernel memory area, while leaving thread stacks in tee memory.
Signed-off-by: Volodymyr Babchu
thread: move stacks to separate sections
With this change it is possible to move tmp and abt stacks to kernel memory area, while leaving thread stacks in tee memory.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6dd18fa4 | 25-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
link_dummy.ld: provide __data_start symbol
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 19f2d3a3 | 25-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
linker.h: declare __data_start as non-const
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> |
| 696abe98 | 25-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
asid: move asid allocator from tee_mmu.c to core_mmu.c
ASIDs will be allocated for individual virtrual guests, so allocator should reside in more generic place.
Also, comment for MMU_NUM_ASIDS was
asid: move asid allocator from tee_mmu.c to core_mmu.c
ASIDs will be allocated for individual virtrual guests, so allocator should reside in more generic place.
Also, comment for MMU_NUM_ASIDS was updated.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6de30696 | 19-Jan-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
mmu: align va of memory regions to pa modulo PGDIR_SIZE
If pa % PGDIR_SIZE == va % PGDIR_SIZE, then we can effectively map large smallpage-aligned regions. Most of the region can be mapped with supe
mmu: align va of memory regions to pa modulo PGDIR_SIZE
If pa % PGDIR_SIZE == va % PGDIR_SIZE, then we can effectively map large smallpage-aligned regions. Most of the region can be mapped with super blocks and only ends will be mapped using small pages.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7558c164 | 31-May-2018 |
Volodymyr Babchuk <vlad.babchuk@gmail.com> |
generic_ram_layout: align TA_RAM to SMALL_PAGE_SIZE
This enables more optimal memory usage, as there will be no unused holes in memory mappings.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail
generic_ram_layout: align TA_RAM to SMALL_PAGE_SIZE
This enables more optimal memory usage, as there will be no unused holes in memory mappings.
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8267e19b | 20-Jun-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm: sm: initialize PMCR.DP to 1 and save/restore PMCR
Introduce CFG_SM_NO_CYCLE_COUNTING to intitialize PMCR.DP to 1 and save/restore PMCR on world switch. Similar to what is done in ARM TF c
core: arm: sm: initialize PMCR.DP to 1 and save/restore PMCR
Introduce CFG_SM_NO_CYCLE_COUNTING to intitialize PMCR.DP to 1 and save/restore PMCR on world switch. Similar to what is done in ARM TF commit 3e61b2b54336 ("Init and save / restore of PMCR_EL0 / PMCR") [1].
The purpose of this is to (hopefully) make attacks such as CLKSCREW [2] harder to mount, although it is likely that timing information could be obtained via other means.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Link: [1] https://github.com/ARM-software/arm-trusted-firmware/commit/3e61b2b54336 Link: [2] https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-tang.pdf Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0160fec3 | 20-Jun-2018 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: arm: sm: rename struct sm_mode_regs to sm_unbanked_regs
struct sm_mode_regs will soon be used to store one non-banked register other then the mode registers (PMCR). Rename it to sm_unbanked_re
core: arm: sm: rename struct sm_mode_regs to sm_unbanked_regs
struct sm_mode_regs will soon be used to store one non-banked register other then the mode registers (PMCR). Rename it to sm_unbanked_regs.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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