| af4c7f4b | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
zynq7k: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-o
zynq7k: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cb40b9d8 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
ti: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-b
ti: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8bf2b291 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
synquancer: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Sign
synquancer: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b34bcab2 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
sunxi: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-of
sunxi: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3f66fc74 | 14-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32mp1: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed
stm32mp1: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 79f948c6 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-
stm: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5dbc88e3 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
sam: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-
sam: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 22e7ddf8 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
rockchip: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed
rockchip: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 35bf1f28 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
marvell: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-
marvell: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 242b87c8 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
ls: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-b
ls: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c9df313b | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
imx: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-
imx: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1c3ba0d4 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
hikey: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-of
hikey: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former are about to be deprecated in favor to the later.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 918bb3a5 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former function are about to be deprecated in favor to the later.
T
core: upgrade from write32() to io_write32() and friends
Replace use of readX() and writeX() with io_readX() and io_writeX(). The former function are about to be deprecated in favor to the later.
This change upgrades core generic code and drivers. At some place, io_clrbitsX(), io_setbitsX() and io_clrsetbitsX() replace the writeX(readX() ...) operations when obvious.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b7d2b849 | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
libutil: io_clrsetbitsX() firends for 8bit and 16bit accesses
Introduce io_setbits8(), io_clrbits8(), io_clrsetbits8() and io_setbits16(), io_clrbits16(), io_clrsetbits16() for bit clear/set util ov
libutil: io_clrsetbitsX() firends for 8bit and 16bit accesses
Introduce io_setbits8(), io_clrbits8(), io_clrsetbits8() and io_setbits16(), io_clrbits16(), io_clrsetbits16() for bit clear/set util over 8bit and 16bit memory cells on the model of existing io_clrsetbits32() and friends.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2d0c93df | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
libutil: replace write*() util functions with io_write*()
write8(), write16() and write32() expect the target written address as 1st argument and the written value as 2nd argument. This is confusing
libutil: replace write*() util functions with io_write*()
write8(), write16() and write32() expect the target written address as 1st argument and the written value as 2nd argument. This is confusing as put_be32(), put_be64(), io_mask32(), and the io_*bits32() functions expect the opposite: 1st argument is the address and 2nd argument is the written value(s).
This change introduces functions io_write8(), io_write16() and io_write32() with io_mask32() like APIs. This change introduces io_read*() for consistency: all prefixed with io_.
This change preserve the write8/write16/write32 functions for compatibility. These will be deprecated in the next OP-TEE release to lower confusion around these.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 644ac91c | 14-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: reset driver for platform peripheral interfaces
Reset API functions: - stm32_reset_assert(id) asserts reset signal on target resource. - stm32_reset_deassert(id) releases reset signal on t
stm32mp1: reset driver for platform peripheral interfaces
Reset API functions: - stm32_reset_assert(id) asserts reset signal on target resource. - stm32_reset_deassert(id) releases reset signal on target resource.
Driver API relies on resource IDs defined in the platform DT bindings header file dt-bindings/reset/stm32mp1_reset.h.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 53c1131c | 12-Feb-2019 |
Jerome Forissier <jerome.forissier@linaro.org> |
core_mmu: phys_to_virt_io(): warn if PA has both S and NS mappings
phys_to_virt_io() converts a physical address previously registered with type MEM_AREA_IO_SEC or MEM_AREA_IO_NSEC to a virtual addr
core_mmu: phys_to_virt_io(): warn if PA has both S and NS mappings
phys_to_virt_io() converts a physical address previously registered with type MEM_AREA_IO_SEC or MEM_AREA_IO_NSEC to a virtual address. If both secure and non-secure mappings exist for the PA, the secure mapping is used. This is usually fine, but some platforms may not allow accessing a non-secure PA with a secure mapping.
Therefore, either overlaps should be avoided when registering memory, or phys_to_virt(pa, type) should be used instead of phys_to_virt_io().
This commit adds a warning message in case phys_to_virt_io() finds two mappings.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a5e82dc7 | 11-Feb-2019 |
Jerome Forissier <jerome.forissier@linaro.org> |
core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularity
Device memory registered via register_phys_mem() is currently rounded up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LP
core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularity
Device memory registered via register_phys_mem() is currently rounded up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LPAE). This is not needed and possibly incorrect for SoCs that define I/O memory maps with regions aligned on a small page (4 KiB), because using a larger granularity could result in overlaps between secure and non-secure mappings. This could cause issues depending on the type of memory firewall used by the SoC and its configuration. In any case, memory types other than MEM_AREA_IO_{SEC,NSEC} *can* be mapped with small page granularity using register_phys_mem(), so the situation is a bit inconsistent.
This commit removes the rounding by default and provides a new macro: register_phys_mem_pgdir(). Platforms that still need to use PGDIR_SIZE granularity (typically because it consumes less page table space) need to replace register_phys_mem() by register_phys_mem_pgdir().
In order to avoid any functional change in platform code, all calls to register_phys_mem() with device memory are replaced with register_phys_mem_pgdir(). In addition, CORE_MMU_DEVICE_SIZE is removed and replaced with CORE_MMU_PGDIR_SIZE since there is no unique mapping size for device memory anymore.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Zeng Tao <prime.zeng@hisilicon.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4d22155c | 12-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: change io_{clr|set|clrset}bits32() address argument type
Change API for io_clrbits32(), io_setbits32() and io_clrsetbits32() to have a vaddr_t type address argument, rather than uintptr_t as p
core: change io_{clr|set|clrset}bits32() address argument type
Change API for io_clrbits32(), io_setbits32() and io_clrsetbits32() to have a vaddr_t type address argument, rather than uintptr_t as previously.
This change updates accordingly the callers of these functions that cover only stm32mp1 related resources.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fff9beb4 | 11-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: embed GPIO/pin control driver
Platform provides resources expected by the GPIO driver: those deal with the relationship between platform GPIO banks identifiers and the bank resources (base
stm32mp1: embed GPIO/pin control driver
Platform provides resources expected by the GPIO driver: those deal with the relationship between platform GPIO banks identifiers and the bank resources (base address, clock).
Platform maps all non-secure GPIOs as secure world may use non-secure interfaces, i.e a non-secure UART console.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4b5e93ed | 11-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_gpio: driver for GPIO and pin control
Driver is embedded upon CFG_STM32_GPIO=y.
STM32 GPIO driver API main functions: - stm32_gpio_set_output_level() sets target output GPIO level, - stm32_gp
stm32_gpio: driver for GPIO and pin control
Driver is embedded upon CFG_STM32_GPIO=y.
STM32 GPIO driver API main functions: - stm32_gpio_set_output_level() sets target output GPIO level, - stm32_gpio_get_input_level() returns target input GPIO level, - stm32_pinctrl_load_active_cfg() loads interface pin mux active state, - stm32_pinctrl_load_standby_cfg() loads interface pin mux standby state, - stm32_pinctrl_fdt_get_pinctrl() save pin configuration from DT content, - stm32_gpio_set_secure_cfg() sets secure state for target GPIO/pin mux.
GPIO driver does not register to PM framework. It is the GPIO/pin owner responsibility to call stm32_pinctrl_load_{active|standby}_cfg() on peripherals power state transitions.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1095cc2e | 08-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: platform enables STM32 ETZPC driver
Platform defines the macro used for DECPROT IDs in the STM32 ETZPC driver interface.
When platform embeds a secure DTB, it is used to initialize the ET
stm32mp1: platform enables STM32 ETZPC driver
Platform defines the macro used for DECPROT IDs in the STM32 ETZPC driver interface.
When platform embeds a secure DTB, it is used to initialize the ETZPC driver. When not using DT, platform shall call ETZPC initialization API function.
Platform initialization loads a static configuration for the platform resources statically assigned to either secure or non-secure worlds.
This change updates the stm32mp157c SoC description DT source file to explicitly enable ETZPC support in the secure world.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e4e0a6cc | 08-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32_etzpc: STM32 Extended TrustZone Protection Controller
ETZPC is a hardware instance that control access permissions to some stm32mp SoC peripheral interfaces and internal memories.
This change
stm32_etzpc: STM32 Extended TrustZone Protection Controller
ETZPC is a hardware instance that control access permissions to some stm32mp SoC peripheral interfaces and internal memories.
This change introduce the stm32_etzpc driver. It is embedded upon build directive CFG_STM32_ETZPC=y.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Mathieu BELOU <mathieu.belou@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| b1de92cf | 07-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: get root clocks frequency from DTB
Get the frequency of the root oscillator clocks from a secure device tree, that is the embedded DTB.
Secure status state in the DTB defines whether RCC
stm32mp1: get root clocks frequency from DTB
Get the frequency of the root oscillator clocks from a secure device tree, that is the embedded DTB.
Secure status state in the DTB defines whether RCC subsystem shall be secure or not. If not, non-secure world can access all clock interfaces hence secure world cannot guaranty its configuration. Yet, the DT allows such a debug/test configuration.
Most clock tree configuration is under the responsibility of an earlier boot stage. Configuration of parenthood and related divisors as well as configuration of intermediate PLLs found in the DT are ignored.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| dcdc207e | 06-Feb-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: platform clocks driver
Introduce the stm32mp1 clock driver. This change defines the structures used to describe the clock tree and the driver main API functions: - stm32_clock_enable() - s
stm32mp1: platform clocks driver
Introduce the stm32mp1 clock driver. This change defines the structures used to describe the clock tree and the driver main API functions: - stm32_clock_enable() - stm32_clock_disable() - stm32_clock_is_enabled() - stm32_clock_get_rate()
The API is exported from stm32_util.h. Drivers are expected to include stm32_util.h to access the platform clock support.
Note stm32_clock_get_rate() needs the root oscillator frequency values Oscillators frequency depend on the board a.k.a the platform. This information is currently missing in the driver. Introducing CFG_xxx build directives it not the preferred way which is the DTB. This change does not read root oscillators frequency value from the DTB.
Map RCC interface registers from RCC_BASE. RCC is the interface for SoC clock configuration and control.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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