stm32_uart: pin control with stm32_gpio

stm32_uart instance get related pins configuration
from device tree content.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Foris

stm32_uart: pin control with stm32_gpio

stm32_uart instance get related pins configuration
from device tree content.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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stm32_uart: register secure/non-secure device

stm32_uart instance registers as secure/non-secure
resources according to device tree content.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com

stm32_uart: register secure/non-secure device

stm32_uart instance registers as secure/non-secure
resources according to device tree content.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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stm32mp1: default embed I2C driver

Default enable CFG_STM32_I2C. CFG_STM32_I2C=y mandates embedded device
tree support.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jo

stm32mp1: default embed I2C driver

Default enable CFG_STM32_I2C. CFG_STM32_I2C=y mandates embedded device
tree support.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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stm32mp1: fix missing I2C2/I2C6 non-secure mapping

I2C4 and I2C6 may be assigned to either secure or non-secure worlds
during core initialization. Even when assigned to the non-secure
world core may

stm32mp1: fix missing I2C2/I2C6 non-secure mapping

I2C4 and I2C6 may be assigned to either secure or non-secure worlds
during core initialization. Even when assigned to the non-secure
world core may access the bus during sequences where non-secure world
cannot execute as during atomic low power transition sequences.

This change corrects the missing mapping of I2C4 and I2C6 IO memory
with non-secure access attributes.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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stm32_i2c: expose standard speed in driver API

Move definition of I2C standard speeds configuration means from driver
source file to its header file. This change allows bus owners to use
appropriate

stm32_i2c: expose standard speed in driver API

Move definition of I2C standard speeds configuration means from driver
source file to its header file. This change allows bus owners to use
appropriate value for bus configuration.

Exposes struct i2c_speed_e and enum i2c_speed_e

This change fixes the driver API as enum i2c_speed_e is expected by
the API.

Fixes: b844655c9519 ("stm32_i2c: driver for STM32 I2C bus")

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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stm32_gpio: fix pinctrl sanity test against platform

When parsing device tree nodes, skip non matching GPIO banks rather
than panicking straight. Function ckeck_gpio_bank() already panics
if not fin

stm32_gpio: fix pinctrl sanity test against platform

When parsing device tree nodes, skip non matching GPIO banks rather
than panicking straight. Function ckeck_gpio_bank() already panics
if not finding a matching GPIO bank node.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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stm32_i2c: correct timeout detection on transfer stop event

Fix timeout detection in i2c_wait_stop().

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.

stm32_i2c: correct timeout detection on transfer stop event

Fix timeout detection in i2c_wait_stop().

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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stm32_i2c: fix bug in device tree support

Correct missing local variable in stm32_i2c_get_setup_from_fdt().

Fixes: c75303f777b7 ("stm32_i2c: handle pinctrl")

Signed-off-by: Etienne Carriere <etien

stm32_i2c: fix bug in device tree support

Correct missing local variable in stm32_i2c_get_setup_from_fdt().

Fixes: c75303f777b7 ("stm32_i2c: handle pinctrl")

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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stm32_i2c: minor clean in driver makefile

Sort stm32_* drivers list in alphabetical ordering.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@lin

stm32_i2c: minor clean in driver makefile

Sort stm32_* drivers list in alphabetical ordering.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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core: remove CFG_DYN_SHM_CAP

Removes the now obsolete CFG_DYN_SHM_CAP. CFG_CORE_DYN_SHM should be
used instead to enable/disable support for dynamic shared memory.

Reviewed-by: Etienne Carriere <et

core: remove CFG_DYN_SHM_CAP

Removes the now obsolete CFG_DYN_SHM_CAP. CFG_CORE_DYN_SHM should be
used instead to enable/disable support for dynamic shared memory.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: introduce CFG_CORE_RESERVED_SHM

Introduces CFG_CORE_RESERVED_SHM which if set to y enables reserved shared
memory, else disables support for reserved shared memory.

Reviewed-by: Etienne Carri

core: introduce CFG_CORE_RESERVED_SHM

Introduces CFG_CORE_RESERVED_SHM which if set to y enables reserved shared
memory, else disables support for reserved shared memory.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: introduce CFG_CORE_DYN_SHM

Introduces CFG_CORE_DYN_SHM which if set to y enables dynamic shared
memory, else disables support for dynamic shared memory. In contrast
with CFG_DYN_SHM_CAP it act

core: introduce CFG_CORE_DYN_SHM

Introduces CFG_CORE_DYN_SHM which if set to y enables dynamic shared
memory, else disables support for dynamic shared memory. In contrast
with CFG_DYN_SHM_CAP it actually removes the support instead of just
omit reporting it.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: default tee_otp_get_die_id() based on HUK

Changes the default weak tee_otp_get_die_id() implementation to use
huk_subkey_derive() to derive a unique die ID based on the hardware
unique key.

N

core: default tee_otp_get_die_id() based on HUK

Changes the default weak tee_otp_get_die_id() implementation to use
huk_subkey_derive() to derive a unique die ID based on the hardware
unique key.

Note that the SSK derivation retains backwards compatibility if
CFG_CORE_HUK_SUBKEY_COMPAT is set to 'y' and tee_otp_get_die_id() wasn't
replaced with a platform specific implementation.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: derive RPMB key using huk_subkey_derive()

tee_rpmb_key_gen() uses huk_subkey_derive() to derive the RPMB instead
of MAC:ing etc directly.

Note that this is only backwards compatible if
CFG_CO

core: derive RPMB key using huk_subkey_derive()

tee_rpmb_key_gen() uses huk_subkey_derive() to derive the RPMB instead
of MAC:ing etc directly.

Note that this is only backwards compatible if
CFG_CORE_HUK_SUBKEY_COMPAT=y.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: derive SSK using huk_subkey_derive()

tee_fs_init_key_manager() uses huk_subkey_derive() to derive the SSK
instead of MAC:ing etc directly.

Note that this is only backwards compatible if
CFG_C

core: derive SSK using huk_subkey_derive()

tee_fs_init_key_manager() uses huk_subkey_derive() to derive the SSK
instead of MAC:ing etc directly.

Note that this is only backwards compatible if
CFG_CORE_HUK_SUBKEY_COMPAT=y.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: introduce CFG_CORE_HUK_SUBKEY_COMPAT

Adds CFG_CORE_HUK_SUBKEY_COMPAT which if set to 'y' makes
huk_subkey_derive() produce RPMB and SSK keys identical to the legacy
code.

Reviewed-by: Joakim

core: introduce CFG_CORE_HUK_SUBKEY_COMPAT

Adds CFG_CORE_HUK_SUBKEY_COMPAT which if set to 'y' makes
huk_subkey_derive() produce RPMB and SSK keys identical to the legacy
code.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: introduce huk_subkey_derive()

The hardware unique key should preferably only be used to generate other
keys. This is encouraged with huk_subkey_derive() which is used to
derive a subkey from

core: introduce huk_subkey_derive()

The hardware unique key should preferably only be used to generate other
keys. This is encouraged with huk_subkey_derive() which is used to
derive a subkey from the hardware unique key.

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: mutex: remove owner_id

mutex::owner_id was used for debugging purposes only.
Since commit 8aff6c039ee5 ("core: remove thread_{add,rem}_mutex()"), it is
never set to a valid thread ID anym

core: arm: mutex: remove owner_id

mutex::owner_id was used for debugging purposes only.
Since commit 8aff6c039ee5 ("core: remove thread_{add,rem}_mutex()"), it is
never set to a valid thread ID anymore. Let's just remove the field.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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hikey: Add support for UART2

UART2 is console interface provided on the 40-pin Low Speed
Connector in addition to the default UART3.

Reviewed-by: Victor Chong <victor.chong@linaro.org>
Signed-off-b

hikey: Add support for UART2

UART2 is console interface provided on the 40-pin Low Speed
Connector in addition to the default UART3.

Reviewed-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

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core: user_ta: load_elf(): return meaningful error code

If any error is encountered when the TEE core attempts to load a TA from
TA storage, the next storage is tried and so on until the TA is
succe

core: user_ta: load_elf(): return meaningful error code

If any error is encountered when the TEE core attempts to load a TA from
TA storage, the next storage is tried and so on until the TA is
successfully loaded or there is no more storage to try. In this case, a
generic error code (TEE_ERROR_ITEM_NOT_FOUND) is returned to the caller
of load_elf() and ultimately to the client. This is not super useful,
especially when debug traces are disabled, because the user has no way
to differentiate a true "not found" situation (which might be a
configuration or deployement issue) from an issue with the TA file
itself or an out-of-memory condition etc.

This commit changes the return code of load_elf() to better reflect the
errors. When load_elf_from_store() returns TEE_ERROR_ITEM_NOT_FOUND or
TEE_ERROR_STORAGE_NOT_AVAILABLE, the next storage is tried.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: bcm_gpio: add IPROC GPIO driver

low level driver for Broadcom IPROC GPIO controller.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Acked-by: Etienne Carriere <etienne.car

drivers: bcm_gpio: add IPROC GPIO driver

low level driver for Broadcom IPROC GPIO controller.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Victor Chong <victor.chong@linaro.org>

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plat-bcm: update platform configurations

-add more device ranges and definitions.
-fix dynamic shm api.
-cleanup plaform def.
-enable PL022 SPI, bcm HWRNG and bcm SOTP driver.

Acked-by: Etienne Car

plat-bcm: update platform configurations

-add more device ranges and definitions.
-fix dynamic shm api.
-cleanup plaform def.
-enable PL022 SPI, bcm HWRNG and bcm SOTP driver.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>

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core: arm: imx: handle errata 845369

Under very rare timing circumstances, a data corruption might occur on
a dirty cache line that is evicted from the L1 Data Cache due to another
cache line being

core: arm: imx: handle errata 845369

Under very rare timing circumstances, a data corruption might occur on
a dirty cache line that is evicted from the L1 Data Cache due to another
cache line being entirely written.
Configurations affected:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors

This erratum can be worked round by setting bit[22] of the undocumented
Diagnostic Control Register to 1. This register is encoded as
CP15 c15 0 c0 1. The bit can be written in Secure state only, with the
following.
Read/Modify/Write code sequence:
MRC p15,0,rt,c15,c0,1
ORR rt,rt,#0x00400000
MCR p15,0,rt,c15,c0,1

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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core: arm: imx: a9: tune ACTLR

Tune ACTLR. To SLL, the value is 0xE at runtime.
To others, the value should be 0x4F at runtime.
Bit3 will be enabled when enable L2.

The SMP bit for i.MX6SLL needs t

core: arm: imx: a9: tune ACTLR

Tune ACTLR. To SLL, the value is 0xE at runtime.
To others, the value should be 0x4F at runtime.
Bit3 will be enabled when enable L2.

The SMP bit for i.MX6SLL needs to be make ldrex/strex
instruction work properly.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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core: arm: imx: a7: set L1 Data prefetch

The default value of L1PCTL field in ACTLR is 0x3, which is
"3 outstanding pre-fetches permitted", the value should not
be override with 0 to decrease the pe

core: arm: imx: a7: set L1 Data prefetch

The default value of L1PCTL field in ACTLR is 0x3, which is
"3 outstanding pre-fetches permitted", the value should not
be override with 0 to decrease the performance.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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