core: enable ftrace for TAs built using shared libraries

To enable ftrace for TAs built with shared libraries, we need to dump
the TA state (include regions dump along with mapping to <uuid>.elf) in

core: enable ftrace for TAs built using shared libraries

To enable ftrace for TAs built with shared libraries, we need to dump
the TA state (include regions dump along with mapping to <uuid>.elf) in
corresponding ftrace buffer for symbolize.py script to map symbols to
particular shared libraries.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)

show more ...

core: prepare support for TA function tracing

To support TA function tracing OP-TEE core role being:
- To initialize and register ftrace buffer per TA session.
- To dump TA ftrace buffer to normal w

core: prepare support for TA function tracing

To support TA function tracing OP-TEE core role being:
- To initialize and register ftrace buffer per TA session.
- To dump TA ftrace buffer to normal world via RPC call in case TA
session closes or in case of TA abort.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)

show more ...

core: fix AArch64 user TA stack dump

Restores user TA stack base and size __print_stack_unwind_arm64() to be
able to dump the user TA stack.

Fixes: c0bc8d0e7d72 ("core: print TA stack dump from thr

core: fix AArch64 user TA stack dump

Restores user TA stack base and size __print_stack_unwind_arm64() to be
able to dump the user TA stack.

Fixes: c0bc8d0e7d72 ("core: print TA stack dump from thread context")
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: sm: explicit return value for sm_from_nsec()

Define macros to explicit return value for sm_from_nsec() used
in monitor assembly trampoline to invoke either secure or non-secure
world.

Signed-

core: sm: explicit return value for sm_from_nsec()

Define macros to explicit return value for sm_from_nsec() used
in monitor assembly trampoline to invoke either secure or non-secure
world.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (qemu)

show more ...

core: sm: embed sm_platform_handler upon CFG_SM_PLATFORM_HANDLER

When CFG_SM_PLATFORM_HANDLER is disabled don't even call platform
handler which is not embedded. This change aligns sm_platform_handl

core: sm: embed sm_platform_handler upon CFG_SM_PLATFORM_HANDLER

When CFG_SM_PLATFORM_HANDLER is disabled don't even call platform
handler which is not embedded. This change aligns sm_platform_handler()
and std_handler() in secure monitor integration.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: explicit return value for sm_platform_handler()

Changes sm_platform_handler() to explicitly return whether the SMC
was handled or if it shall be relayed to another layer. Prior this
change the

core: explicit return value for sm_platform_handler()

Changes sm_platform_handler() to explicitly return whether the SMC
was handled or if it shall be relayed to another layer. Prior this
change the function returned false when the SMC had been handled and
true otherwise which are not obvious return values.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: correct _fdt_get_status() description

Correct _fdt_get_status() function description since it returns a
positive or null value on success and -1 on error.

Signed-off-by: Etienne Carriere <eti

core: correct _fdt_get_status() description

Correct _fdt_get_status() function description since it returns a
positive or null value on success and -1 on error.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

show more ...

core: fix missing unpaged constraint on mobj_with_fobj_get_pa()

mobj_with_fobj_get_pa() gets called when a TA crashed and core prints
some information about the TA. This change ensures the function

core: fix missing unpaged constraint on mobj_with_fobj_get_pa()

mobj_with_fobj_get_pa() gets called when a TA crashed and core prints
some information about the TA. This change ensures the function belongs
to an unpaged section.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: ensure embedded DTB found trace is output once

Move info trace "Embedded DTB found" so that it is output only once
even when get_embedded_dt() is called several times.

Signed-off-by: Etienne

core: ensure embedded DTB found trace is output once

Move info trace "Embedded DTB found" so that it is output only once
even when get_embedded_dt() is called several times.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: fix core panic when CFG_UNWIND=n

This change fixes a core panic occurrence when a TA panics while core
is built with CFG_TEE_CORE_DEBUG=y and CFG_UNWIND=n.

When a TA panics while CFG_UNWIND=n

core: fix core panic when CFG_UNWIND=n

This change fixes a core panic occurrence when a TA panics while core
is built with CFG_TEE_CORE_DEBUG=y and CFG_UNWIND=n.

When a TA panics while CFG_UNWIND=n, the thread specific data holding
abort_type was not loaded prior this change. The abort sequence that
print information to the console dumps now does not attemp to dump
un-relevant CPU register content.

Prior this change, ARM32 code could panic since reading an invalid SPSR
value when printing CPU state to the console, with an error trace like:

E/TC:? 0 TA panicked with code 0xbeef
E/TC:? 0 assertion 'thread_get_exceptions() & THREAD_EXCP_FOREIGN_INTR' failed at core/arch/arm/include/kernel/misc.h:22 <get_core_pos>
E/TC:0 0 Panic at core/kernel/assert.c:28 <_assert_break>


Prior this change ARM64 code printed irrelevant CPU state information
as below:

E/TC:? 0 TA panicked with code 0xbeef
E/TC:? 0
E/TC:? 0 User TA undef-abort at address 0x0
E/TC:? 0 esr 0x00000000 ttbr0 0x200000e173020 ttbr1 0x00000000 cidr 0x0
E/TC:? 0 cpu #0 cpsr 0x00000000
E/TC:? 0 x0 0000000000000000 x1 0000000000000000
(...)
E/TC:? 0 x30 0000000000000000 elr 0000000000000000
E/TC:? 0 sp_el0 0000000000000000

Fixes: c0bc8d0e7d72 ("core: print TA stack dump from thread context")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: move embedded DTB out of init sections

This change makes generic boot to discover non-secure memory and
console configuration from the external DTB only, no more from the
embedded DTB as prior

core: move embedded DTB out of init sections

This change makes generic boot to discover non-secure memory and
console configuration from the external DTB only, no more from the
embedded DTB as prior this change. When generic boot attempts to access
embedded DTB, the embedded DTB gets located in init read-only data
section become unnecessary too big. With this change, embedded DTB now
lies in the standard pageable read-only data section, relaxing memory
footprint constraint.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers/stpmic1: unpaged low power sequence

STPMIC1 is used by the secure world to driver the system low power
sequences. Since these sequences are executed in unpaged context,
the driver gets the c

drivers/stpmic1: unpaged low power sequence

STPMIC1 is used by the secure world to driver the system low power
sequences. Since these sequences are executed in unpaged context,
the driver gets the configuration from the DTB during the initialization
and provides optimized functions to load target configuration at
runtime.

This change makes STPMIC1 driver to call the memory footprint optimized
function stm32_i2c_read_write_membyte() for I2C transfer instead of
generic stm32_i2c_mem_read()/stm32_i2c_mem_write(). This is more
suitable to OP-TEE pager constraints on the platform.

This changes removes now unused STPMIC1_I2C_TIMEOUT_US.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: introduce STPMIC1 driver

STPMIC1 is a power management chip for the stm32mp1 platform. It is
accessed through an I2C bus. STPMIC1 provides regulators and other
features as interrupt sources an

core: introduce STPMIC1 driver

STPMIC1 is a power management chip for the stm32mp1 platform. It is
accessed through an I2C bus. STPMIC1 provides regulators and other
features as interrupt sources and watchdogs.

STPMIC1 configuration is expected from a secure device tree blob, that
currently is the embedded DTB.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

stm32mp1: update DTS files to Linux kernel 5.2-rc1

Synchronize stm32mp1 DTS files with those published in Linux kernel
source tree at commit a188339ca5a3 ("Linux 5.2-rc1").

This change updates plat

stm32mp1: update DTS files to Linux kernel 5.2-rc1

Synchronize stm32mp1 DTS files with those published in Linux kernel
source tree at commit a188339ca5a3 ("Linux 5.2-rc1").

This change updates platforms EV1 and ED1 and introduces DK1 and DK2
known as DiscoveryKit board. It also introduces stpmic1 bindings header
file needed for platform DTS files compilation.

Among other changes, this commit introduces STPMIC1 and BSEC description
nodes. STPMIC1 defines regulators. BSEC describes fuses and uses the
status / secure-status to define fuse access scope in the scope of BSEC
support.

This change strictly dumps Linux kernel DTS files into OP-TEE but
regarding stm32mp157c.dtsi for which the OP-TEE DTS file adds node
for the ETZPC device which is mandated by OP-TEE but not defined in
non-secure Linux kernel scope.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: provide struct user_ta_store_ops in public .h file

Moves struct user_ta_store_ops definition into the new
<kernel/user_ta_store.h> file.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro

core: provide struct user_ta_store_ops in public .h file

Moves struct user_ta_store_ops definition into the new
<kernel/user_ta_store.h> file.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

Move reg_pair_*() to util.h

Moves the two functions reg_pair_to_64() and reg_pair_from_64() from the
core only .h file <kernel/misc.h> to the libutils .h file util.h to make
the functions available

Move reg_pair_*() to util.h

Moves the two functions reg_pair_to_64() and reg_pair_from_64() from the
core only .h file <kernel/misc.h> to the libutils .h file util.h to make
the functions available from TAs.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: pager: check utc->areas before assigning tables

In tee_pager_assign_uta_tables() check that utc->areas are allocated
before assigning tables. If utc->areas are not allocated, skip the
operatio

core: pager: check utc->areas before assigning tables

In tee_pager_assign_uta_tables() check that utc->areas are allocated
before assigning tables. If utc->areas are not allocated, skip the
operation.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: handle_db: add ptr_destructor argument

Adds ptr_destructor argument to handle_db_destroy() which is called for
each registered pointer.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.

core: handle_db: add ptr_destructor argument

Adds ptr_destructor argument to handle_db_destroy() which is called for
each registered pointer.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: vm_set_prot(): skip prot bits already set

In vm_set_prot() skip a region which already has the requested
protection bits set as requested.

Acked-by: Etienne Carriere <etienne.carriere@linaro.

core: vm_set_prot(): skip prot bits already set

In vm_set_prot() skip a region which already has the requested
protection bits set as requested.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: imx: Add in calls to set CAAM job-ring permissions

This patch adds a call to set CAAM job-ring permissions for i.MX6 and i.MX7
processors. Since the iMX6ULL does not have a CAAM it will be ski

core: imx: Add in calls to set CAAM job-ring permissions

This patch adds a call to set CAAM job-ring permissions for i.MX6 and i.MX7
processors. Since the iMX6ULL does not have a CAAM it will be skipped but,
all other i.MX6 and i.MX7 SoCs will have their default CAAM job-ring
permissions set to normal-world.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

show more ...

core: imx: Add simple CAAM permissions set routine

When we transition to secure-world certain parts of the CAAM become opaque
to normal world. This patch adds a simple routine to set CAAM job-ring
p

core: imx: Add simple CAAM permissions set routine

When we transition to secure-world certain parts of the CAAM become opaque
to normal world. This patch adds a simple routine to set CAAM job-ring
permissions to normal-world by default.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

show more ...

pta: fix spelling error in comment

Fix a spelling error in validate_in_param().

Signed-off-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

stm32_i2c: save DTB status

This change saves DTB status value found in the I2C node and
introduces i2c_is_secure() to state the bus state.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

stm32_i2c: save DTB status

This change saves DTB status value found in the I2C node and
introduces i2c_is_secure() to state the bus state.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

plat-imx: conf: add ccimx6ulsbcpro

The Digi CCIMX6UL SBC Pro board support 256MB of RAM and the default
UART is UART5.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Reviewed-by: Pe

plat-imx: conf: add ccimx6ulsbcpro

The Digi CCIMX6UL SBC Pro board support 256MB of RAM and the default
UART is UART5.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

show more ...

virt: kern.ld.S: remove PROVIDE() keyword

The linker script for the TEE core exports two symbols using the
PROVIDE() keyword. This keyword is not needed; it makes no difference
because when CFG_VIRT

virt: kern.ld.S: remove PROVIDE() keyword

The linker script for the TEE core exports two symbols using the
PROVIDE() keyword. This keyword is not needed; it makes no difference
because when CFG_VIRTUALIZATION=y the symbols are *not* defined
elsewhere, and they *are* used by a C file, so that a normal symbol will
do the same [1]. Therefore, remove the keyword.

[1]: https://sourceware.org/binutils/docs/ld/PROVIDE.html#PROVIDE
"The PROVIDE keyword may be used to define a symbol [...] only if it is
referenced but not defined."

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...