| b787ecb7 | 08-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: introduce PWR regulators
Introduce a voltage regulator driver for the voltage controllers driven through PWR interface of stm32mp1 SoCs.
Signed-off-by: Etienne Carriere <etienne.carr
plat-stm32mp1: introduce PWR regulators
Introduce a voltage regulator driver for the voltage controllers driven through PWR interface of stm32mp1 SoCs.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6a68b221 | 12-Oct-2020 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
core: ffa: Fix the FF-A version returned to Secure Partition
The current Firmware Framework(FF-A) specification defines the major version of 0x1 and minor version of 0x0. Return these values when re
core: ffa: Fix the FF-A version returned to Secure Partition
The current Firmware Framework(FF-A) specification defines the major version of 0x1 and minor version of 0x0. Return these values when requested through the FFA_VERSION call instead of returning the FFA_VERSION function id
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6b050394 | 08-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor locking during PTA init
tee_ta_init_pseudo_ta_session() locks tee_ta_mutex only when needed. This makes this function similar to sec_part_init_session() and tee_ta_init_user_ta_sessio
core: refactor locking during PTA init
tee_ta_init_pseudo_ta_session() locks tee_ta_mutex only when needed. This makes this function similar to sec_part_init_session() and tee_ta_init_user_ta_session() in usage.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6b5921cc | 08-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor locking during StMM load
sec_part_init_session() locks tee_ta_mutex only when needed. This avoids a window where deadlock can occur in case pgt_alloc() goes to sleep.
Reviewed-by: Je
core: refactor locking during StMM load
sec_part_init_session() locks tee_ta_mutex only when needed. This avoids a window where deadlock can occur in case pgt_alloc() goes to sleep.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f0ab1c64 | 07-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: refactor locking during user TA load
tee_ta_init_user_ta_session() unlocks tee_ta_mutex while loading ldelf and the user TA. This avoids a window where deadlock can occur in case pgt_alloc() g
core: refactor locking during user TA load
tee_ta_init_user_ta_session() unlocks tee_ta_mutex while loading ldelf and the user TA. This avoids a window where deadlock can occur in case pgt_alloc() goes to sleep.
A new condition variable, tee_ta_init_cv, is added to signal that a TA has changed state while initializing.
tee_ta_init_session_with_context waits for a TA context be fully initialized before assigning it to another session.
This also simplifies tee_ta_try_set_busy() since it now doesn't have to handle the case where it has to wait for a TA context to be fully initialized.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Suggested-by: Opensource <opensource@sequiturlabs.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 806a85fa | 07-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add CFG_CORE_MAX_SYSCALL_RECURSION
Adds CFG_CORE_MAX_SYSCALL_RECURSION to define the limit for the number of levels TAs may call each other. If this number is too high we may run over the thre
core: add CFG_CORE_MAX_SYSCALL_RECURSION
Adds CFG_CORE_MAX_SYSCALL_RECURSION to define the limit for the number of levels TAs may call each other. If this number is too high we may run over the thread stack in OP-TEE Core.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 589a4941 | 09-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
core: use vaddr_t instead of uint32_t for object IDs
Some function incorrectly use uint32_t for object identifiers: tee_obj_get(), tee_svc_cryp_get_state() and tee_svc_storage_get_enum(). Those obje
core: use vaddr_t instead of uint32_t for object IDs
Some function incorrectly use uint32_t for object identifiers: tee_obj_get(), tee_svc_cryp_get_state() and tee_svc_storage_get_enum(). Those object IDs are actually virtual addresses so they need to be of type vaddr_t.
Link: https://github.com/OP-TEE/optee_os/issues/4035#issuecomment-680037072 Signed-off-by: Jerome Forissier <jerome@forissier.org>
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| aad807b4 | 05-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: add inline descriptions in pmic drivers
Add a bit of inline description comments in STM32MP1 PMIC driver.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jero
plat-stm32mp1: add inline descriptions in pmic drivers
Add a bit of inline description comments in STM32MP1 PMIC driver.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| d6ff4606 | 05-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: factorize FDT parsing in pmic driver
Factorize looping into the FDT regulator nodes for STM32MP1 PMIC driver. Boot-on, low power and non-secure access configuration are done for each
plat-stm32mp1: factorize FDT parsing in pmic driver
Factorize looping into the FDT regulator nodes for STM32MP1 PMIC driver. Boot-on, low power and non-secure access configuration are done for each regulator sub-node of the PMIC node.
This change merges save_power_configurations() sequence into parse_regulator_fdt_nodes() implementation. The sequence panics on error as the previous implementation did. Some error level traces are changed to debug level.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| db454494 | 05-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: store PMIC regulators secure assignment
Implement stm32mp_nsec_can_access_regu() for non-secure service to get whether a voltage regulator driven by PMIC can be accessed. The status i
plat-stm32mp1: store PMIC regulators secure assignment
Implement stm32mp_nsec_can_access_regu() for non-secure service to get whether a voltage regulator driven by PMIC can be accessed. The status is set according to embedded FDT, based status value.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 037c8a70 | 07-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
core: non-lpae: allocate one more translation table for ASLR
Commit 1579bdf39b3e ("core: lpae: allocate one more translation table for ASLR") has fixed an issue with LPAE (QEMUv8), but a similar one
core: non-lpae: allocate one more translation table for ASLR
Commit 1579bdf39b3e ("core: lpae: allocate one more translation table for ASLR") has fixed an issue with LPAE (QEMUv8), but a similar one occurs with non-LPAE. More specifically, running xtest 1013 on QEMU with CFG_ULIBS_SHARED=y:
E/TC:0 0 Panic 'Failed to spread pgdir on small tables' at core/arch/arm/mm/core_mmu.c:1737 <core_mmu_map_pages> E/TC:0 0 TEE load address @ 0x5a9b5000 E/TC:0 0 Call stack: E/TC:0 0 0x5a9bcba1 print_kernel_stack at optee_os/core/arch/arm/kernel/unwind_arm32.c:109 E/TC:0 0 0x5a9c8293 __do_panic at optee_os/core/kernel/panic.c:31 E/TC:0 0 0x5a9bf357 core_mmu_map_pages at optee_os/core/arch/arm/mm/core_mmu.c:1737 E/TC:0 0 0x5a9c2a2f mobj_reg_shm_inc_map at optee_os/core/arch/arm/mm/mobj_dyn_shm.c:200 E/TC:0 0 0x5a9e9067 mobj_inc_map at optee_os/core/arch/arm/include/mm/mobj.h:93 E/TC:0 0 0x5a9e92b1 mobj_mapped_shm_alloc at optee_os/core/arch/arm/mm/mobj_dyn_shm.c:412 E/TC:0 0 0x5a9ee9d9 msg_param_mobj_from_noncontig at optee_os/core/kernel/msg_param.c:141 E/TC:0 0 0x5a9b9d43 get_rpc_alloc_res at optee_os/core/arch/arm/kernel/thread_optee_smc.c:541 E/TC:0 0 0x5a9e479b thread_rpc_alloc at optee_os/core/arch/arm/kernel/thread_optee_smc.c:580 E/TC:0 0 0x5a9e47bf thread_rpc_alloc_payload at optee_os/core/arch/arm/kernel/thread_optee_smc.c:585 E/TC:0 0 0x5a9b67db rpc_load at optee_os/core/arch/arm/kernel/ree_fs_ta.c:99 E/TC:0 0 0x5a9e28e9 ree_fs_ta_open at optee_os/core/arch/arm/kernel/ree_fs_ta.c:146 E/TC:0 0 0x5a9c9f77 system_open_ta_binary at optee_os/core/pta/system.c:259 E/TC:0 0 0x5a9ca873 invoke_command at optee_os/core/pta/system.c:890 E/TC:0 0 0x5a9e3553 pseudo_ta_enter_invoke_cmd at optee_os/core/arch/arm/kernel/pseudo_ta.c:198 E/TC:0 0 0x5a9ef059 tee_ta_invoke_command at optee_os/core/kernel/tee_ta_manager.c:767 E/TC:0 0 0x5a9f345f syscall_invoke_ta_command at optee_os/core/tee/tee_svc.c:887 E/TC:0 0 0x5a9c3128 tee_svc_do_call at optee_os/core/arch/arm/tee/arch_svc_a32.S:54
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2ba0f41f | 07-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
core: non-lpae: increase PGT_CACHE_SIZE when CFG_NUM_THREADS=2
xtest on QEMU shows allocation errors when CFG_ULIBS_SHARED=y:
# xtest 1010 ... o regression_1010.10 Invalid memory access 5 with 1
core: non-lpae: increase PGT_CACHE_SIZE when CFG_NUM_THREADS=2
xtest on QEMU shows allocation errors when CFG_ULIBS_SHARED=y:
# xtest 1010 ... o regression_1010.10 Invalid memory access 5 with 1024 bytes memref regression_1000.c:500: [...] 0xffff000c = TEEC_ERROR_OUT_OF_MEMORY [...] regression_1000.c:505: [...] 0xffff000c = TEEC_ERROR_OUT_OF_MEMORY [...] regression_1010.10 FAILED ... E/TC:? 0 alloc_pgt:147 5 page tables not available E/TC:? 0 alloc_pgt:147 5 page tables not available
This configuration needs at least 5 page tables. Use 8 to avoid wasting space.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 006d89b8 | 06-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: add SCMI Voltage Domain protocol
SCMI Voltage Domain protocol in defined in the SCMI specification since its version 3 [1]. This protocol allows a SCMI server to expose voltage re
drivers: scmi-msg: add SCMI Voltage Domain protocol
SCMI Voltage Domain protocol in defined in the SCMI specification since its version 3 [1]. This protocol allows a SCMI server to expose voltage regulator control services. The current specification defines services to discover the exposed regulators, to enable/disable them and to set/get the regulator voltage level.
The protocol driver is embedded upon configuration switch CFG_SCMI_MSG_VOLTAGE_DOMAIN.
Link: [1] https://developer.arm.com/documentation/den0056/c Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 8500b618 | 02-Oct-2020 |
Lionel Debieve <lionel.debieve@st.com> |
plat-stm32mp1: use SCMI reset to manage MCU hold boot
Adding the MCU hold boot management through a SCMI dedicated reset domain. MCU hold boot controls the MCU reboot sequence together with MCU rese
plat-stm32mp1: use SCMI reset to manage MCU hold boot
Adding the MCU hold boot management through a SCMI dedicated reset domain. MCU hold boot controls the MCU reboot sequence together with MCU reset controller already exposed to SCMI agent 0.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 586eee81 | 02-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_bsec: add local helper otp_upper_base()
Use local helper function otp_upper_base() to factorize where upper OTP base ID starts.
Signed-off-by: Etienne Carriere <etienne.carriere@lina
drivers: stm32_bsec: add local helper otp_upper_base()
Use local helper function otp_upper_base() to factorize where upper OTP base ID starts.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 729093d5 | 02-Oct-2020 |
Lionel Debieve <lionel.debieve@st.com> |
drivers: stm32_gpio: fix incorrect alternate mask
Alternate configuration is using 4 bits, current mask was resetting partially the other alternate configuration.
Signed-off-by: Lionel Debieve <lio
drivers: stm32_gpio: fix incorrect alternate mask
Alternate configuration is using 4 bits, current mask was resetting partially the other alternate configuration.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| e1e44c11 | 02-Oct-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: prevent panicking when secure clock has no parent
Remove the Core panic instruction when looking for parents of a clock to be secure. If the clock has no parent, there is no parent cl
plat-stm32mp1: prevent panicking when secure clock has no parent
Remove the Core panic instruction when looking for parents of a clock to be secure. If the clock has no parent, there is no parent clock to secure, no need to panic.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 1350576b | 02-Oct-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: disable RTCAPB clock when not needed
Disable RTCAPB clock when not used. The clock is currently needed when enabling or disabling the secondary code since this one reads secure entry
plat-stm32mp1: disable RTCAPB clock when not needed
Disable RTCAPB clock when not used. The clock is currently needed when enabling or disabling the secondary code since this one reads secure entry point address from a SoC interface relying on this clock.
Prior this change was RTCAPB clock enabled at boot time and never disabled. This change disables the clock when secondary core is brought to life and enables it back before secondary core enters its power down sequence.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| e0f7e777 | 05-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stpmic1: add stpmic1_regulator_is_valid()
Add driver helper API function stpmic1_regulator_is_valid() to check if a regulator name identifier references a STPMIC1 regulator.
Signed-off-by:
drivers: stpmic1: add stpmic1_regulator_is_valid()
Add driver helper API function stpmic1_regulator_is_valid() to check if a regulator name identifier references a STPMIC1 regulator.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| c52a7c2e | 06-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stpmic1: API functions to query regulators levels
Add API function in STPMIC1 driver to allow Core to query the regulators supported voltage levels. This change is needed by coming SCMI Vol
drivers: stpmic1: API functions to query regulators levels
Add API function in STPMIC1 driver to allow Core to query the regulators supported voltage levels. This change is needed by coming SCMI Voltage Domain for regulator resource discovery services.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 6a63363b | 06-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stpmic1: don't force panic on invalid regulator ID
Returns an explicit invalid reference rather than panicking straight in local helper function get_regulator_data(). This change lets calle
drivers: stpmic1: don't force panic on invalid regulator ID
Returns an explicit invalid reference rather than panicking straight in local helper function get_regulator_data(). This change lets caller function decide whether to panic, propagate an error status or take the applicable behavior when it occurs.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| e179489e | 02-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: remove #ifdef in switch/case
Remove #ifdef from scmi_process_message() switch/case block and define stubs for when related SCMI protocol is not embedded.
Signed-off-by: Etienne C
drivers: scmi-msg: remove #ifdef in switch/case
Remove #ifdef from scmi_process_message() switch/case block and define stubs for when related SCMI protocol is not embedded.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| d9be1b35 | 02-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: fix clock rates query
Fix implementation of the clock rate query platform functions to consider rates start index which was missing.
Fixes: a7a9e3ba71dd ("drivers/scmi-msg: suppo
drivers: scmi-msg: fix clock rates query
Fix implementation of the clock rate query platform functions to consider rates start index which was missing.
Fixes: a7a9e3ba71dd ("drivers/scmi-msg: support for clock protocol") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 3b354b19 | 02-Oct-2020 |
Neil Shipp <neilsh@microsoft.com> |
core: Fix RPMB fat entry cache buffer overflow
Ensure that fat_entry_dir_update can only update entries less than the current cache size and not just the maximum size limit of the cache.
Signed-off
core: Fix RPMB fat entry cache buffer overflow
Ensure that fat_entry_dir_update can only update entries less than the current cache size and not just the maximum size limit of the cache.
Signed-off-by: Neil Shipp <neilsh@microsoft.com> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 919a5a68 | 06-Oct-2020 |
Jerome Forissier <jerome@forissier.org> |
Use fallthrough pseudo-keyword in switch/case statements
Use fallthrough; in switch/case statements. Imported libraries (libtomcrypt, libmbedtls) are not modified to minimize differences with upstre
Use fallthrough pseudo-keyword in switch/case statements
Use fallthrough; in switch/case statements. Imported libraries (libtomcrypt, libmbedtls) are not modified to minimize differences with upstream.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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