| 988ea29c | 23-Dec-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
core: add handle_db_is_empty() function
Implements a function that checks if a handle database is empty, i.e. all pointers stored in the database are NULL.
Acked-by: Etienne Carriere <etienne.carri
core: add handle_db_is_empty() function
Implements a function that checks if a handle database is empty, i.e. all pointers stored in the database are NULL.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| 0a971fdb | 11-Dec-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
core: invoke SVC handler through struct ts_session
Store the current SVC handler function pointer in struct ts_session, and invoke the handler through this. Enables changing the SVC handler for a se
core: invoke SVC handler through struct ts_session
Store the current SVC handler function pointer in struct ts_session, and invoke the handler through this. Enables changing the SVC handler for a session without modifying the ts_ops defined in the session context.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| cbe7e1b8 | 11-Dec-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
core: extract ldelf related code from system PTA
Various functions in the system PTA are only used in conjunction with ldelf. They either implement a system service needed only by ldelf (system_open
core: extract ldelf related code from system PTA
Various functions in the system PTA are only used in conjunction with ldelf. They either implement a system service needed only by ldelf (system_open_ta_binary(), etc.) or they provide an interface for TAs to invoke services implemented in user space by ldelf (call_ldelf_dlopen(), call_ldelf_dlsym()). Extract these to a separate file as a first step towards converting the PTA system_*() calls into proper ldelf-specific syscalls.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| 36bb435f | 11-Dec-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
core: move user_ctx field to struct ts_session
The user_ctx field in struct tee_ta_session is used by PTAs to keep track of session specific information. Move it to struct ts_session to make it gene
core: move user_ctx field to struct ts_session
The user_ctx field in struct tee_ta_session is used by PTAs to keep track of session specific information. Move it to struct ts_session to make it generic and reachable for all sessions, not just TAs. This enables extracting ldelf related code from system PTA.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| 9c34c0c7 | 11-Dec-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
core: prefer struct user_mode_ctx in system PTA
Most functions in system PTA have struct ts_session as parameter, but only use it for getting the pointer to user_mode_ctx. This commit simplifies the
core: prefer struct user_mode_ctx in system PTA
Most functions in system PTA have struct ts_session as parameter, but only use it for getting the pointer to user_mode_ctx. This commit simplifies the code by doing the casting in a single place and passing user_mode_ctx as an argument instead.
This also eliminates casting to user_ta_ctx as an intermediate step. It is a preparation step for extracting ldelf related functions from system PTA to an ldelf specific syscall handler.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| 3c534211 | 05-Dec-2020 |
Stefan Schmidt <snst@meek.de> |
core: rpmb: return TEE_ERROR_STORAGE_NO_SPACE if no space left
So far the error TEE_ERROR_OUT_OF_MEMORY was returned if no free memory could be allocated in the RPMB to store new data. According to
core: rpmb: return TEE_ERROR_STORAGE_NO_SPACE if no space left
So far the error TEE_ERROR_OUT_OF_MEMORY was returned if no free memory could be allocated in the RPMB to store new data. According to TEE Internal Core API Specification the error TEE_ERROR_STORAGE_NO_SPACE shall be returned if insufficient space is available to create the persistent object.
Signed-off-by: Stefan Schmidt <snst@meek.de> Reviewed-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 3f286c3b | 28-Dec-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
Reintroduce memalign() and friends
memalign() and friends where removed with the commit 8cd8a6296974 ("Remove memalign()").
At the time memalign() was unused and a bit buggy. This new memalign() is
Reintroduce memalign() and friends
memalign() and friends where removed with the commit 8cd8a6296974 ("Remove memalign()").
At the time memalign() was unused and a bit buggy. This new memalign() is believed to work correctly due to extensive testing. Recently memalign() has been needed by certain drivers so it makes sense to add it again.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9bbdacba | 04-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
qemu_v8: configure secure interrupts
Configures GIC and enable reception of interrupts from the secure uart. This enables testing of secure interrupts on the QEMU v8 platform by typing in the secure
qemu_v8: configure secure interrupts
Configures GIC and enable reception of interrupts from the secure uart. This enables testing of secure interrupts on the QEMU v8 platform by typing in the secure log.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4c69b1f1 | 15-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: build: elliptic curve
Makefile changes to compile-in and enable elliptic curve support.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wikland
crypto: se050: build: elliptic curve
Makefile changes to compile-in and enable elliptic curve support.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 9b5917c9 | 15-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: core: elliptic curve implementation
Elliptic curve driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etie
crypto: se050: core: elliptic curve implementation
Elliptic curve driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d419b2b2 | 15-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: adaptors: elliptic curve
APDU and utility functions required to support elliptic curve cryptography.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander
crypto: se050: adaptors: elliptic curve
APDU and utility functions required to support elliptic curve cryptography.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8563cdc5 | 13-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: limitations to RSA crypto
The supported algorithms for encryption/decryption are: PKCS1_OAEP PKCS1_V1_5
When using PKCS1_PSS_MGF1 the se050 also has some restrictions on
drivers: crypto: se050: limitations to RSA crypto
The supported algorithms for encryption/decryption are: PKCS1_OAEP PKCS1_V1_5
When using PKCS1_PSS_MGF1 the se050 also has some restrictions on the hash algorithms that can be used depending on the RSA key size.
Source: Plug And Trust MW documentation, Release v02,14,00 (Apr 03, 2020)
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 145ae446 | 02-Dec-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
Use barrier_read_cntpct() to read CNTPCT
Arm ARM quite clearly mentions [1] [2] that such reads must be preceded by an ISB to forbid re-ordering.
[1] https://developer.arm.com/documentation/ddi0487
Use barrier_read_cntpct() to read CNTPCT
Arm ARM quite clearly mentions [1] [2] that such reads must be preceded by an ISB to forbid re-ordering.
[1] https://developer.arm.com/documentation/ddi0487/fc/ page D13-2863 "Synchronization requirements for AArch64 System registers" and page G8-6146 "Ordering of reads of System registers". [2] https://developer.arm.com/documentation/ddi0406/cd/ page B3-1441 "Ordering of reads of system control registers"
Reviewed-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reported-by: Olivier Deprez <Olivier.Deprez@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e19a75cb | 15-Dec-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add barrier_read_cntpct()
Adds barrier_read_cntpct() to arm.h. To be used as a helper when reading CNTPCT.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <eti
core: add barrier_read_cntpct()
Adds barrier_read_cntpct() to arm.h. To be used as a helper when reading CNTPCT.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 1defc238 | 14-Dec-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: copy ctx_finalize in syscall_cryp_state_copy()
Copies the ctx_finalize() when a state is copied using syscall_cryp_state_copy() in order to support proper cleanup of the state once it's remove
core: copy ctx_finalize in syscall_cryp_state_copy()
Copies the ctx_finalize() when a state is copied using syscall_cryp_state_copy() in order to support proper cleanup of the state once it's removed.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Suggested-by: Tony He <tony.he@armchina.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4cfcf345 | 14-Dec-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: copy mode in cts_copy_state()
Fixes cts_copy_state() by copying the "mode" element also for the state to be complete.
Fixes: 96098f011f7c ("core: crypto: introduce struct crypto_cipher_ops")
core: copy mode in cts_copy_state()
Fixes cts_copy_state() by copying the "mode" element also for the state to be complete.
Fixes: 96098f011f7c ("core: crypto: introduce struct crypto_cipher_ops") Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reported-by: Tony He <tony.he@armchina.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8bdc52f7 | 14-Dec-2020 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
plat-rockchip: mark parameters as __maybe_unused in platform_secure_ddr_region
The weak variant of platform_secure_ddr_region() only emits a message that the target region won't get protected due to
plat-rockchip: mark parameters as __maybe_unused in platform_secure_ddr_region
The weak variant of platform_secure_ddr_region() only emits a message that the target region won't get protected due to missing platform-code.
Depending on the log-level this can result in the function parameters not getting used at all, so mark them as __maybe_unused.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 5ae1f02a | 10-Dec-2020 |
Rouven Czerwinski <r.czerwinski@pengutronix.de> |
core: tzc380: restart search at full size
Restart the search at the biggest region size after finding a region. This way we can use subregions for the first offset and use full regions afterwards.
core: tzc380: restart search at full size
Restart the search at the biggest region size after finding a region. This way we can use subregions for the first offset and use full regions afterwards.
Fixes https://github.com/OP-TEE/optee_os/issues/4252
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Tested-by: Robin van der Gracht <robin@protonic.nl> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| afd861ca | 14-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: die_id generation
Guarantee the uniqueness of the die_id even when the requested length is smaller than the se050 unique identifier.
Currently, tee_otp_get_die_id requests 1
drivers: crypto: se050: die_id generation
Guarantee the uniqueness of the die_id even when the requested length is smaller than the se050 unique identifier.
Currently, tee_otp_get_die_id requests 12 bytes while the se050 unique identifier is 18 bytes which is an issue as the uniqueness of the device can be lost due to the truncation of the identifier.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 0d016aff | 12-Dec-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix user mode context reference in pager
Fix tee_pager_gpt_save_and_release_entries() to use to_user_mode_ctx() to get current context user memory areas instead of to_user_ta_ctx() since the f
core: fix user mode context reference in pager
Fix tee_pager_gpt_save_and_release_entries() to use to_user_mode_ctx() to get current context user memory areas instead of to_user_ta_ctx() since the former supports both SP and TA contexts.
Prior this change was pager asserting with an error trace like below: E/TC:0 0 assertion 'is_user_ta_ctx(ctx)' failed at core/arch/arm/include/kernel/user_ta.h:56 <to_user_ta_ctx> E/TC:0 0 Panic at core/kernel/assert.c:28 <_assert_break>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 3f667706 | 13-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: se050: strip spaces from crypto.mk
Some versions of the force function used in the makefile might produce incorrect results when spaces are included in the parameter field.
In gene
drivers: crypto: se050: strip spaces from crypto.mk
Some versions of the force function used in the makefile might produce incorrect results when spaces are included in the parameter field.
In general is a better practice to strip spaces when invoking this sort of functions.
To prevent issues (ie: in case of backport) make sure that the SE050 driver is not affected by that variability.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| f8cb9ade | 11-Dec-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: imx_i2c: remove non-portable use of define
Fix the build error triggered when enabling -Werror=expansion-to-defined
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Eti
drivers: imx_i2c: remove non-portable use of define
Fix the build error triggered when enabling -Werror=expansion-to-defined
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4055cfc4 | 02-Dec-2020 |
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
Initial support for Renesas RZ/G2{H,M,N,E} SoC's
This patch adds support for Renesas RZ/G2{H,M,N,E} SoC's.
* Compiled with: | make PLATFORM=rzg # Defaults to RZ/G2M SoC
Based on the work done
Initial support for Renesas RZ/G2{H,M,N,E} SoC's
This patch adds support for Renesas RZ/G2{H,M,N,E} SoC's.
* Compiled with: | make PLATFORM=rzg # Defaults to RZ/G2M SoC
Based on the work done from Huynh Thanh Hung for RZ/G2 internally and similar work done for Renesas RCar-Gen3 SoC's in mainline OP-TEE OS.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5ae0290f | 10-Dec-2020 |
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
core: kernel: link.mk: Move rules to generate tee-raw.bin and tee.srec from rcar platform
Move the rules to generate tee-raw.bin and tee.srec from rcar platform to core/arch/arm/kernel/link.mk so th
core: kernel: link.mk: Move rules to generate tee-raw.bin and tee.srec from rcar platform
Move the rules to generate tee-raw.bin and tee.srec from rcar platform to core/arch/arm/kernel/link.mk so that similar platforms can re-use it.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 784d32ef | 09-Dec-2020 |
Jerome Forissier <jerome@forissier.org> |
core: remove unused TEE_TIME_BOOT_TICKS_HZ
The TEE_TIME_BOOT_TICKS_HZ macro is not used, remove it.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.car
core: remove unused TEE_TIME_BOOT_TICKS_HZ
The TEE_TIME_BOOT_TICKS_HZ macro is not used, remove it.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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