core: kernel: sub.mk: don't build user_access.c when CFG_WITH_USER_TA=n

The user_access.c functions are used by tee_svc* which are not built when
CFG_WITH_USER_TA=n, therefore, make it depend on CFG

core: kernel: sub.mk: don't build user_access.c when CFG_WITH_USER_TA=n

The user_access.c functions are used by tee_svc* which are not built when
CFG_WITH_USER_TA=n, therefore, make it depend on CFG_WITH_USER_TA flag.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

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core: kernel: otp_stubs: fix unresolved symbols when CFG_WITH_USER_TA=n

Building with CFG_WITH_USER_TA=n leads to linking issues. The default
tee_otp_get_ta_enc_key() function references ta_pub_key_

core: kernel: otp_stubs: fix unresolved symbols when CFG_WITH_USER_TA=n

Building with CFG_WITH_USER_TA=n leads to linking issues. The default
tee_otp_get_ta_enc_key() function references ta_pub_key_modulus_size and
ta_pub_key_modulus which are not resolved, therefore change its definition
to depend on the CFG_WITH_USER_TA flag.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

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core: tee: sub.mk: don't build tee_ta_enc_manager.c when CFG_WITH_USER_TA=n

This commit makes tee_ta_enc_manager.c source file depend on
CFG_WITH_USER_TA flag. Building it when CFG_WITH_USER_TA=n le

core: tee: sub.mk: don't build tee_ta_enc_manager.c when CFG_WITH_USER_TA=n

This commit makes tee_ta_enc_manager.c source file depend on
CFG_WITH_USER_TA flag. Building it when CFG_WITH_USER_TA=n leads to an
inconsistency (extra unresolved symbols). Moreover it adds unused code.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

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plat-ls: Add GPIO driver for NXP LS Platforms

This patch adds GPIO driver for Layerscape Platforms.
GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Manish Tom

plat-ls: Add GPIO driver for NXP LS Platforms

This patch adds GPIO driver for Layerscape Platforms.
GPIO compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Acked-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'

To get the GPIO controller base address, 'struct gpio_chip *chip' is passed
as a member in the container 'struct gpio_ops'

Also updat

core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'

To get the GPIO controller base address, 'struct gpio_chip *chip' is passed
as a member in the container 'struct gpio_ops'

Also updated bcm_gpio and pl061_gpio as per modified gpio.h definition.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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core: imx: build snvs driver for imx8mm

Build SNVS driver for iMX8MM.

Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Igor Opaniuk <

core: imx: build snvs driver for imx8mm

Build SNVS driver for iMX8MM.

Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: imx: add snvs base address for imx8m

Add Secure Non-Volatile Storage base address for iMX8M SoCs.

Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.

core: imx: add snvs base address for imx8m

Add Secure Non-Volatile Storage base address for iMX8M SoCs.

Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: mutex: mutex is abstract pull it from arch folder

This commit moves mutex* and wait_queue* from arch folder to core/kernel
to make it architecture-independent.

Signed-off-by: Marouene Boubakr

core: mutex: mutex is abstract pull it from arch folder

This commit moves mutex* and wait_queue* from arch folder to core/kernel
to make it architecture-independent.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: clear user mappings from tables when removed

When a user mapping is removed clear it immediately from active or
cached translation tables.

Reviewed-by: Etienne Carriere <etienne.carriere@lina

core: clear user mappings from tables when removed

When a user mapping is removed clear it immediately from active or
cached translation tables.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add tlbi_mva_range_asid()

Adds tlbi_mva_range_asid() which invalidates a range of virtual
addresses for a specific ASID.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off

core: add tlbi_mva_range_asid()

Adds tlbi_mva_range_asid() which invalidates a range of virtual
addresses for a specific ASID.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add pgt_clear_ctx_range()

Adds pgt_clear_ctx_range() which clears the corresponding entries in
the active or cached translation tables of user mode context.

Reviewed-by: Etienne Carriere <eti

core: add pgt_clear_ctx_range()

Adds pgt_clear_ctx_range() which clears the corresponding entries in
the active or cached translation tables of user mode context.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: check snprintf() return value in add_res_mem_dt_node()

Adds a check for the return value from snprintf() in
add_res_mem_dt_node(). In case snprintf() has failed of truncates the
output a debug

core: check snprintf() return value in add_res_mem_dt_node()

Adds a check for the return value from snprintf() in
add_res_mem_dt_node(). In case snprintf() has failed of truncates the
output a debug warning in the log.

This fixes coverity scan:
CID 1501804 (#1 of 1): Unchecked return value (CHECKED_RETURN)

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add NULL check in system_dlsym()

system_dlsym() takes a uuid in one of the memref parameters. Prior to
this patch that memref wasn't checked correctly in all cases.
system_dlsym() passes the u

core: add NULL check in system_dlsym()

system_dlsym() takes a uuid in one of the memref parameters. Prior to
this patch that memref wasn't checked correctly in all cases.
system_dlsym() passes the uuid to ldelf_dlsym() which uses this uuid so
the pointer must be valid and of the expected size. Fix this by checking
that the pointer is non-NULL and of the correct size.

This fixes coverity scan:
CID 1501812 (#1 of 1): Dereference after null check (FORWARD_NULL)

Fixes: ebef121c1f5c ("core, ldelf: add support for runtime loading of shared libraries")
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: assert result in file_num_to_str()

Adds an assert() that snprintf() succeeds in file_num_to_str().

This fixes coverity scan:
CID 1501823 (#1 of 1): Unchecked return value (CHECKED_RETURN)

R

core: assert result in file_num_to_str()

Adds an assert() that snprintf() succeeds in file_num_to_str().

This fixes coverity scan:
CID 1501823 (#1 of 1): Unchecked return value (CHECKED_RETURN)

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: assert result in crypto_bignum_copy()

Adds an assert() that mbedtls_mpi_copy() succeeds in
crypto_bignum_copy().

This fixes coverity scan:
CID 1501791 (#1 of 1): Unchecked return value (CHEC

core: assert result in crypto_bignum_copy()

Adds an assert() that mbedtls_mpi_copy() succeeds in
crypto_bignum_copy().

This fixes coverity scan:
CID 1501791 (#1 of 1): Unchecked return value (CHECKED_RETURN)

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: assert result in crypto_bignum_bn2bin()

Adds an assert() that mbedtls_mpi_write_binary() succeeds in
crypto_bignum_bn2bin().

This fixes coverity scan:
CID 1501843 (#1 of 1): Unchecked return

core: assert result in crypto_bignum_bn2bin()

Adds an assert() that mbedtls_mpi_write_binary() succeeds in
crypto_bignum_bn2bin().

This fixes coverity scan:
CID 1501843 (#1 of 1): Unchecked return value (CHECKED_RETURN).

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: mobj: fix memory leak

dynamic shared memory is not being released leading to an out of
memory condition.

Issue triggered during tests exporting the cryptographic random
generator to the REE (

core: mobj: fix memory leak

dynamic shared memory is not being released leading to an out of
memory condition.

Issue triggered during tests exporting the cryptographic random
generator to the REE (Linux) and then reading the value via the device
interface (/dev/hwrng).

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: fix allocated buffer size

When a buffer is allocated for output CAAM operations,
the output buffer cache is invalidated beforehand.

To avoid data loss, an allocated buffer size shoul

drivers: caam: fix allocated buffer size

When a buffer is allocated for output CAAM operations,
the output buffer cache is invalidated beforehand.

To avoid data loss, an allocated buffer size should be a
multiple data cacheline size.

Fixes: b22795b ("drivers: caam: make use of generic memalign() implementation")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: use dcache_get_line_size()

Remove CAAM function to get the data cache line size and
use the generic function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens W

drivers: caam: use dcache_get_line_size()

Remove CAAM function to get the data cache line size and
use the generic function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-ls: add i2c driver for NXP LS Platforms

I2C Driver compilation is enabled by default for LX2160A-RDB
and LX2160A-QDS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Jens W

plat-ls: add i2c driver for NXP LS Platforms

I2C Driver compilation is enabled by default for LX2160A-RDB
and LX2160A-QDS.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Clement Faure <clement.faure@nxp.com>

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build: core: add missing dependencies when generating assembly constants

The header file <generated/asm-defines.h> is created at build time. It
contains macro definitions for various offsets in C st

build: core: add missing dependencies when generating assembly constants

The header file <generated/asm-defines.h> is created at build time. It
contains macro definitions for various offsets in C structures and is
especially useful for use from assembler code. It is generated from
asm-defines.c, which includes a number of header files, of which two
are also generated at build time: <generated/arm32_sysreg.h> and
<generated/arm32_gicv3_sysreg.h>.

These dependencies are expressed nowhere in the makefiles and therefore
build errors can result. For example:

$ make out/arm-plat-vexpress/core/include/generated/.asm-defines.s
CHK out/arm-plat-vexpress/conf.mk
UPD out/arm-plat-vexpress/conf.mk
CHK out/arm-plat-vexpress/include/generated/conf.h
UPD out/arm-plat-vexpress/include/generated/conf.h
CC out/arm-plat-vexpress/core/include/generated/.asm-defines.s
In file included from core/arch/arm/include/arm.h:99,
from core/arch/arm/include/kernel/thread.h:12,
from core/arch/arm/kernel/asm-defines.c:8:
core/arch/arm/include/arm32.h:167:10: fatal error: generated/arm32_sysreg.h: No such file or directory
167 | #include <generated/arm32_sysreg.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.

The error in [1] is believed to have the same root cause: during
parallel build the generated header file might have been created by one
job but not yet written to when another job would open it. The compiler
would see an empty file, thus the missing declarations.

Add the missing dependencies via a new variable at the location where
asm-defines.c is added to the build.

Note that the other core .c files depending on these generated sysreg
headers are not affected because their .o files explicitly depend on
FORCE-GENSRCcore (which generates the headers).

Link: [1] https://ci.linaro.org/job/ledge-oe-premerge-ci/182/DISTRO=rpb,MACHINE=ledge-ti-am572x,label=docker-buster-amd64/console
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat: rcar: Obtain memory layout from DT

Since the ATF is passing a DT fragment to OpTee-OS, parse the memory
information from this DT fragment. This makes it possible to run the
OpTee-OS on any mem

plat: rcar: Obtain memory layout from DT

Since the ATF is passing a DT fragment to OpTee-OS, parse the memory
information from this DT fragment. This makes it possible to run the
OpTee-OS on any memory layout instead of the few hard-coded options.
Switch the default platform to this DT based approach, but retain the
legacy platforms as well for backward compatibility.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>

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plat: rcar: Derive core map from PRR

Instead of hard-coding the core count and the core ID mapping,
derive this information from the PRR register. All R-Car3 SoCs
have either one or two 4-core CPU c

plat: rcar: Derive core map from PRR

Instead of hard-coding the core count and the core ID mapping,
derive this information from the PRR register. All R-Car3 SoCs
have either one or two 4-core CPU clusters composed of CA53 or
CA57, except for M3W/M3W+, which has two CA57s and four CA53s.

So the approach here is to always set core count to 8, read out
PRR register once on boot, and then calculate the core ID using
CorePos = CoreId + (ClusterId << (IsM3W ? 1 : 0))

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>

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crypto: se050: Foundries Plug-and-Trust Release 0.0.2

The Foundries Plug-and-Trust library tracks NXP Plug-and-Trust
quaterly releases.

Modifications in the NXP library sources require a new prepro

crypto: se050: Foundries Plug-and-Trust Release 0.0.2

The Foundries Plug-and-Trust library tracks NXP Plug-and-Trust
quaterly releases.

Modifications in the NXP library sources require a new preprocessor
macro to be defined.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: crypto: se050: improve maintainability

Replace explicit c-flags duplication across makefiles with single
shared definition.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed

drivers: crypto: se050: improve maintainability

Replace explicit c-flags duplication across makefiles with single
shared definition.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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