| d6ad67f6 | 11-Mar-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: mm: change vm_pa2va() to return a virtual address
Change vm_pa2va() to return target virtual address or NULL if the physical address cannot be resolved which can happen when pager is enabled a
core: mm: change vm_pa2va() to return a virtual address
Change vm_pa2va() to return target virtual address or NULL if the physical address cannot be resolved which can happen when pager is enabled and the target physical page belongs to the pager page pool. This change makes vm_pa2va() helper function simpler and its only caller doesn't differentiate error return codes.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 692bf178 | 11-Mar-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: arm: mm: initialize local variables
Add missing default initializer for local variables of the functions related to memory address conversion in core_mmu.c.
Signed-off-by: Etienne Carriere <e
core: arm: mm: initialize local variables
Add missing default initializer for local variables of the functions related to memory address conversion in core_mmu.c.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b757e307 | 19-Mar-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: introduce CFG_CORE_PAGE_TAG_AND_IV
Introduces CFG_CORE_PAGE_TAG_AND_IV which defaults to enabled if TA paging is enabled. Can be used to disable tag and IV paging for paged read-write pages.
core: introduce CFG_CORE_PAGE_TAG_AND_IV
Introduces CFG_CORE_PAGE_TAG_AND_IV which defaults to enabled if TA paging is enabled. Can be used to disable tag and IV paging for paged read-write pages.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| aad1cf6b | 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fobj_rw_paged_alloc() store tags and IVs in paged area
fobj_rw_paged_alloc() is updated to store tags and IVs in a designated paged area instead of storing them in the heap. This avoids large
core: fobj_rw_paged_alloc() store tags and IVs in paged area
fobj_rw_paged_alloc() is updated to store tags and IVs in a designated paged area instead of storing them in the heap. This avoids large heap allocations which also would suffer from a fragmented heap.
The previous ops_rw_paged and struct fobj_rwp are now replaced by ops_rwp_unpaged_iv and struct fobj_rwp_unpaged_iv respectively. These are now only used to support the area where other tags and IVs are stored.
A new ops_rwp_paged_iv and struct fobj_rwp_paged_iv are added for using the designated paged area.
A fobj based on the ops_rwp_unpaged_iv ops is allocated and registered with the pager via a callback registered with driver_init_late().
This effectively enables paging of IV and tags for pages mapping a TA.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 13616e88 | 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: support paging of tag and IV
Adds support for paging of the tag and IV protecting some read-write fobjs. The tag and IV needed to decrypt/encrypt a page are accessed by the pager. Since
core: pager: support paging of tag and IV
Adds support for paging of the tag and IV protecting some read-write fobjs. The tag and IV needed to decrypt/encrypt a page are accessed by the pager. Since the pager can't handle page fault caused by itself special measures are taken to make sure that the needed tag and IV are accessible when needed.
tee_pager_get_page() and tee_pager_load_page() are replaced by pager_get_page() which does what the previous functions used plus the additional logic to handle paging of tag and IV.
A new function tee_pager_init_iv_area() is added. It enables registration of a read/write paged fobj spanning the area used for storing all tags and IVs. This fobj must store its tags and IVs in unpaged memory, for instance the heap.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| afe47fe8 | 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: small simplifications
Adds pmem_clear() and make_dirty_page() as small helper functions to avoid some duplication of code.
Changes tee_pager_unhide_page() to take the virtual address o
core: pager: small simplifications
Adds pmem_clear() and make_dirty_page() as small helper functions to avoid some duplication of code.
Changes tee_pager_unhide_page() to take the virtual address of the page to unhide instead of an index into the translation table.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2230fc67 | 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add fobj_get_iv_vaddr()
Adds fobj_get_iv_vaddr() which returns the virtual address of the tag and IV needed to restore a particular page.
Acked-by: Etienne Carriere <etienne.carriere@linaro.o
core: add fobj_get_iv_vaddr()
Adds fobj_get_iv_vaddr() which returns the virtual address of the tag and IV needed to restore a particular page.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5c1334fa | 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add abort_is_write_fault()
Adds abort_is_write_fault() which returns true if the exception is a data abort caused by an instruction trying to write at an address.
Acked-by: Etienne Carriere <
core: add abort_is_write_fault()
Adds abort_is_write_fault() which returns true if the exception is a data abort caused by an instruction trying to write at an address.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0eb34c6f | 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: increase abort stack without crypto accelerations
In case CFG_CRYPTO_WITH_CE=n choose a larger abort stack since the C implementation of AES-GCM uses a bit more stack than the one using
core: arm32: increase abort stack without crypto accelerations
In case CFG_CRYPTO_WITH_CE=n choose a larger abort stack since the C implementation of AES-GCM uses a bit more stack than the one using the crypto extensions.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4451b84e | 17-Feb-2021 |
Fabien Parent <fparent@baylibre.com> |
plat-mediatek: add support for MT8175 SoC
Add OP-TEE support for MT8175 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> |
| e55ecd13 | 16-Mar-2021 |
Stefan Schmidt <snst@meek.de> |
core: use memzero_explicit() to clear sensitive data of tee object
Using preferred memzero_explicit() to clear the sensitive attribute data, which prevents the compiler from optimizing the call away
core: use memzero_explicit() to clear sensitive data of tee object
Using preferred memzero_explicit() to clear the sensitive attribute data, which prevents the compiler from optimizing the call away.
Signed-off-by: Stefan Schmidt <snst@meek.de> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| e9700cf1 | 11-Mar-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: remove unused SCMI channel agent name
Remove field agent_name from struct scmi_msg_channel since unused.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by
drivers: scmi-msg: remove unused SCMI channel agent name
Remove field agent_name from struct scmi_msg_channel since unused.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| ec8c2914 | 09-Mar-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: fix header file inline comments
Fix inline comments for scmi-msg API functions description.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Fori
drivers: scmi-msg: fix header file inline comments
Fix inline comments for scmi-msg API functions description.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 659a1f88 | 09-Mar-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: rename agent_id to channel_id
Rename agent_id reference to channel_id to avoid confusion with the agent identifiers used in SCMI protocol to identify agent, whereas the drivers on
drivers: scmi-msg: rename agent_id to channel_id
Rename agent_id reference to channel_id to avoid confusion with the agent identifiers used in SCMI protocol to identify agent, whereas the drivers only reference an SCMI channel, whatever the agent ID associated with the channel and knowing that an SCMI agent can have several channels to communicate with the SCMI platform/server.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| c0088d30 | 22-Jan-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: arm: enforce LTC multi-threading protection
Remove CFG_LTC_OPTEE_THREAD switch and enable or disable _CFG_CORE_LTC_OPTEE_THREAD based on multi-thread support since multi-threading mandates thr
core: arm: enforce LTC multi-threading protection
Remove CFG_LTC_OPTEE_THREAD switch and enable or disable _CFG_CORE_LTC_OPTEE_THREAD based on multi-thread support since multi-threading mandates thread protection means.
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| acab9a17 | 19-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: simplify device memory mapping
Register device memory by cluster range rather than by device interface as the later is likely to grow as new devices are added whereas the overall stat
plat-stm32mp1: simplify device memory mapping
Register device memory by cluster range rather than by device interface as the later is likely to grow as new devices are added whereas the overall static mapped may not change.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 8db78a81 | 19-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: update from deprecated register_dynamic_shm()
Use macro register_ddr() rather than register_dynamic_shm() that is deprecated.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro
plat-stm32mp1: update from deprecated register_dynamic_shm()
Use macro register_ddr() rather than register_dynamic_shm() that is deprecated.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| de266e27 | 23-Feb-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: imx_rngb: random number generator
Add support for the RNG(B) as described in the i.MX 6ULL Applications Processor Reference Manual, Rev 1, 11/2017.
Tested on an imx6ull based board.
Signe
drivers: imx_rngb: random number generator
Add support for the RNG(B) as described in the i.MX 6ULL Applications Processor Reference Manual, Rev 1, 11/2017.
Tested on an imx6ull based board.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 65b5ada4 | 02-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: drivers: stm32_rng.c: include thread.h
The implementation makes use of thread_mask_exceptions() and thread_unmask_exceptions() functions, therefore, include thread.h to avoid compilation error
core: drivers: stm32_rng.c: include thread.h
The implementation makes use of thread_mask_exceptions() and thread_unmask_exceptions() functions, therefore, include thread.h to avoid compilation errors.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8537f7eb | 02-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: driver: stpmic1: do not use TEE_Result as return type
stpmic1_regulator_levels_mv() uses TEE_Result as return type. The caller on core/arch/arm/plat-stm32mp1/scmi_server.c does not check the r
core: driver: stpmic1: do not use TEE_Result as return type
stpmic1_regulator_levels_mv() uses TEE_Result as return type. The caller on core/arch/arm/plat-stm32mp1/scmi_server.c does not check the return value, therefore, change it to void.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 3acae62c | 02-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: mm: move core_memprot.h to core/include/mm
This commit moves core_memprot.h to core/include/mm since it is architecture-independent.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.co
core: mm: move core_memprot.h to core/include/mm
This commit moves core_memprot.h to core/include/mm since it is architecture-independent.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ffc1ebb2 | 02-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: kernel: pm.c: add missing header stdlib.h
This commit explicitly includes stdlib.h to use realloc() function.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome
core: kernel: pm.c: add missing header stdlib.h
This commit explicitly includes stdlib.h to use realloc() function.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 4a9ea08c | 08-Mar-2021 |
Fangsuo Wu <fangsuowu@asrmicro.com> |
drivers: gic: fix the off-by-one error
The gd->max_it should refer to the largest support interrupt id. Fix the off-by-one errors so that the interrupt with the largest id can be correctly handled.
drivers: gic: fix the off-by-one error
The gd->max_it should refer to the largest support interrupt id. Fix the off-by-one errors so that the interrupt with the largest id can be correctly handled.
Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Fangsuo Wu <fangsuowu@asrmicro.com>
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| 3513f269 | 03-Mar-2021 |
Manish Tomar <manish.tomar@nxp.com> |
plat-ls: Add DSPI driver for NXP LS Platforms
This patch adds DSPI driver for Layerscape Platforms. DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.
Signed-off-by: Carl Lamb
plat-ls: Add DSPI driver for NXP LS Platforms
This patch adds DSPI driver for Layerscape Platforms. DSPI compilation is enabled by default for LX2160A-QDS and LX2160A-RDB.
Signed-off-by: Carl Lamb <calamb@microsoft.com> Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5b2ee5d8 | 04-Mar-2021 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: kernel: move ldelf_loader.h to core/include/kernel
To make reuse of ldelf_loader.h when porting OP-TEE OS to other architectures, this commit moves it to core/include/kernel.
Signed-off-by: M
core: kernel: move ldelf_loader.h to core/include/kernel
To make reuse of ldelf_loader.h when porting OP-TEE OS to other architectures, this commit moves it to core/include/kernel.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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