History log of /optee_os/core/ (Results 3251 – 3275 of 6495)
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b104cf5a06-Feb-2019 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: clock gating: atomic RCC registers access

Use io_{set|clr}bits32_stm32shregs() instead of io_{set|clr}bits32() for
SoC clock registers that must be locked while updated.

Signed-off-b

plat-stm32mp1: clock gating: atomic RCC registers access

Use io_{set|clr}bits32_stm32shregs() instead of io_{set|clr}bits32() for
SoC clock registers that must be locked while updated.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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cef5035c09-Apr-2021 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: disable BGET test

Disable BGET tests when pager is enabled since these can be very
very lengthy when pager page pool is small relatively to the tested
heap size.

Signed-off-by: Etien

plat-stm32mp1: disable BGET test

Disable BGET tests when pager is enabled since these can be very
very lengthy when pager page pool is small relatively to the tested
heap size.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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fe51372222-Mar-2021 Jelle Sels <jelle.sels@arm.com>

core: Add FFA_FEATURES handling for SPs

FFA_FEATURES is used to signal the supported FF-A features.

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Acked-by: Etienne Carriere <etienne.carriere@linar

core: Add FFA_FEATURES handling for SPs

FFA_FEATURES is used to signal the supported FF-A features.

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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0a8fa27d22-Mar-2021 Jelle Sels <jelle.sels@arm.com>

core: Add FFA_VERSION handling for SPs

FFA_VERSION return the current support FF-A version

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

82c617c722-Mar-2021 Jelle Sels <jelle.sels@arm.com>

core: Add FFA_ID_GET handling for SPs

FFA_ID_GET returns the id of the calling SP.

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

5aaab9c022-Apr-2021 Jerome Forissier <jerome@forissier.org>

core: asm: use WEAK_FUNC rather than FUNC + .weak

Some functions are defined in assembler with the FUNC macro (which
contains a .global directive) followed by a .weak directive to make
them weak sym

core: asm: use WEAK_FUNC rather than FUNC + .weak

Some functions are defined in assembler with the FUNC macro (which
contains a .global directive) followed by a .weak directive to make
them weak symbols. While this works fine with GCC and Clang up to
11.0.0, Clang 12.0.0 emits a warning:

AS out/arm/core/arch/arm/kernel/misc_a32.o
core/arch/arm/kernel/misc_a32.S:58:1: warning: get_core_pos_mpidr changed binding to STB_WEAK
.weak get_core_pos_mpidr
^

Fix this by using the newly introduced WEAK_FUNC macro.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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2b758a1a21-Apr-2021 Jerome Forissier <jerome@forissier.org>

core: tee_pobj_get(): detect access conflict

When tee_pobj_get() is called with TEE_POBJ_USAGE_CREATE and without
TEE_DATA_FLAG_OVERWRITE, and the persistent object is found in the list of
open obje

core: tee_pobj_get(): detect access conflict

When tee_pobj_get() is called with TEE_POBJ_USAGE_CREATE and without
TEE_DATA_FLAG_OVERWRITE, and the persistent object is found in the list of
open objects, the function should return TEE_ERROR_ACCESS_CONFLICT
immediately. There is no need to call into the FS layer since we know
the object exists at this point.

Fixes: https://github.com/OP-TEE/optee_os/issues/4560
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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203ee23d20-Apr-2021 Sahil Malhotra <sahil.malhotra@nxp.com>

core: plat-ls: get HW unique key using OP-TEE CAAM driver

Previously HW Unique key on LS platforms came through ATF
via SMC, since we have CAAM driver available in OP-TEE
itself, will use that direc

core: plat-ls: get HW unique key using OP-TEE CAAM driver

Previously HW Unique key on LS platforms came through ATF
via SMC, since we have CAAM driver available in OP-TEE
itself, will use that directly from now on.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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756e0b0919-Mar-2021 Ludovic Barre <ludovic.barre@foss.st.com>

drivers: sp805_wdt: use itr_alloc_add()

This change updates sp805_wdt driver to use itr_alloc_add()
since the driver allocates interrupt handlers at runtime.

Signed-off-by: Ludovic Barre <ludovic.b

drivers: sp805_wdt: use itr_alloc_add()

This change updates sp805_wdt driver to use itr_alloc_add()
since the driver allocates interrupt handlers at runtime.

Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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acc5dd2109-Apr-2021 Ludovic Barre <ludovic.barre@foss.st.com>

core: kernel: interrupt: add interface to allocate and add handler

This commit adds an interface to allocate and add an interrupt
handler. This change allows to factorize code when dynamic
interrupt

core: kernel: interrupt: add interface to allocate and add handler

This commit adds an interface to allocate and add an interrupt
handler. This change allows to factorize code when dynamic
interrupt handler allocation is needed.

Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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7acb3a4709-Apr-2021 Ludovic Barre <ludovic.barre@foss.st.com>

core: add interrupt resource in dt_node_info

Adds interrupt resource in dt_node_info and load
it from _fdt_fill_device_info().

Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by:

core: add interrupt resource in dt_node_info

Adds interrupt resource in dt_node_info and load
it from _fdt_fill_device_info().

Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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ed74d1c409-Mar-2021 Ludovic Barre <ludovic.barre@foss.st.com>

core: dt: take account type of interrupt in dt_get_irq()

Interrupt DT binding is defined by at least 2 cells as per DT binding
documentation [1]:
```
-The 1st cell is the interrupt type; 0 for SPI i

core: dt: take account type of interrupt in dt_get_irq()

Interrupt DT binding is defined by at least 2 cells as per DT binding
documentation [1]:
```
-The 1st cell is the interrupt type; 0 for SPI interrupts,
1 for PPI interrupts.
-The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987].
PPI interrupts are in the range [0-15].
```

This patch takes the first cell into account to return absolute value
required for itr_enable() interface.

Update CAAM crypto driver accordingly.

Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=v5.9#n66
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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67729d8d09-Apr-2021 Ludovic Barre <ludovic.barre@foss.st.com>

core: dt: split dt_get_irq() between interrupt framework and drivers

To welcome other interrupt drivers (coming from other platform for
example), we need to rework dt_get_irq() which was dedicated t

core: dt: split dt_get_irq() between interrupt framework and drivers

To welcome other interrupt drivers (coming from other platform for
example), we need to rework dt_get_irq() which was dedicated to ARM
platform more specifically GIC driver.
This change moves dt_get_irq() in interrupt framework, this manages the
generic part of interrupt bindings (specified by devicetree.org [1]) and
then call a driver callback to translate specific properties.
This callback is registered by drivers while its init step.

Update CAAM crypto driver accordingly.

Link: [1] https://www.devicetree.org/specifications/
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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96a6147512-Apr-2021 Yann Dirson <yann@blade-group.com>

rk3399: enable serial console by default

The definition is the same as for rk322x.

Signed-off-by: Yann Dirson <yann@blade-group.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

2c81009406-Apr-2021 Dave Herron <dave.herron@gallagher.com>

drivers: se050: Fix incorrect handling of se050 cipher operation mode

A boolean encrypt flag was being passed to the cipher init function
that instead expects a TEE_OperationMode enum. Given that th

drivers: se050: Fix incorrect handling of se050 cipher operation mode

A boolean encrypt flag was being passed to the cipher init function
that instead expects a TEE_OperationMode enum. Given that the enum
TEE_MODE_ENCRYPT has as a value of 0, encrypt and decrypt operations
were effectively swapped. This error has no practical effect on current
se050 mainline code because the only AES mode currently supported for
se050 is CTR, which ignores the passed value and always performs an
encrypt. But it needs to be fixed before adding support for ECB or CBC,
for example.

Signed-off-by: Dave Herron <dave.herron@gallagher.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.org>

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409c619b09-Apr-2021 Etienne Carriere <etienne.carriere@linaro.org>

core: stmm: Remove pager constraint on stmm_sp_ops

Fix a memory layout issue when CFG_WITH_STMM_SP=y and CFG_WITH_PAGER=y.

Before this change were all StMM operation function handlers their
related

core: stmm: Remove pager constraint on stmm_sp_ops

Fix a memory layout issue when CFG_WITH_STMM_SP=y and CFG_WITH_PAGER=y.

Before this change were all StMM operation function handlers their
related resources being linked into the pager unpaged sections despite
they could be pageable. The reason is stmm_sp_ops is referenced in
helper function is_stmm_ctx() which is referenced in unpaged helper
function is_user_mode_ctx().

This change removes stmm_sp_ops reference pager constraint by using
an indirect reference in is_stmm_ctx().

Declare stmm_dump_state() in pager unpaged section and preserve
__rodata_unpaged attribute for stmm_sp_ops since ::dump_state
operation is called from unpaged context by abort_print_current_ts().

Co-developed-by: Timothée Cercueil <timothee.cercueil@st.com>
Signed-off-by: Timothée Cercueil <timothee.cercueil@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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7b701d1b09-Apr-2021 Volodymyr Babchuk <volodymyr_babchuk@epam.com>

core/link.mk, plat-rcar: introduce SRECFLAGS variable

.srec files are used to flash OPTEE on Rcar Gen3 using serial
mode. Serial mode downloader in Rcar does not recognize S2 records in
.srec files

core/link.mk, plat-rcar: introduce SRECFLAGS variable

.srec files are used to flash OPTEE on Rcar Gen3 using serial
mode. Serial mode downloader in Rcar does not recognize S2 records in
.srec files that objcopy generates by default. It allows only S3
records. Also, it requires correct load address present in .srec
files.

So, we need to provide additional flags to objcopy during tee.srec
file generation. This change introduces makefile variable SRECFLAGS
that can be used exactly for this task. Also it provides the correct
flags for rcar platform.

Note: at the begging tee.srec file was generated directly from tee.elf
and had correct load addresses. As the load address is wider than 24
bits, objcopy automatically used S3 records. But, later tee-raw.bin
were introduced and I changed source for tee.srec, so now it is
generated from tee-raw.bin. As tee-raw.bin have no load address
information this leads to incorrect tee.srec file.

Strictly speaking, only --adjust-vma option is required. As current
load address is wider than 24 bits, objcopy will switch to S3 records
automatically. But I prefer to have --srec-forceS3 option anyways: for
that unlikely chance that CFG_TZDRAM_START would be changed to
something much lower.

Fixes: e66c2639b6b ("plat: rcar: generate .srec file using gen_tee_bin")

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>

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cf133f3716-Oct-2020 Jelle Sels <jelle.sels@arm.com>

core: arm: Add FF-A rxtx buffer for SPs

Rx/Rx buffers are used for SPs and the SPMC to exchange information.
This change implements the following FF-A messages for SPs:
FFA_RXTX_MAP_64 and FFA_RXTX_

core: arm: Add FF-A rxtx buffer for SPs

Rx/Rx buffers are used for SPs and the SPMC to exchange information.
This change implements the following FF-A messages for SPs:
FFA_RXTX_MAP_64 and FFA_RXTX_MAP_32 to have a SP map a rxtx buffer
FFA_RXTX_UNMAP to unmap the rxtx buffer
FFA_RX_RELEASE to release have the SP release the rx buffer

Signed-off-by: Jelle Sels <jelle.sels@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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25c7667529-Mar-2021 Marouene Boubakri <marouene.boubakri@nxp.com>

core: tee: move entry_std.c to core/tee

entry_std.* are not architecture-specific codes, therefore move
entry_std.c to core/tee and entry_std.h to core/include/tee.

Signed-off-by: Marouene Boubakri

core: tee: move entry_std.c to core/tee

entry_std.* are not architecture-specific codes, therefore move
entry_std.c to core/tee and entry_std.h to core/include/tee.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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fb2b1fd831-Mar-2021 Ruchika Gupta <ruchika.gupta@linaro.org>

core_mmu: Initialize MMU partition table after relocation

For virtualization support, we have multiple MMU partitions, one per
virtual machine. These partitions should be mapped to the default
parti

core_mmu: Initialize MMU partition table after relocation

For virtualization support, we have multiple MMU partitions, one per
virtual machine. These partitions should be mapped to the default
partition initially. With CFG_ASLR=y, the default_partition will be
relocated to a different VA. Hence shift the initialization of the
partition table after relocation.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>

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5c59f97d05-Apr-2021 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: CFG_STM32MP1_SCMI_SIP=y embeds SCMI SiP SMC entry

Define configuration switch CFG_STM32MP1_SCMI_SIP=y/n to enable
SiP SMC platform entries in SCMI server.

Signed-off-by: Etienne Carr

plat-stm32mp1: CFG_STM32MP1_SCMI_SIP=y embeds SCMI SiP SMC entry

Define configuration switch CFG_STM32MP1_SCMI_SIP=y/n to enable
SiP SMC platform entries in SCMI server.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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48f0474307-Apr-2021 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: add scmi_smt_set_shared_buffer()

Dynamically set/release SCMI SMT shared buffer reference. This can be
used when the caller passes the SCMI SMT shared memory reference as part
of

drivers: scmi-msg: add scmi_smt_set_shared_buffer()

Dynamically set/release SCMI SMT shared buffer reference. This can be
used when the caller passes the SCMI SMT shared memory reference as part
of OP-TEE invocation parameters instead of using a statically allocated
buffer.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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9ed56ecd05-Apr-2021 Etienne Carriere <etienne.carriere@linaro.org>

drivers: scmi-msg: stub exported API functions

Stub exported API functions from SCMI message drivers to make
the implementation more flexible.

Signed-off-by: Etienne Carriere <etienne.carriere@lina

drivers: scmi-msg: stub exported API functions

Stub exported API functions from SCMI message drivers to make
the implementation more flexible.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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185b459502-Apr-2021 Marouene Boubakri <marouene.boubakri@nxp.com>

core: mm: move mobj.c to core/mm

mobj is abstract and it is used by many sources which are not
architecture-specific such as core/kernel, core/pta and
core/tee. Therefore, move mobj.c to core/mm and

core: mm: move mobj.c to core/mm

mobj is abstract and it is used by many sources which are not
architecture-specific such as core/kernel, core/pta and
core/tee. Therefore, move mobj.c to core/mm and its
corresponding header file mobj.h to core/include/mm.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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5418501a02-Apr-2021 Marouene Boubakri <marouene.boubakri@nxp.com>

core: kernel: move embedded_ts.c to core/kernel

The embedded_ts.c code is not architecture-specific, therefore, move
it to core/kernel and move embedded_ts.h to core/include/kernel.

Signed-off-by:

core: kernel: move embedded_ts.c to core/kernel

The embedded_ts.c code is not architecture-specific, therefore, move
it to core/kernel and move embedded_ts.h to core/include/kernel.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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