| 10a688d8 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: enable CAAM DH
Enable CAAM DH algorithm for all i.MX platforms.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| ba7c81e9 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: implement NXP CAAM Driver - DH
Add DH CAAM driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carrier
drivers: caam: implement NXP CAAM Driver - DH
Add DH CAAM driver.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f6e2b9e2 | 14-Jan-2020 |
Cedric Neveux <cedric.neveux@nxp.com> |
drivers: crypto: implement crypto driver - DH
Add a generic cryptographic DH driver interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@n
drivers: crypto: implement crypto driver - DH
Add a generic cryptographic DH driver interface connecting TEE Crypto generic APIs to HW driver interface
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 4016b863 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix CMAC update operation
Fix an issue in the CMAC do_update() operation that would happen in the following conditions: * a data temporay buffer full (16 bytes). * an input message
drivers: caam: fix CMAC update operation
Fix an issue in the CMAC do_update() operation that would happen in the following conditions: * a data temporay buffer full (16 bytes). * an input message of 16 bytes.
These conditions would set the data size to be processed by the CAAM equals to zero. This would result on the loss of 16 bytes of the input message and a wrong CMAC.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5c2de886 | 30-Mar-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix input data size for CMAC do_update()
Fix a corner case where the CAAM would try to allocate an input DMA object with a size of 0 bytes.
Signed-off-by: Cedric Neveux <cedric.neveu
drivers: caam: fix input data size for CMAC do_update()
Fix a corner case where the CAAM would try to allocate an input DMA object with a size of 0 bytes.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 0ae917ec | 05-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: enable SCMI PTA interface
Enable SCMI PTA for REE to interface SCMI services in a threaded context.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wikla
plat-stm32mp1: enable SCMI PTA interface
Enable SCMI PTA for REE to interface SCMI services in a threaded context.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b0a1c250 | 05-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: pta: scmi: new interface to REE SCMI agent
Adds a PTA interface to REE SCMI agents to get SCMI message communication channel for processing in OP-TEE SCMI server.
Currently implement supports
core: pta: scmi: new interface to REE SCMI agent
Adds a PTA interface to REE SCMI agents to get SCMI message communication channel for processing in OP-TEE SCMI server.
Currently implement supports for a SCMI server built with CFG_SCMI_MSG_SMT=y. The implementation is made so that an alternate SCMI server implementation can added.
Client gets SCMI channel capabilities with PTA_SCMI_CMD_CAPABILITIES. Client gets a handle for an SCMI channel with command PTA_SCMI_CMD_GET_CHANNEL_HANDLE. Client pushes SCMI messages with command PTA_SCMI_CMD_PROCESS_SMT_CHANNEL or PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3e530666 | 25-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: introduce scmi_smt_channel_handle()
New API function for scmi-msg drivers: sub channel ID to handle conversion for consistency in SCMI PTA.
Signed-off-by: Etienne Carriere <etien
drivers: scmi-msg: introduce scmi_smt_channel_handle()
New API function for scmi-msg drivers: sub channel ID to handle conversion for consistency in SCMI PTA.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e687029d | 27-Apr-2021 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
plat: rcar: use new register_ddr() macro
As register_dynamic_shm() is being retired - switch to the new macro.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Volodymyr Babchuk
plat: rcar: use new register_ddr() macro
As register_dynamic_shm() is being retired - switch to the new macro.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
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| ad11fdb3 | 19-Mar-2021 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
plat: rcar m3: Add support for 8GB version
Add support for M3 SOC with 8GB of RAM. In this case memory is organized in two bank of 4GB. Renesas calls this variant 2x4g, so in OP-TEE we will have fla
plat: rcar m3: Add support for 8GB version
Add support for M3 SOC with 8GB of RAM. In this case memory is organized in two bank of 4GB. Renesas calls this variant 2x4g, so in OP-TEE we will have flavor salvator_m3_2x4g.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
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| d269f2ec | 25-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: fix plat_scmi_get_channel() against invalid IDs
Fix plat_scmi_get_channel() to safely return NULL when channel ID argument is invalid.
Signed-off-by: Etienne Carriere <etienne.carrie
plat-stm32mp1: fix plat_scmi_get_channel() against invalid IDs
Fix plat_scmi_get_channel() to safely return NULL when channel ID argument is invalid.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b104cf5a | 06-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: clock gating: atomic RCC registers access
Use io_{set|clr}bits32_stm32shregs() instead of io_{set|clr}bits32() for SoC clock registers that must be locked while updated.
Signed-off-b
plat-stm32mp1: clock gating: atomic RCC registers access
Use io_{set|clr}bits32_stm32shregs() instead of io_{set|clr}bits32() for SoC clock registers that must be locked while updated.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cef5035c | 09-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: disable BGET test
Disable BGET tests when pager is enabled since these can be very very lengthy when pager page pool is small relatively to the tested heap size.
Signed-off-by: Etien
plat-stm32mp1: disable BGET test
Disable BGET tests when pager is enabled since these can be very very lengthy when pager page pool is small relatively to the tested heap size.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fe513722 | 22-Mar-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: Add FFA_FEATURES handling for SPs
FFA_FEATURES is used to signal the supported FF-A features.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Etienne Carriere <etienne.carriere@linar
core: Add FFA_FEATURES handling for SPs
FFA_FEATURES is used to signal the supported FF-A features.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0a8fa27d | 22-Mar-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: Add FFA_VERSION handling for SPs
FFA_VERSION return the current support FF-A version
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 82c617c7 | 22-Mar-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: Add FFA_ID_GET handling for SPs
FFA_ID_GET returns the id of the calling SP.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 5aaab9c0 | 22-Apr-2021 |
Jerome Forissier <jerome@forissier.org> |
core: asm: use WEAK_FUNC rather than FUNC + .weak
Some functions are defined in assembler with the FUNC macro (which contains a .global directive) followed by a .weak directive to make them weak sym
core: asm: use WEAK_FUNC rather than FUNC + .weak
Some functions are defined in assembler with the FUNC macro (which contains a .global directive) followed by a .weak directive to make them weak symbols. While this works fine with GCC and Clang up to 11.0.0, Clang 12.0.0 emits a warning:
AS out/arm/core/arch/arm/kernel/misc_a32.o core/arch/arm/kernel/misc_a32.S:58:1: warning: get_core_pos_mpidr changed binding to STB_WEAK .weak get_core_pos_mpidr ^
Fix this by using the newly introduced WEAK_FUNC macro.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2b758a1a | 21-Apr-2021 |
Jerome Forissier <jerome@forissier.org> |
core: tee_pobj_get(): detect access conflict
When tee_pobj_get() is called with TEE_POBJ_USAGE_CREATE and without TEE_DATA_FLAG_OVERWRITE, and the persistent object is found in the list of open obje
core: tee_pobj_get(): detect access conflict
When tee_pobj_get() is called with TEE_POBJ_USAGE_CREATE and without TEE_DATA_FLAG_OVERWRITE, and the persistent object is found in the list of open objects, the function should return TEE_ERROR_ACCESS_CONFLICT immediately. There is no need to call into the FS layer since we know the object exists at this point.
Fixes: https://github.com/OP-TEE/optee_os/issues/4560 Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 203ee23d | 20-Apr-2021 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
core: plat-ls: get HW unique key using OP-TEE CAAM driver
Previously HW Unique key on LS platforms came through ATF via SMC, since we have CAAM driver available in OP-TEE itself, will use that direc
core: plat-ls: get HW unique key using OP-TEE CAAM driver
Previously HW Unique key on LS platforms came through ATF via SMC, since we have CAAM driver available in OP-TEE itself, will use that directly from now on.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 756e0b09 | 19-Mar-2021 |
Ludovic Barre <ludovic.barre@foss.st.com> |
drivers: sp805_wdt: use itr_alloc_add()
This change updates sp805_wdt driver to use itr_alloc_add() since the driver allocates interrupt handlers at runtime.
Signed-off-by: Ludovic Barre <ludovic.b
drivers: sp805_wdt: use itr_alloc_add()
This change updates sp805_wdt driver to use itr_alloc_add() since the driver allocates interrupt handlers at runtime.
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| acc5dd21 | 09-Apr-2021 |
Ludovic Barre <ludovic.barre@foss.st.com> |
core: kernel: interrupt: add interface to allocate and add handler
This commit adds an interface to allocate and add an interrupt handler. This change allows to factorize code when dynamic interrupt
core: kernel: interrupt: add interface to allocate and add handler
This commit adds an interface to allocate and add an interrupt handler. This change allows to factorize code when dynamic interrupt handler allocation is needed.
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 7acb3a47 | 09-Apr-2021 |
Ludovic Barre <ludovic.barre@foss.st.com> |
core: add interrupt resource in dt_node_info
Adds interrupt resource in dt_node_info and load it from _fdt_fill_device_info().
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com> Reviewed-by:
core: add interrupt resource in dt_node_info
Adds interrupt resource in dt_node_info and load it from _fdt_fill_device_info().
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| ed74d1c4 | 09-Mar-2021 |
Ludovic Barre <ludovic.barre@foss.st.com> |
core: dt: take account type of interrupt in dt_get_irq()
Interrupt DT binding is defined by at least 2 cells as per DT binding documentation [1]: ``` -The 1st cell is the interrupt type; 0 for SPI i
core: dt: take account type of interrupt in dt_get_irq()
Interrupt DT binding is defined by at least 2 cells as per DT binding documentation [1]: ``` -The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI interrupts. -The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the range [0-15]. ```
This patch takes the first cell into account to return absolute value required for itr_enable() interface.
Update CAAM crypto driver accordingly.
Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=v5.9#n66 Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 67729d8d | 09-Apr-2021 |
Ludovic Barre <ludovic.barre@foss.st.com> |
core: dt: split dt_get_irq() between interrupt framework and drivers
To welcome other interrupt drivers (coming from other platform for example), we need to rework dt_get_irq() which was dedicated t
core: dt: split dt_get_irq() between interrupt framework and drivers
To welcome other interrupt drivers (coming from other platform for example), we need to rework dt_get_irq() which was dedicated to ARM platform more specifically GIC driver. This change moves dt_get_irq() in interrupt framework, this manages the generic part of interrupt bindings (specified by devicetree.org [1]) and then call a driver callback to translate specific properties. This callback is registered by drivers while its init step.
Update CAAM crypto driver accordingly.
Link: [1] https://www.devicetree.org/specifications/ Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 96a61475 | 12-Apr-2021 |
Yann Dirson <yann@blade-group.com> |
rk3399: enable serial console by default
The definition is the same as for rk322x.
Signed-off-by: Yann Dirson <yann@blade-group.com> Acked-by: Jerome Forissier <jerome@forissier.org> |