| 31d2da53 | 25-Jan-2021 |
Volodymyr Babchuk <volodymyr_babchuk@epam.com> |
drivers: scif: update base address in scif_uart_init()
Prior this patch function scif_uart_init() didn't called io_pa_or_va() to determine correct base address for the device. This worked fine becau
drivers: scif: update base address in scif_uart_init()
Prior this patch function scif_uart_init() didn't called io_pa_or_va() to determine correct base address for the device. This worked fine because in most cases OP-TEE address space is identity mapped. But, this breaks if are trying to enable ASLR, because SCIF MMIO range is no more 1:1 mapped.
To fix this we need to use io_pa_or_va() as all other drivers do.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 165bd63b | 21-May-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: fix CMAC data input handling
Depending on the memory buffer input configuration, the function caam_dmaobj_sgtbuf_build() might modify the data size to be processed in the loop. This c
drivers: caam: fix CMAC data input handling
Depending on the memory buffer input configuration, the function caam_dmaobj_sgtbuf_build() might modify the data size to be processed in the loop. This case happens sometimes on the imx8mp where the input buffer physical address in above 32 bits. This implies reporting the data size re-ajustment when data is saved in the context buffer.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| ef30482b | 17-May-2021 |
Balint Dobszay <balint.dobszay@arm.com> |
plat-vexpress: FF-A: update secondary core init
Currently when using FF-A on FVP platform, the secondary core entrypoint registration is done with PSCI calls. However, this relies on a forked TF-A v
plat-vexpress: FF-A: update secondary core init
Currently when using FF-A on FVP platform, the secondary core entrypoint registration is done with PSCI calls. However, this relies on a forked TF-A version, as normally PSCI calls aren't accepted from SWd. Replace this mechanism with FFA_SECONDARY_EP_REGISTER, which is an FF-A v1.1 ALP0 ABI and it's supported by upstream TF-A v2.5.
Note that the Function ID expected by TF-A differs from the one in the spec, this will be fixed when the spec is finalized, but the overall mechanism should stay the same.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| d7b5407f | 12-May-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: pta: scmi: fix missing threaded state of the channel
Enable SMT channel threaded state when SCMI PTA gets a channel. Before this fixup, Core panics when SCMI message is posted since the assert
core: pta: scmi: fix missing threaded state of the channel
Enable SMT channel threaded state when SCMI PTA gets a channel. Before this fixup, Core panics when SCMI message is posted since the assertion on channel threaded field value in scmi_smt_threaded_entry() when in debug mode.
Fixes: b0a1c2504aaf ("core: pta: scmi: new interface to REE SCMI agent") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 85076371 | 17-May-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: rpmb: use IS_ENABLED on CFG_RPMB_FS_DEBUG_DATA
Replace #ifdef with if (IS_ENABLED()) for CFG_RPMB_FS_DEBUG_DATA.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jen
core: rpmb: use IS_ENABLED on CFG_RPMB_FS_DEBUG_DATA
Replace #ifdef with if (IS_ENABLED()) for CFG_RPMB_FS_DEBUG_DATA.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 71cbe6bd | 17-May-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: rpmb: remove CFG_RPMB_FS_NO_MAC
Remove CFG_RPMB_FS_NO_MAC that disabled authentication of RPMB frames read from the device. The switch was not documented never enabled in the project hence it
core: rpmb: remove CFG_RPMB_FS_NO_MAC
Remove CFG_RPMB_FS_NO_MAC that disabled authentication of RPMB frames read from the device. The switch was not documented never enabled in the project hence it simply removed.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fc8c4b4a | 19-May-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: remove faulty DMAOJB_TRACE()
Remove DMA object debug trace that would print a structure variable through a NULL pointer.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed
drivers: caam: remove faulty DMAOJB_TRACE()
Remove DMA object debug trace that would print a structure variable through a NULL pointer.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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| 9ac2c410 | 19-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: a32: fix parameter passing for __thread_std_smc_entry()
With the commit referred below is __thread_std_smc_entry() changed to take 6 arguments instead of 4. This means with the arm32 calling c
core: a32: fix parameter passing for __thread_std_smc_entry()
With the commit referred below is __thread_std_smc_entry() changed to take 6 arguments instead of 4. This means with the arm32 calling convention [1] that the last two parameters are passed on the stack. This is handled automatically by the C compiler, but has to be done by hand when calling from assembly. __thread_std_smc_entry() is called from assembly so fix the two places where the function is called.
Link [1]: https://developer.arm.com/documentation/ihi0042/latest/
Fixes: 4107d2f93e3e ("core: add a4 and a5 to thread_alloc_and_run()") Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| afb4ad9f | 18-May-2021 |
Jerome Forissier <jerome@forissier.org> |
core: pager: fix compiler warning with Clang
Function rwp_unpaged_iv_free() is reduced to a call to panic() when CFG_WITH_PAGER=y and CFG_CORE_PAGE_TAG_AND_IV=y. In this case, Clang 12 suggests a no
core: pager: fix compiler warning with Clang
Function rwp_unpaged_iv_free() is reduced to a call to panic() when CFG_WITH_PAGER=y and CFG_CORE_PAGE_TAG_AND_IV=y. In this case, Clang 12 suggests a noreturn attribute:
$ make -s CFG_WITH_PAGER=y COMPILER=clang core/mm/fobj.c:322:1: warning: function 'rwp_unpaged_iv_free' could be declared with attribute 'noreturn' [-Wmissing-noreturn] { ^ 1 warning generated.
However the attribute cannot be applied since it would be inappropriate when CFG_CORE_PAGE_TAG_AND_IV != y. Therefore, disable the warning for the file core/mm/fobj.c when the problematic configuration is enabled.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3cc2413a | 11-May-2021 |
Jerome Forissier <jerome@forissier.org> |
core: allow configuration without any secure storage
Support a configuration with no secure storage (CFG_REE_FS=n and CFG_RPMB_FS=n). In such a case, user TAs will get error code TEEC_ERROR_ITEM_NOT
core: allow configuration without any secure storage
Support a configuration with no secure storage (CFG_REE_FS=n and CFG_RPMB_FS=n). In such a case, user TAs will get error code TEEC_ERROR_ITEM_NOT_FOUND when trying to access persistent objects.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 82becbad | 10-May-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: zlib: fix build warning when _LFS64_LARGEFILE is not defined
In zlib, _LFS64_LARGEFILE is expected to be a boolean directive, either 1 (true) or 0 (false). Depending on toolchain version and d
core: zlib: fix build warning when _LFS64_LARGEFILE is not defined
In zlib, _LFS64_LARGEFILE is expected to be a boolean directive, either 1 (true) or 0 (false). Depending on toolchain version and directives build may produces warnings (as shown below with gcc 9.3) when the macro is not defined hence this change to default it to value 0 (false).
core/lib/zlib/zutil.h:196:39: warning: "_LFS64_LARGEFILE" is not defined, evaluates to 0 [-Wundef] 196 | (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0) | ^~~~~~~~~~~~~~~~ In file included from core/lib/zlib/adler32.c:9: core/lib/zlib/zutil.h:196:39: warning: "_LFS64_LARGEFILE" is not defined, evaluates to 0 [-Wundef] 196 | (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0) | ^~~~~~~~~~~~~~~~ CC out/core/lib/zlib/zutil.o In file included from core/lib/zlib/inftrees.c:7: core/lib/zlib/zutil.h:196:39: warning: "_LFS64_LARGEFILE" is not defined, evaluates to 0 [-Wundef] 196 | (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0) | ^~~~~~~~~~~~~~~~ In file included from core/lib/zlib/inflate.c:84: core/lib/zlib/zutil.h:196:39: warning: "_LFS64_LARGEFILE" is not defined, evaluates to 0 [-Wundef] 196 | (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0) | ^~~~~~~~~~~~~~~~ In file included from core/lib/zlib/zutil.c:9: core/lib/zlib/zutil.h:196:39: warning: "_LFS64_LARGEFILE" is not defined, evaluates to 0 [-Wundef] 196 | (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0) | ^~~~~~~~~~~~~~~~
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2b632aed | 12-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix thread_alloc_and_run() argument passing
Fix thread_alloc_and_run() to pass all its arguments to __thread_alloc_and_run(). This is needed with FF-A since the offset of the struct optee_msg_
core: fix thread_alloc_and_run() argument passing
Fix thread_alloc_and_run() to pass all its arguments to __thread_alloc_and_run(). This is needed with FF-A since the offset of the struct optee_msg_arg is passed in w6 from normal world. The Linux kernel driver currently passes offset=0 so it's not seen while testing, but that may change with future optimizations in the kernel driver.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 26f52232 | 06-May-2021 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add support for mx8mp platforms
Add support for mx8mp in the CAAM HAL.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> A
drivers: caam: add support for mx8mp platforms
Add support for mx8mp in the CAAM HAL.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6df63c07 | 06-May-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: add support for i.MX 8MP EVK
Add support for mx8mp platforms
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens
core: imx: add support for i.MX 8MP EVK
Add support for mx8mp platforms
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f85678c1 | 26-Apr-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
imx: pm: add support for reset2 function
Add support for SYSTEM_RESET2, which asserts WDOG-generated reset signal WDOG_RESET_B_DEB (internal reset).
For additional details check WDOGx_WCR fields de
imx: pm: add support for reset2 function
Add support for SYSTEM_RESET2, which asserts WDOG-generated reset signal WDOG_RESET_B_DEB (internal reset).
For additional details check WDOGx_WCR fields description in iMX Applications Processor Reference Manual.
Acked-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
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| 9daed40c | 26-Apr-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
core: arm: sm: upgrade to PSCI 1.1
Add support for new functions, introduced in PSCI v1.1 spec [1] (all are optional): * SYSTEM_RESET2 - extends existing SYSTEM_RESET. It provides
core: arm: sm: upgrade to PSCI 1.1
Add support for new functions, introduced in PSCI v1.1 spec [1] (all are optional): * SYSTEM_RESET2 - extends existing SYSTEM_RESET. It provides architectural reset definitions and vendor-specific resets. * MEM_PROTECT - provides protection against cold reboot attacks, by ensuring that memory is overwritten before it is handed over to an operating system loader. * MEM_PROTECT_CHECK_RANGE - used to check whether a memory range is protected by MEM_PROTECT.
[1] https://developer.arm.com/documentation/den0022/latest/
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
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| a83bf6de | 28-Apr-2021 |
Igor Opaniuk <igor.opaniuk@foundries.io> |
core: arm: sm: replace function ids with hex values
Replace PSCI function id defines with full hex values, so it's easier to validate existing values/add new one from PSCI spec updates.
Reviewed-by
core: arm: sm: replace function ids with hex values
Replace PSCI function id defines with full hex values, so it's easier to validate existing values/add new one from PSCI spec updates.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
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| 3cc421f7 | 10-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix thread_disable_prealloc_rpc_cache()
Fixes thread_disable_prealloc_rpc_cache() to also NULL rpc_mobj when freeing the shared memory object. Failing to do so might cause it rpc_mobj pointer
core: fix thread_disable_prealloc_rpc_cache()
Fixes thread_disable_prealloc_rpc_cache() to also NULL rpc_mobj when freeing the shared memory object. Failing to do so might cause it rpc_mobj pointer to be used after free.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| eeb0511d | 05-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
drivers: gic_it_enable(): remove assert that itr is disabled
Prior to this patch there was an assert in gic_it_enable() that non-SGI interrupts where disabled before this function would enable that
drivers: gic_it_enable(): remove assert that itr is disabled
Prior to this patch there was an assert in gic_it_enable() that non-SGI interrupts where disabled before this function would enable that interrupt. This forces the caller to keep track of the state of the interrupt in question and may also require additional locking to avoid races around this assert. Enabling an interrupt twice is unnecessary, but quite harmless. So remove the assert to simplify things for the caller where possible.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 4a6784ca | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/arch/arm/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked
core/arch/arm/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 135f53fe | 04-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/arch/arm/include/*.h: se BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <r
core/arch/arm/include/*.h: se BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| a808f49e | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: core_mmu.[ch]: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: J
core: core_mmu.[ch]: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b4bfc9a9 | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/include/*/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Je
core/include/*/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2735636f | 04-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/include/drivers/*.h: use BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <r
core/include/drivers/*.h: use BIT() and SHIFT_U32() macros
Uses the more safe BIT() and SHIFT_U32() macros instead of direct shifting of 1 or some other constant integer.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 57f197ec | 30-Apr-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jero
core/include/*.h: use U() for unsigned constants
Updates with the U() macro as described in the recently updated coding guidelines.
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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